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[breaking] Error: Data length doesn't have a 32 bit alignment: +2 byte. #390

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Jegeva opened this issue Apr 5, 2016 · 17 comments · Fixed by #408 or #407
Closed

[breaking] Error: Data length doesn't have a 32 bit alignment: +2 byte. #390

Jegeva opened this issue Apr 5, 2016 · 17 comments · Fixed by #408 or #407

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@Jegeva
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Jegeva commented Apr 5, 2016

in the lasted version of stlink with stm32l100 discovery:
Error: Data length doesn't have a 32 bit alignment: +2 byte.

older version is working fine (same board, same main.bin) :

OLDVERSION (99ed475):

st-flash write main.bin 0x8000000
2016-04-06T00:12:51 INFO src/stlink-usb.c: -- exit_dfu_mode
2016-04-06T00:12:51 INFO src/stlink-common.c: Loading device parameters....
2016-04-06T00:12:51 INFO src/stlink-common.c: Device connected is: L1 Medium-Plus-density device, id 0x10086427
2016-04-06T00:12:51 INFO src/stlink-common.c: SRAM size: 0x8000 bytes (32 KiB), Flash: 0x40000 bytes (256 KiB) in pages of 256 bytes
2016-04-06T00:12:51 INFO src/stlink-common.c: Attempting to write 16816 (0x41b0) bytes to stm32 address: 134217728 (0x8000000)
Flash page at addr: 0x08004100 erased
2016-04-06T00:12:51 INFO src/stlink-common.c: Finished erasing 66 pages of 256 (0x100) bytes
2016-04-06T00:12:51 INFO src/stlink-common.c: Starting Half page flash write for STM32L core id
2016-04-06T00:12:51 INFO src/stlink-common.c: Successfully loaded flash loader in sram
131/131 halfpages written
2016-04-06T00:12:53 INFO src/stlink-common.c: Starting verification of write complete
2016-04-06T00:12:53 INFO src/stlink-common.c: Flash written and verified! jolly good!

NEW VERSION:

~/stlink/st-flash write main.bin 0x8000000
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Loading device parameters....
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Device connected is: L1 Medium-Plus-density device, id 0x10086427
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: SRAM size: 0x8000 bytes (32 KiB), Flash: 0x40000 bytes (256 KiB) in pages of 256 bytes
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Attempting to write 16816 (0x41b0) bytes to stm32 address: 134217728 (0x8000000)
Flash page at addr: 0x08004100 erased
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Finished erasing 66 pages of 256 (0x100) bytes
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Starting Half page flash write for STM32L core id
Error: Data length doesn't have a 32 bit alignment: +2 byte.
Aborted
@gluedig
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gluedig commented Apr 7, 2016

what device are you using?
and what is the old version that works ok?

@Jegeva
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Jegeva commented Apr 12, 2016

stm32l100 discovery,
git log --pretty=format:'%h' -n 1 -> 99ed475

@tomdeboer
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I can confirm this. Last working commit is adbb6d2.

After merging #384, things got broken. Not just for the medium plus devices, but also for the STM32L151 I am using (which is a regular medium device) and the L152RE (a Nucleo board I happened to have).

@xor-gate
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xor-gate commented May 4, 2016

@mcoquelin-stm32 you refactored all code in PR #384, can you test this as described below with latest master. As I have no hardware laying around to verify/debug this and currently have no in-depth knowledge of the internal workings.

mcoquelin-stm32 added a commit to mcoquelin-stm32/stlink that referenced this issue May 5, 2016
Commit e43a737 removes one instruction in stm32l and stm32l0 loaders,
which results in 32 bits alignment breakage so that loarder load fails:
~/stlink/st-flash write main.bin 0x8000000
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Loading device parameters....
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Device connected is: L1 Medium-Plus-density device, id 0x10086427
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: SRAM size: 0x8000 bytes (32 KiB), Flash: 0x40000 bytes (256 KiB) in pages of 256 bytes
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Attempting to write 16816 (0x41b0) bytes to stm32 address: 134217728 (0x8000000)
Flash page at addr: 0x08004100 erased
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Finished erasing 66 pages of 256 (0x100) bytes
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Starting Half page flash write for STM32L core id
Error: Data length doesn't have a 32 bit alignment: +2 byte.
Aborted

This patch adds some padding at the end of these loaders to fix the alignment.

Reported-by: https://github.com/Jegeva
Fixes: stlink-org#390

Signed-off-by: Maxime Coquelin <[email protected]>
@mcoquelin-stm32
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Hi,
Thanks for reporting the issue, and sorry for the regression I introduced.
I won't have any stm32 hw for the next two weeks to test any change,
but from code review, I think I found the cause of the problem.

I removed an instruction in the stm32l and stm32l0 loaders, so it is no more aligned on 32 bits.

Could you test the following patch, and let me know if it solved your issue?
mcoquelin-stm32@1b8a5ed

Thanks in advance,
Maxime

@xor-gate
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xor-gate commented May 5, 2016

@tomdeboer and @Jegeva could you verify on your hardware with this patch it fixes the issue?

@gluedig
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gluedig commented May 6, 2016

I tried the patched version on L073RZ device, without success,
the loader runs but does not finish.
I prepared a modified loader on gluedig@aa54cc2
but only for L0 devices as i cannot verify on any other.

Still there seems to be some issue (probably #334) with flashing using st-flash utility.
Loading via gdb/st-util works nice with full speed, st-flash sometimes works, sometimes falls back to slower speed (especially after whole device erase).

mcoquelin-stm32 added a commit to mcoquelin-stm32/stlink that referenced this issue May 6, 2016
Commit e43a737 removes one instruction in stm32l and stm32l0 loaders,
which results in 32 bits alignment breakage so that loarder load fails:
~/stlink/st-flash write main.bin 0x8000000
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Loading device parameters....
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Device connected is: L1 Medium-Plus-density device, id 0x10086427
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: SRAM size: 0x8000 bytes (32 KiB), Flash: 0x40000 bytes (256 KiB) in pages of 256 bytes
2016-04-06T00:13:28 INFO /home/jg/stlink/src/stlink-common.c: Attempting to write 16816 (0x41b0) bytes to stm32 address: 134217728 (0x8000000)
Flash page at addr: 0x08004100 erased
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Finished erasing 66 pages of 256 (0x100) bytes
2016-04-06T00:13:29 INFO /home/jg/stlink/src/stlink-common.c: Starting Half page flash write for STM32L core id
Error: Data length doesn't have a 32 bit alignment: +2 byte.
Aborted

This patch adds some padding at the end of these loaders to fix the alignment.

Reported-by: https://github.com/Jegeva
Fixes: stlink-org#390

Signed-off-by: Maxime Coquelin <[email protected]>
@mcoquelin-stm32
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Hi @gluedig,

I pushed a v2 fixing the missing comma, but again, I cannot test it for now.
I see your comment saying it is not enough, so if you version works it is of course good to me.

The reason I modified the loaders was to use a common ABI with all version so that the code can be simplified.

Thanks,
Maxime

@gluedig
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gluedig commented May 6, 2016

Hi @mcoquelin-stm32
i think the culprit is probably
line 1549: 0xf8, 0xd3, which i think is 'bcc' - so loop if lower (no carry)
it checks the result of comparison in previous line (0x00, 0x2a, - cmp r2, #0)
and as r2 is used to specify number of words to write (and as a return value) the loop never actually runs and r2 still contains original value at exit, signifying an error
in my code the line is changed to to bhi - so loop if higher (carry, no zero)

@xor-gate
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xor-gate commented May 7, 2016

@Jegeva and @gluedig can you verify it has been fixed with PR #407, then we can call this issue a go 👍. Thanks all for the response and discussion to get this out of the way.

@gluedig
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gluedig commented May 8, 2016

i tried on L053, it works ok

tomdeboer added a commit to tomdeboer/stlink that referenced this issue May 8, 2016
@tomdeboer
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@gluedig I read your message after creating the previous fix. I overlooked the instruction you mentioned, but after trying it and verifying it works, I think it's should be preferred over my previous fix, which was basically a rollback to the last-working commit.

Also, looking at the stm32lx.S loader from OpenOCD, I believe the loaders for the STM32L1 and the STML0 are actually the same. Would you be able to make the L0 device also use the loader_code_stm32l loader and verify this? I only have L1 devices, so I am not able to try this myself.

@gluedig
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gluedig commented May 9, 2016

@tomdeboer to understand correctly:
you took the version before merge #407, used changed L0 bootloader from my branch (in gluedig@aa54cc2) as L1 bootloader and verified it on a L1 device?
if that is the case i cannot verify anything more - already made sure that L0 loader is working
one thing left to do is revert #407, apply fix for L0 bootloader and use this for both L0 and L1 devices

i have all mentioned above on branch

@xor-gate
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Hi guys, can we call this issue done with the merge?

@gluedig
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gluedig commented May 10, 2016

works for me

@tomdeboer
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Yeah I think we can close it

@xor-gate
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Thanks all for your time, effort and fixing!

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@Nightwalker-87 Nightwalker-87 added this to the v1.3.0 milestone Mar 16, 2020
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