From d2a2c9825a739d92f2c4b7604ca732a2c1e3161e Mon Sep 17 00:00:00 2001 From: anton Date: Mon, 12 Apr 2021 22:34:44 +0500 Subject: [PATCH] Fixed chipid detection on Cortex-MO+ core --- src/common.c | 3 ++- src/stlink-lib/reg.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/common.c b/src/common.c index a17392cf1..f230bee64 100644 --- a/src/common.c +++ b/src/common.c @@ -1240,7 +1240,8 @@ int stlink_chip_id(stlink_t *sl, uint32_t *chip_id) { cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM7) { // STM32H7 chipid in 0x5c001000 (RM0433 pg3189) ret = stlink_read_debug32(sl, 0x5c001000, chip_id); - } else if (cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM0) { + } else if (cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM0 || + cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM0P) { // STM32F0 (RM0091, pg914; RM0360, pg713) // STM32L0 (RM0377, pg813; RM0367, pg915; RM0376, pg917) // STM32G0 (RM0444, pg1367) diff --git a/src/stlink-lib/reg.h b/src/stlink-lib/reg.h index 4849806d7..b581a269c 100644 --- a/src/stlink-lib/reg.h +++ b/src/stlink-lib/reg.h @@ -4,6 +4,7 @@ #define STLINK_REG_CM3_CPUID 0xE000ED00 #define STLINK_REG_CMx_CPUID_PARTNO_CM0 0xC20 +#define STLINK_REG_CMx_CPUID_PARTNO_CM0P 0xC60 #define STLINK_REG_CMx_CPUID_PARTNO_CM3 0xC23 #define STLINK_REG_CMx_CPUID_PARTNO_CM4 0xC24 #define STLINK_REG_CMx_CPUID_PARTNO_CM7 0xC27