From eca4810869c6405250fb2a3076a4c99efd02649c Mon Sep 17 00:00:00 2001 From: Guohan Lu Date: Fri, 30 Jun 2017 00:59:18 +0000 Subject: [PATCH 1/2] [device]: add minigraph and LED support for Arista 7050 QX32S --- .../port_config.ini | 0 .../sai.profile | 0 .../x86_64-arista_7050_qx32s/minigraph.xml | 1079 +++++++++++++++++ .../plugins/led_control.py | 82 ++ 4 files changed, 1161 insertions(+) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-QX32S => Arista-7050-QX-32S}/port_config.ini (100%) rename device/arista/x86_64-arista_7050_qx32s/{Arista-7050-QX32S => Arista-7050-QX-32S}/sai.profile (100%) create mode 100644 device/arista/x86_64-arista_7050_qx32s/minigraph.xml create mode 100644 device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX32S/port_config.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/port_config.ini similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX32S/port_config.ini rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/port_config.ini diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX32S/sai.profile b/device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/sai.profile similarity index 100% rename from device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX32S/sai.profile rename to device/arista/x86_64-arista_7050_qx32s/Arista-7050-QX-32S/sai.profile diff --git a/device/arista/x86_64-arista_7050_qx32s/minigraph.xml b/device/arista/x86_64-arista_7050_qx32s/minigraph.xml new file mode 100644 index 000000000000..efd30582947a --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/minigraph.xml @@ -0,0 +1,1079 @@ + + + + + + ARISTA01T0 + 10.0.0.33 + switch1 + 10.0.0.32 + 1 + 180 + 60 + + + switch1 + 10.0.0.0 + ARISTA01T2 + 10.0.0.1 + 1 + 180 + 60 + + + ARISTA02T0 + 10.0.0.35 + switch1 + 10.0.0.34 + 1 + 180 + 60 + + + switch1 + 10.0.0.2 + ARISTA02T2 + 10.0.0.3 + 1 + 180 + 60 + + + ARISTA03T0 + 10.0.0.37 + switch1 + 10.0.0.36 + 1 + 180 + 60 + + + switch1 + 10.0.0.4 + ARISTA03T2 + 10.0.0.5 + 1 + 180 + 60 + + + ARISTA04T0 + 10.0.0.39 + switch1 + 10.0.0.38 + 1 + 180 + 60 + + + switch1 + 10.0.0.6 + ARISTA04T2 + 10.0.0.7 + 1 + 180 + 60 + + + ARISTA05T0 + 10.0.0.41 + switch1 + 10.0.0.40 + 1 + 180 + 60 + + + switch1 + 10.0.0.8 + ARISTA05T2 + 10.0.0.9 + 1 + 180 + 60 + + + ARISTA06T0 + 10.0.0.43 + switch1 + 10.0.0.42 + 1 + 180 + 60 + + + switch1 + 10.0.0.10 + ARISTA06T2 + 10.0.0.11 + 1 + 180 + 60 + + + ARISTA07T0 + 10.0.0.45 + switch1 + 10.0.0.44 + 1 + 180 + 60 + + + switch1 + 10.0.0.12 + ARISTA07T2 + 10.0.0.13 + 1 + 180 + 60 + + + ARISTA08T0 + 10.0.0.47 + switch1 + 10.0.0.46 + 1 + 180 + 60 + + + switch1 + 10.0.0.14 + ARISTA08T2 + 10.0.0.15 + 1 + 180 + 60 + + + ARISTA09T0 + 10.0.0.49 + switch1 + 10.0.0.48 + 1 + 180 + 60 + + + switch1 + 10.0.0.16 + ARISTA09T2 + 10.0.0.17 + 1 + 180 + 60 + + + ARISTA10T0 + 10.0.0.51 + switch1 + 10.0.0.50 + 1 + 180 + 60 + + + switch1 + 10.0.0.18 + ARISTA10T2 + 10.0.0.19 + 1 + 180 + 60 + + + ARISTA11T0 + 10.0.0.53 + switch1 + 10.0.0.52 + 1 + 180 + 60 + + + switch1 + 10.0.0.20 + ARISTA11T2 + 10.0.0.21 + 1 + 180 + 60 + + + ARISTA12T0 + 10.0.0.55 + switch1 + 10.0.0.54 + 1 + 180 + 60 + + + switch1 + 10.0.0.22 + ARISTA12T2 + 10.0.0.23 + 1 + 180 + 60 + + + ARISTA13T0 + 10.0.0.57 + switch1 + 10.0.0.56 + 1 + 180 + 60 + + + switch1 + 10.0.0.24 + ARISTA13T2 + 10.0.0.25 + 1 + 180 + 60 + + + ARISTA14T0 + 10.0.0.59 + switch1 + 10.0.0.58 + 1 + 180 + 60 + + + switch1 + 10.0.0.26 + ARISTA14T2 + 10.0.0.27 + 1 + 180 + 60 + + + ARISTA15T0 + 10.0.0.61 + switch1 + 10.0.0.60 + 1 + 180 + 60 + + + switch1 + 10.0.0.28 + ARISTA15T2 + 10.0.0.29 + 1 + 180 + 60 + + + ARISTA16T0 + 10.0.0.63 + switch1 + 10.0.0.62 + 1 + 180 + 60 + + + switch1 + 10.0.0.30 + ARISTA16T2 + 10.0.0.31 + 1 + 180 + 60 + + + + + 65100 + switch1 + + +
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ARISTA12T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet13/1 + ARISTA13T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet14/1 + ARISTA14T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet15/1 + ARISTA15T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet16/1 + ARISTA16T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet17/1 + ARISTA01T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet18/1 + ARISTA02T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet19/1 + ARISTA03T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet20/1 + ARISTA04T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet21/1 + ARISTA05T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet22/1 + ARISTA06T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet23/1 + ARISTA07T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet24/1 + ARISTA08T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet25 + ARISTA09T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet26 + ARISTA10T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet27 + ARISTA11T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet28 + ARISTA12T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet29 + ARISTA13T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet30 + ARISTA14T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet31 + ARISTA15T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet32 + ARISTA16T0 + Ethernet1 + + + + + switch1 + Arista-7050-QX-32S + + + + + + + switch1 + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + ErspanDestinationIpv4 + + 2.2.2.2 + + + + + + + switch1 + Arista-7050-QX-32S + diff --git a/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py b/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py new file mode 100644 index 000000000000..3bb7fdef0f36 --- /dev/null +++ b/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py @@ -0,0 +1,82 @@ +#!/usr/bin/env python +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase +except ImportError, e: + raise ImportError (str(e) + " - required module not found") + + +class LedControl(LedControlBase): + """Platform specific LED control class""" + + SONIC_PORT_NAME_PREFIX = "Ethernet" + + LED_SYSFS_PATH_BREAKOUT_CAPABLE = "/sys/class/leds/qsfp{0}_{1}/brightness" + LED_SYSFS_PATH_NO_BREAKOUT = "/sys/class/leds/qsfp{0}/brightness" + + QSFP_BREAKOUT_START_IDX = 5 + QSFP_BREAKOUT_END_IDX = 28 + QSFP_NO_BREAKOUT_START_IDX = 29 + QSFP_NO_BREAKOUT_END_IDX = 36 + + LED_COLOR_OFF = 0 + LED_COLOR_GREEN = 1 + LED_COLOR_YELLOW = 2 + + # Helper method to map SONiC port name to Arista QSFP index + def _port_name_to_qsfp_index(self, port_name): + # Strip "Ethernet" off port name + if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX): + return -1 + + sonic_port_num = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):]) + + # SONiC port nums are 0-based and increment by 4 + # Arista QSFP indices are 1-based and increment by 1 + return ((sonic_port_num/4) + 5) + + # Concrete implementation of port_link_state_change() method + def port_link_state_change(self, port, state): + qsfp_index = self._port_name_to_qsfp_index(port) + + # Ignore invalid QSFP indices + if qsfp_index <= 0: + return + + # QSFP indices 1-24 are breakout-capable and have four LEDs, and each LED indicate one lane. + # whereas indices 25-32 are not breakout-capable, and only have one + if qsfp_index <= self.QSFP_BREAKOUT_END_IDX: + # assuming 40G, then we need to control four lanes + led_sysfs_paths = [ self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, i) for i in range(1, 5) ] + else: + led_sysfs_paths = [ self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) ] + + for led_sysfs_path in led_sysfs_paths: + led_file = open(led_sysfs_path, "w") + + if state == "up": + led_file.write("%d" % self.LED_COLOR_GREEN) + else: + led_file.write("%d" % self.LED_COLOR_OFF) + + led_file.close() + + # Constructor + def __init__(self): + # Initialize: Turn all front panel QSFP LEDs off + for qsfp_index in range(self.QSFP_BREAKOUT_START_IDX, self.QSFP_BREAKOUT_END_IDX + 1): + for lane in range(1, 5): + led_sysfs_path = self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, lane) + with open(led_sysfs_path, 'w') as led_file: + led_file.write("%d" % self.LED_COLOR_OFF) + + for qsfp_index in range(self.QSFP_NO_BREAKOUT_START_IDX, self.QSFP_NO_BREAKOUT_END_IDX + 1): + led_sysfs_path = self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) + with open(led_sysfs_path, 'w') as led_file: + led_file.write("%d" % self.LED_COLOR_OFF) + From 8f5d7c10c9ea94fc07bf84fb0631b69dffddc4b8 Mon Sep 17 00:00:00 2001 From: Guohan Lu Date: Fri, 30 Jun 2017 03:04:10 +0000 Subject: [PATCH 2/2] add LED_QSFP_OFFSET --- .../plugins/led_control.py | 20 ++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py b/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py index 3bb7fdef0f36..582eaacbf918 100644 --- a/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py +++ b/device/arista/x86_64-arista_7050_qx32s/plugins/led_control.py @@ -19,10 +19,12 @@ class LedControl(LedControlBase): LED_SYSFS_PATH_BREAKOUT_CAPABLE = "/sys/class/leds/qsfp{0}_{1}/brightness" LED_SYSFS_PATH_NO_BREAKOUT = "/sys/class/leds/qsfp{0}/brightness" - QSFP_BREAKOUT_START_IDX = 5 - QSFP_BREAKOUT_END_IDX = 28 - QSFP_NO_BREAKOUT_START_IDX = 29 - QSFP_NO_BREAKOUT_END_IDX = 36 + QSFP_BREAKOUT_START_IDX = 1 + QSFP_BREAKOUT_END_IDX = 24 + QSFP_NO_BREAKOUT_START_IDX = 25 + QSFP_NO_BREAKOUT_END_IDX = 32 + + LED_QSFP_OFFSET = 4 LED_COLOR_OFF = 0 LED_COLOR_GREEN = 1 @@ -38,7 +40,7 @@ def _port_name_to_qsfp_index(self, port_name): # SONiC port nums are 0-based and increment by 4 # Arista QSFP indices are 1-based and increment by 1 - return ((sonic_port_num/4) + 5) + return ((sonic_port_num/4) + 1) # Concrete implementation of port_link_state_change() method def port_link_state_change(self, port, state): @@ -52,9 +54,9 @@ def port_link_state_change(self, port, state): # whereas indices 25-32 are not breakout-capable, and only have one if qsfp_index <= self.QSFP_BREAKOUT_END_IDX: # assuming 40G, then we need to control four lanes - led_sysfs_paths = [ self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, i) for i in range(1, 5) ] + led_sysfs_paths = [ self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index + self.LED_QSFP_OFFSET, i) for i in range(1, 5) ] else: - led_sysfs_paths = [ self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) ] + led_sysfs_paths = [ self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index + self.LED_QSFP_OFFSET) ] for led_sysfs_path in led_sysfs_paths: led_file = open(led_sysfs_path, "w") @@ -71,12 +73,12 @@ def __init__(self): # Initialize: Turn all front panel QSFP LEDs off for qsfp_index in range(self.QSFP_BREAKOUT_START_IDX, self.QSFP_BREAKOUT_END_IDX + 1): for lane in range(1, 5): - led_sysfs_path = self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index, lane) + led_sysfs_path = self.LED_SYSFS_PATH_BREAKOUT_CAPABLE.format(qsfp_index + self.LED_QSFP_OFFSET, lane) with open(led_sysfs_path, 'w') as led_file: led_file.write("%d" % self.LED_COLOR_OFF) for qsfp_index in range(self.QSFP_NO_BREAKOUT_START_IDX, self.QSFP_NO_BREAKOUT_END_IDX + 1): - led_sysfs_path = self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index) + led_sysfs_path = self.LED_SYSFS_PATH_NO_BREAKOUT.format(qsfp_index + self.LED_QSFP_OFFSET) with open(led_sysfs_path, 'w') as led_file: led_file.write("%d" % self.LED_COLOR_OFF)