sse4.1: use logical OR instead of bitwise OR in neon impl of _mm_test…

…nzc_si128

Caught by clang-14+

docker/cross-files/aarch64-clang-15-ccache.cross

@@ -0,0 +1,20 @@
+[binaries]
+c = ['ccache', 'clang-15']
+cpp = ['ccache', 'clang++-15']
+ar = 'llvm-ar-15'
+strip = 'llvm-strip-15'
+objcopy = 'llvm-objcopy-15'
+ld = 'llvm-ld-15'
+exe_wrapper = ['qemu-aarch64-static', '-L', '/usr/aarch64-linux-gnu']
+
+[properties]
+c_args        = ['--target=aarch64-linux-gnu', '-march=armv8-a+simd+crypto+crc', '-isystem=/usr/aarch64-linux-gnu/include', '-Weverything', '-fno-lax-vector-conversions', '-Werror']
+cpp_args      = ['--target=aarch64-linux-gnu', '-march=armv8-a+simd+crypto+crc', '-isystem=/usr/aarch64-linux-gnu/include', '-Weverything', '-fno-lax-vector-conversions', '-Werror']
+c_link_args   = ['--target=aarch64-linux-gnu']
+cpp_link_args = ['--target=aarch64-linux-gnu']
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'arm64'
+endian = 'little'

docker/cross-files/power9-clang-15-ccache.cross

@@ -0,0 +1,20 @@
+[binaries]
+c = ['ccache', 'clang-15']
+cpp = ['ccache', 'clang++-15']
+ar = 'llvm-ar-15'
+strip = 'llvm-strip-15'
+objcopy = 'llvm-objcopy-15'
+ld = 'llvm-ld-15'
+exe_wrapper = ['qemu-ppc64le-static', '-cpu', 'power9', '-L', '/usr/powerpc64le-linux-gnu/']
+
+[properties]
+c_args = ['--target=powerpc64le-linux-gnu', '-mcpu=power9', '-isystem=/usr/powerpc64le-linux-gnu/include', '-Weverything', '-fno-lax-vector-conversions', '-Werror', '-Wno-deprecated-altivec-src-compat']
+cpp_args = ['--target=powerpc64le-linux-gnu', '-mcpu=power9', '-isystem=/usr/powerpc64le-linux-gnu/include', '-Weverything', '-fno-lax-vector-conversions', '-Werror', '-Wno-deprecated-altivec-src-compat']
+c_link_args = ['--target=powerpc64le-linux-gnu']
+cpp_link_args = ['--target=powerpc64le-linux-gnu']
+
+[host_machine]
+system = 'linux'
+cpu_family = 'ppc64'
+cpu = 'ppc64el'
+endian = 'little'

docker/cross-files/riscv64-clang-15-ccache.cross

@@ -0,0 +1,20 @@
+[binaries]
+c = ['ccache', 'clang-15']
+cpp = ['ccache', 'clang++-15']
+ar = 'llvm-ar-15'
+strip = 'llvm-strip-15'
+objcopy = 'llvm-objcopy-15'
+ld = 'llvm-ld-15'
+exe_wrapper = ['qemu-riscv64-static', '-L', '/usr/riscv64-linux-gnu/']
+
+[properties]
+c_args   = ['--target=riscv64-linux-gnu', '-isystem=/usr/riscv64-linux-gnu/include', '-Wextra', '-Werror']
+cpp_args = ['--target=riscv64-linux-gnu', '-isystem=/usr/riscv64-linux-gnu/include', '-Wextra', '-Werror']
+c_link_args = ['--target=riscv64-linux-gnu']
+cpp_link_args = ['--target=riscv64-linux-gnu']
+
+[host_machine]
+system = 'linux'
+cpu_family = 'riscv64'
+cpu = 'riscv64'
+endian = 'little'

docker/cross-files/s390x-clang-15-ccache.cross

@@ -0,0 +1,20 @@
+[binaries]
+c = ['ccache', 'clang-15']
+cpp = ['ccache', 'clang++-15']
+ar = 'llvm-ar-15'
+strip = 'llvm-strip-15'
+objcopy = 'llvm-objcopy-15'
+ld = 'llvm-ld-15'
+exe_wrapper = ['qemu-s390x-static', '-L', '/usr/s390x-linux-gnu/']
+
+[properties]
+c_args        = ['--target=s390x-ibm-linux', '-isystem=/usr/s390x-linux-gnu/include', '-Weverything', '-fno-lax-vector-conversions', '-Werror']
+cpp_args      = ['--target=s390x-ibm-linux', '-isystem=/usr/s390x-linux-gnu/include', '-Weverything', '-fno-lax-vector-conversions', '-Werror']
+c_link_args   = ['--target=s390x-ibm-linux']
+cpp_link_args = ['--target=s390x-ibm-linux']
+
+[host_machine]
+system = 'linux'
+cpu_family = 's390x'
+cpu = 's390x'
+endian = 'big'

simde/x86/sse4.1.h

@@ -2299,8 +2299,8 @@ simde_mm_testnzc_si128 (simde__m128i a, simde__m128i b) {
     #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
       int64x2_t s640 = vandq_s64(b_.neon_i64, a_.neon_i64);
       int64x2_t s641 = vbicq_s64(b_.neon_i64, a_.neon_i64);
-      return !( !(vgetq_lane_s64(s641, 0) | vgetq_lane_s64(s641, 1)) \
-          | !(vgetq_lane_s64(s640, 0) | vgetq_lane_s64(s640, 1)) );
+      return !( !(vgetq_lane_s64(s641, 0) || vgetq_lane_s64(s641, 1)) \
+             || !(vgetq_lane_s64(s640, 0) || vgetq_lane_s64(s640, 1)) );
     #elif defined(SIMDE_WASM_SIMD128_NATIVE)
       v128_t m1 = wasm_v128_and(a_.wasm_v128, b_.wasm_v128);
       v128_t m2 = wasm_v128_andnot(b_.wasm_v128, a_.wasm_v128);