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Merge pull request #525 from sifive/add-l2pm-l2pf-examples
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Add example for L2 performance counters.
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bsousi5 authored Aug 24, 2020
2 parents 5fd0989 + 5efed45 commit 295cd87
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Showing 26 changed files with 60 additions and 148 deletions.
3 changes: 3 additions & 0 deletions .gitmodules
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Expand Up @@ -154,3 +154,6 @@
[submodule "scl-metal"]
path = scl-metal
url = https://github.com/sifive/scl-metal.git
[submodule "software/example-l2pm"]
path = software/example-l2pm
url = https://github.com/sifive/example-l2pm.git
2 changes: 2 additions & 0 deletions README.md
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Expand Up @@ -149,6 +149,8 @@ operating systems to RISC-V.
- A memory test that measure the latency at different cache layers and memory blocks
- example-hpm
- Demonstrates usage of the RISC-V hardware performance counter APIs.
- example-l2pm
- Demonstrates usage of Sifive L2 performance monitor counter APIs to capture L2 cache event logs.
- example-freertos-minimal
- A simple FreeRTOS skeleton to build your FreeRTOS application.
- example-freertos-blinky
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6 changes: 0 additions & 6 deletions bsp/freedom-e310-arty/metal-inline.h
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Expand Up @@ -47,9 +47,6 @@ extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid);
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -142,9 +139,6 @@ extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */


/* From clock@0 */
struct __metal_driver_fixed_clock __metal_dt_clock_0 = {
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
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6 changes: 0 additions & 6 deletions bsp/freedom-e310-arty/metal.h
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Expand Up @@ -331,9 +331,6 @@ static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid)
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -825,9 +822,6 @@ static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- sifive_fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */


#define __METAL_DT_MAX_MEMORIES 3

__asm__ (".weak __metal_memory_table");
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-e31/metal-inline.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,9 +47,6 @@ extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid);
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -178,9 +175,6 @@ extern __inline__ long __metal_driver_sifive_fe310_g000_prci_size( );
extern __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( );


/* --------------------- sifive_fu540_c000_l2 ------------ */


/* From clock@0 */
struct __metal_driver_fixed_clock __metal_dt_clock_0 = {
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-e31/metal.h
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Expand Up @@ -383,9 +383,6 @@ static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid)
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -1170,9 +1167,6 @@ static __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __



/* --------------------- sifive_fu540_c000_l2 ------------ */


#define __METAL_DT_MAX_MEMORIES 2

__asm__ (".weak __metal_memory_table");
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-s51/metal-inline.h
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Expand Up @@ -47,9 +47,6 @@ extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid);
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -178,9 +175,6 @@ extern __inline__ long __metal_driver_sifive_fe310_g000_prci_size( );
extern __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( );


/* --------------------- sifive_fu540_c000_l2 ------------ */


/* From clock@0 */
struct __metal_driver_fixed_clock __metal_dt_clock_0 = {
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-s51/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -383,9 +383,6 @@ static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid)
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -1170,9 +1167,6 @@ static __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __



/* --------------------- sifive_fu540_c000_l2 ------------ */


#define __METAL_DT_MAX_MEMORIES 2

__asm__ (".weak __metal_memory_table");
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-u54/metal-inline.h
Original file line number Diff line number Diff line change
Expand Up @@ -46,9 +46,6 @@ extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid);
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -117,9 +114,6 @@ extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */


struct metal_memory __metal_dt_mem_memory_80000000 = {
._base_address = 2147483648UL,
._size = 2147483648UL,
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-u54/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -304,9 +304,6 @@ static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid)
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -474,9 +471,6 @@ static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- sifive_fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */


#define __METAL_DT_MAX_MEMORIES 1

__asm__ (".weak __metal_memory_table");
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-u54mc/metal-inline.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,9 +47,6 @@ extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid);
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -120,9 +117,6 @@ extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */


/* From ethclk */
struct __metal_driver_fixed_clock __metal_dt_ethclk = {
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
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6 changes: 0 additions & 6 deletions bsp/qemu-sifive-u54mc/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -458,9 +458,6 @@ static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid)
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -628,9 +625,6 @@ static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- sifive_fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */


#define __METAL_DT_MAX_MEMORIES 1

__asm__ (".weak __metal_memory_table");
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12 changes: 0 additions & 12 deletions bsp/sifive-hifive-unleashed/metal-inline.h
Original file line number Diff line number Diff line change
Expand Up @@ -50,9 +50,6 @@ extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid);
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -153,10 +150,6 @@ extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */
extern __inline__ uintptr_t __metal_driver_sifive_fu540_c000_l2_control_base(struct metal_cache *cache);


/* From refclk */
struct __metal_driver_fixed_clock __metal_dt_refclk = {
.clock.vtable = &__metal_driver_vtable_fixed_clock.clock,
Expand Down Expand Up @@ -397,11 +390,6 @@ struct __metal_driver_sifive_uart0 __metal_dt_serial_10011000 = {
.uart.vtable = &__metal_driver_vtable_sifive_uart0.uart,
};

/* From cache_controller@2010000 */
struct __metal_driver_sifive_fu540_c000_l2 __metal_dt_cache_controller_2010000 = {
.cache.vtable = &__metal_driver_vtable_sifive_fu540_c000_l2.cache,
};


#endif /* METAL_INLINE_H*/
#endif /* ! ASSEMBLY */
39 changes: 29 additions & 10 deletions bsp/sifive-hifive-unleashed/metal-platform.h
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,35 @@
#define METAL_RISCV_PLIC0_CONTEXT_THRESHOLD 0UL
#define METAL_RISCV_PLIC0_CONTEXT_CLAIM 4UL

/* From cache_controller@2010000 */
#define METAL_SIFIVE_CCACHE0_2010000_BASE_ADDRESS 33619968UL
#define METAL_SIFIVE_CCACHE0_0_BASE_ADDRESS 33619968UL
#define METAL_SIFIVE_CCACHE0_2010000_SIZE 4096UL
#define METAL_SIFIVE_CCACHE0_0_SIZE 4096UL

#define METAL_SIFIVE_CCACHE0
#define METAL_SIFIVE_CCACHE0_CONFIG 0UL
#define METAL_SIFIVE_CCACHE0_WAYENABLE 8UL
#define METAL_SIFIVE_CCACHE0_ECCINJECTERROR 64UL
#define METAL_SIFIVE_CCACHE0_DIRECCFIXLOW 256UL
#define METAL_SIFIVE_CCACHE0_DIRECCFIXHIGH 260UL
#define METAL_SIFIVE_CCACHE0_DIRECCFIXCOUNT 264UL
#define METAL_SIFIVE_CCACHE0_DIRECCFAILLOW 288UL
#define METAL_SIFIVE_CCACHE0_DIRECCFAILHIGH 292UL
#define METAL_SIFIVE_CCACHE0_DIRECCFAILCOUNT 296UL
#define METAL_SIFIVE_CCACHE0_DATECCFIXLOW 320UL
#define METAL_SIFIVE_CCACHE0_DATECCFIXHIGH 324UL
#define METAL_SIFIVE_CCACHE0_DATECCFIXCOUNT 328UL
#define METAL_SIFIVE_CCACHE0_DATECCFAILLOW 352UL
#define METAL_SIFIVE_CCACHE0_DATECCFAILHIGH 356UL
#define METAL_SIFIVE_CCACHE0_DATECCFAILCOUNT 360UL
#define METAL_SIFIVE_CCACHE0_FLUSH64 512UL
#define METAL_SIFIVE_CCACHE0_FLUSH32 576UL
#define METAL_SIFIVE_CCACHE0_WAYMASK0 2048UL
#define METAL_SIFIVE_CCACHE0_PMEVENTSELECT0 8192UL
#define METAL_SIFIVE_CCACHE0_PMCLIENTFILTER 10240UL
#define METAL_SIFIVE_CCACHE0_PMEVENTCOUNTER0 12288UL

/* From error_device@18000000 */
#define METAL_SIFIVE_ERROR0_18000000_BASE_ADDRESS 402653184UL
#define METAL_SIFIVE_ERROR0_0_BASE_ADDRESS 402653184UL
Expand All @@ -56,16 +85,6 @@

#define METAL_SIFIVE_ERROR0

/* From cache_controller@2010000 */
#define METAL_SIFIVE_FU540_C000_L2_2010000_BASE_ADDRESS 33619968UL
#define METAL_SIFIVE_FU540_C000_L2_0_BASE_ADDRESS 33619968UL
#define METAL_SIFIVE_FU540_C000_L2_2010000_SIZE 4096UL
#define METAL_SIFIVE_FU540_C000_L2_0_SIZE 4096UL

#define METAL_SIFIVE_FU540_C000_L2
#define METAL_SIFIVE_FU540_C000_L2_CONFIG 0UL
#define METAL_SIFIVE_FU540_C000_L2_WAYENABLE 8UL

/* From gpio@10060000 */
#define METAL_SIFIVE_GPIO0_10060000_BASE_ADDRESS 268828672UL
#define METAL_SIFIVE_GPIO0_0_BASE_ADDRESS 268828672UL
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36 changes: 11 additions & 25 deletions bsp/sifive-hifive-unleashed/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,16 @@

#define __METAL_PLIC_NUM_PARENTS 9

#define METAL_SIFIVE_CCACHE0_INTERRUPTS { 1, 2, 3, }

#define METAL_SIFIVE_CCACHE0_INTERRUPT_PARENT &__metal_dt_interrupt_controller_c000000.controller

#define METAL_CACHE_DRIVER_PREFIX sifive_ccache0

#define METAL_SIFIVE_CCACHE0_PERFMON_COUNTERS 0

#define __METAL_DT_SIFIVE_CCACHE0_HANDLE (struct metal_cache *)NULL

#define __METAL_CLIC_SUBINTERRUPTS 0
#define METAL_MAX_CLIC_INTERRUPTS 0

Expand Down Expand Up @@ -89,13 +99,13 @@
#include <metal/drivers/riscv_cpu.h>
#include <metal/drivers/riscv_plic0.h>
#include <metal/pmp.h>
#include <metal/drivers/sifive_ccache0.h>
#include <metal/drivers/sifive_gpio0.h>
#include <metal/drivers/sifive_i2c0.h>
#include <metal/drivers/sifive_pwm0.h>
#include <metal/drivers/sifive_spi0.h>
#include <metal/drivers/sifive_test0.h>
#include <metal/drivers/sifive_uart0.h>
#include <metal/drivers/sifive_fu540-c000_l2.h>

/* From refclk */
struct __metal_driver_fixed_clock __metal_dt_refclk;
Expand Down Expand Up @@ -186,9 +196,6 @@ struct __metal_driver_sifive_uart0 __metal_dt_serial_10010000;
/* From serial@10011000 */
struct __metal_driver_sifive_uart0 __metal_dt_serial_10011000;

/* From cache_controller@2010000 */
struct __metal_driver_sifive_fu540_c000_l2 __metal_dt_cache_controller_2010000;



/* --------------------- fixed_clock ------------ */
Expand Down Expand Up @@ -593,9 +600,6 @@ static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid)
/* --------------------- sifive_buserror0 ------------ */


/* --------------------- sifive_ccache0 ------------ */


/* --------------------- sifive_clic0 ------------ */


Expand Down Expand Up @@ -1214,19 +1218,6 @@ static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_select
/* --------------------- sifive_fe310_g000_prci ------------ */


/* --------------------- sifive_fu540_c000_l2 ------------ */
static __inline__ uintptr_t __metal_driver_sifive_fu540_c000_l2_control_base(struct metal_cache *cache)
{
if ((uintptr_t)cache == (uintptr_t)&__metal_dt_cache_controller_2010000) {
return METAL_SIFIVE_FU540_C000_L2_2010000_BASE_ADDRESS;
}
else {
return 0;
}
}



#define __METAL_DT_MAX_MEMORIES 9

__asm__ (".weak __metal_memory_table");
Expand Down Expand Up @@ -1352,11 +1343,6 @@ struct __metal_driver_sifive_uart0 *__metal_uart_table[] = {
__asm__ (".weak __metal_wdog_table");
struct __metal_driver_sifive_wdog0 *__metal_wdog_table[] = {
NULL };
/* From cache_controller@2010000 */
#define __METAL_DT_SIFIVE_FU540_C000_L2_HANDLE (&__metal_dt_cache_controller_2010000.cache)

#define __METAL_DT_CACHE_CONTROLLER_2010000_HANDLE (&__metal_dt_cache_controller_2010000.cache)

#endif /* MACROS_ELSE_METAL_H*/

#endif /* ! __METAL_MACHINE_MACROS */
Expand Down
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