diff --git a/apps/microtvm/cmsisnn/corstone300.ld b/apps/microtvm/cmsisnn/corstone300.ld index 1d2dd8805799f..e52b23da33601 100644 --- a/apps/microtvm/cmsisnn/corstone300.ld +++ b/apps/microtvm/cmsisnn/corstone300.ld @@ -247,12 +247,12 @@ SECTIONS } > DTCM - .bss.NoInit : + .bss.noinit (NOLOAD): { . = ALIGN(16); - *(.bss.NoInit) + *(.bss.noinit.*) . = ALIGN(16); - } > DDR AT > DDR + } > SRAM AT > SRAM .bss : { diff --git a/apps/microtvm/ethosu/corstone300.ld b/apps/microtvm/ethosu/corstone300.ld index 3f36f218cba28..fb670d45c9bed 100644 --- a/apps/microtvm/ethosu/corstone300.ld +++ b/apps/microtvm/ethosu/corstone300.ld @@ -251,12 +251,12 @@ SECTIONS } > DTCM - .bss.NoInit : + .bss.noinit (NOLOAD): { . = ALIGN(16); - *(.bss.NoInit) + *(.bss.noinit.*) . = ALIGN(16); - } > DDR AT > DDR + } > SRAM AT > SRAM .bss : { diff --git a/src/target/source/source_module.cc b/src/target/source/source_module.cc index 046b7e96065df..11ff409e1da4e 100644 --- a/src/target/source/source_module.cc +++ b/src/target/source/source_module.cc @@ -242,7 +242,7 @@ class CSourceCrtMetadataModuleNode : public runtime::ModuleNode { for (const auto& kv : metadata_->pool_inputs.value()) { tir::usmp::AllocatedPoolInfo allocated_pool_info = kv.second; if (allocated_pool_info->pool_info->is_internal) { - code_ << "__attribute__((section(\".data.tvm\"), "; + code_ << "__attribute__((section(\".bss.noinit.tvm\"), "; code_ << "aligned(" << 16 << ")))\n"; code_ << "static uint8_t " << allocated_pool_info->pool_info->pool_name << "[" << allocated_pool_info->allocated_size->value << "];\n"; diff --git a/tests/python/relay/aot/corstone300.ld b/tests/python/relay/aot/corstone300.ld index a825da74c1dba..bee82a98436f3 100644 --- a/tests/python/relay/aot/corstone300.ld +++ b/tests/python/relay/aot/corstone300.ld @@ -251,12 +251,12 @@ SECTIONS . = ALIGN(16); } > SRAM AT > SRAM - .bss.NoInit : + .bss.noinit (NOLOAD): { . = ALIGN(16); - *(.bss.NoInit) + *(.bss.noinit.*) . = ALIGN(16); - } > DDR AT > DDR + } > SRAM AT > SRAM .bss : {