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Re-encode the multi-destination register instructions. #74

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ben-marshall opened this issue Nov 8, 2019 · 0 comments
Open

Re-encode the multi-destination register instructions. #74

ben-marshall opened this issue Nov 8, 2019 · 0 comments
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implementation Issue relates to the hardware implementation of the iSE software Issue relates to the example software or modified binutils. specification Issue relates to the XCrypto ISE specification verification Issue relates to the verification environment
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@ben-marshall
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The current encoding of the multi-precision and xc.mror instructions is very wasteful.

Current usage patterns are:

  • xc.madd.3 (a,b), c, d, a
  • xc.msub.3 (a,b), c, d, a
  • xc.mmul.3 (a,b), c, d, a
  • xc.macc.1 (a,b), a, b, c

Most of the time, a source and a destination register (or two) are the same.

Suggestions:

  • For xc.madd.3, xc.msub.3, xc.mmul.3, make what is now rs3 an implicit argument, which is always equal to the "low" destination register.
    • This frees up 32 code points per instruction.
  • For xc.macc.1, either:
    • Remove rs3, make rs1 a multi-register address and add rs2 to the catenation of rs1 registers, placing the result in rdm.
      • Frees up 32-code points.
    • Make rdm an implicit source register pair.
      • Frees up 256 code points.

For xc.mror:

  • make rs1 a multi-source register.
  • make rs2 the rotate ammount.
@ben-marshall ben-marshall self-assigned this Nov 8, 2019
@ben-marshall ben-marshall transferred this issue from scarv/xcrypto-spec Dec 12, 2019
@ben-marshall ben-marshall added specification Issue relates to the XCrypto ISE specification verification Issue relates to the verification environment implementation Issue relates to the hardware implementation of the iSE software Issue relates to the example software or modified binutils. labels Dec 12, 2019
@ben-marshall ben-marshall added this to the XCrypto V2 milestone Dec 12, 2019
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