Zero Trust Applied to Chip Design & Manufacturing

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Resources to explore the two challenges listed in #2:

1. NO "proof of manufacturing" according to a known open source chip design specification
2. NO proof that whatever secrets were encoded into the hardware are not known to anyone

An additional challenge is remote attestation without a trust anchor in a trusted party such as the chip manufacturer (e.g. Intel EPID & DCAP). Thanks to @melynx for raising this question at the Infra Gardens gathering at EthDenver 2024.

Perhaps Keystone's approach is better? (docs)

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• Zero trust security model
• Intel: A Zero Trust Approach to Architecting Silicon
• Chip Industry Needs More Trust, Not Zero Trust
• Building a Zero Trust Security Model for Autonomous Systems (See "Zero Trust Applied to Chip Design" section)
• Zero Trust Security In Chip Manufacturing

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Verifiable ASICs
Riad S. Wahby, Max Howald, Siddharth Garg, abhi shelat, and Michael Walfish

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Semiconductors: Fundamental Research and the Future

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Remote inspection of adversary-controlled environments

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https://libresilicon.com/