diff --git a/compiler/rustc_target/src/spec/armv5te_none_eabi.rs b/compiler/rustc_target/src/spec/armv5te_none_eabi.rs
index ad26f9ee356d9..dfd27b6547467 100644
--- a/compiler/rustc_target/src/spec/armv5te_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/armv5te_none_eabi.rs
@@ -1,6 +1,6 @@
 //! Targets the ARMv5TE, with code as `a32` code by default.
 
-use crate::spec::{cvs, LinkerFlavor, LldFlavor, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{cvs, FramePointer, Target, TargetOptions};
 
 pub fn target() -> Target {
     Target {
@@ -20,8 +20,6 @@ pub fn target() -> Target {
 
         options: TargetOptions {
             abi: "eabi".into(),
-            linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
-            linker: Some("rust-lld".into()),
             // extra args passed to the external assembler (assuming `arm-none-eabi-as`):
             // * activate t32/a32 interworking
             // * use arch ARMv5TE
@@ -31,18 +29,13 @@ pub fn target() -> Target {
             // Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
             // The resulting atomics are ABI incompatible with atomics backed by libatomic.
             features: "+soft-float,+strict-align,+atomics-32".into(),
+            frame_pointer: FramePointer::MayOmit,
             main_needs_argc_argv: false,
             // don't have atomic compare-and-swap
             atomic_cas: false,
             has_thumb_interworking: true,
-            relocation_model: RelocModel::Static,
-            panic_strategy: PanicStrategy::Abort,
-            // from thumb_base, rust-lang/rust#44993.
-            emit_debug_gdb_scripts: false,
-            // from thumb_base, apparently gcc/clang give enums a minimum of 8 bits on no-os targets
-            c_enum_min_bits: 8,
 
-            ..Default::default()
+            ..super::thumb_base::opts()
         },
     }
 }
diff --git a/src/doc/rustc/src/platform-support/armv5te-none-eabi.md b/src/doc/rustc/src/platform-support/armv5te-none-eabi.md
index e7e9aaba54bf1..f469dab1c42fa 100644
--- a/src/doc/rustc/src/platform-support/armv5te-none-eabi.md
+++ b/src/doc/rustc/src/platform-support/armv5te-none-eabi.md
@@ -3,13 +3,10 @@
 **Tier: 3**
 
 Bare-metal target for any cpu in the ARMv5TE architecture family, supporting
-ARM/Thumb code interworking (aka `a32`/`t32`), with ARM code as the default code
+ARM/Thumb code interworking (aka `a32`/`t32`), with `a32` code as the default code
 generation.
 
-The `thumbv5te-none-eabi` target is the same as this one, but with THUMB code as the default.
-
-In particular this supports the main CPU of the Nintendo DS, but there's nothing DS
-specific with this target, so any ARMv5TE device should work fine.
+The `thumbv5te-none-eabi` target is the same as this one, but the instruction set defaults to `t32`.
 
 ## Target Maintainers
 
@@ -59,12 +56,6 @@ Most of `core` should work as expected, with the following notes:
 
 Rust programs are output as ELF files.
 
-For running on DS hardware, you'll need to use an external tool to bundle this ELF file into an NDS binary. The `ndstool` utility included with devkitARM is one such tool that can do this for you:
-
-```shell
-ndstool -c [out_nds] -9 [in_elf]
-```
-
 ## Testing
 
 This is a cross-compiled target that you will need to emulate during testing.