Rust-analyzer not respecting default target

[luciusmagn]

Hi, I ran into an issue where types where wrongly ellided and I think I managed to narrow it down to rust-analyzer.

I am running this code:

extern crate libc;
extern crate rayon;

use libc::{clock_gettime, timespec, CLOCK_MONOTONIC};
use rand::distributions::Alphanumeric;
use rand::{thread_rng, Rng};
use rayon::prelude::*;

fn main() {
    (0..3000000).into_par_iter().for_each(|_| {
        thread_local! {
            static THREAD_NAME: String = thread_rng()
                .sample_iter(&Alphanumeric)
                .take(30)
                .map(char::from)
                .collect();
        }
        let name = THREAD_NAME.with(|x| x.clone());

        for _ in 0..3000 {
            let mut ts1 = timespec {
                tv_sec: 0,
                tv_nsec: 0,
            };
            let mut ts2 = timespec {
                tv_sec: 0,
                tv_nsec: 0,
            };

            let res1 = unsafe { clock_gettime(CLOCK_MONOTONIC, &mut ts1) };
            let res2 = unsafe { clock_gettime(CLOCK_MONOTONIC, &mut ts2) };
            let (secs_start, nsecs_start) = (ts1.tv_sec, ts1.tv_nsec);
            let (secs_finish, nsecs_finish) = (ts2.tv_sec, ts2.tv_nsec);

            let start_total = secs_start * 1_000_000_000 + nsecs_start;
            let stop_total = secs_finish * 1_000_000_000 + nsecs_finish;

            if start_total > stop_total {
                println!(
                    "back to the future: {} <= {} [{}] s_start: {} s_finish: {} ns_start: {} ns_finish: {}",
                    start_total,
                    stop_total,
                    name,
                    secs_start,
                    secs_finish,
                    nsecs_start,
                    nsecs_finish,
                );
                assert!(res1 + res2 == 0, "one of the time functions failed");
            }
        }
    });
}

secs_start, secs_finish, nsecs_start, nsecs_finish all resolve to i64 in my editor, but that is not the case for the arm architecture I am testing for, where these are defined as i32.

The appropriate target is set as default in .cargo/config.