breakpoint.s undesired behavior when trigger does not exist? #32
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IF this has been fixed, can we close the issue? |
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Changes in this pull-request:
* restructuring the riscv-test-suite to indicate clearly what is deprecated, wip and usable
tests.
* based on the above fixed the directory structure for riscv-targets where-ever applicable. Only
tested riscvOVPsim and spike.
* fixed script bugs for spike as well
* renamed rv32i/I-IO.S to rv32i/I-IO-01.S along with necessary changes to the reference files
and Makefrag
* renamed mbadaddr csr to mtval as raised in issue #31
* C.SWSP-01.S test updated to fix issue #37
Close: #8 , #31 , #30 , #32 , #33 , #37, #47 , #67 , #96
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Changes in this pull-request:
* restructuring the riscv-test-suite to indicate clearly what is deprecated, wip and usable
tests.
* based on the above fixed the directory structure for riscv-targets where-ever applicable. Only
tested riscvOVPsim and spike.
* fixed script bugs for spike as well
* renamed rv32i/I-IO.S to rv32i/I-IO-01.S along with necessary changes to the reference files
and Makefrag
* renamed mbadaddr csr to mtval as raised in issue riscv-non-isa#31
* C.SWSP-01.S test updated to fix issue riscv-non-isa#37
Close: riscv-non-isa#8 , riscv-non-isa#31 , riscv-non-isa#30 , riscv-non-isa#32 , riscv-non-isa#33 , riscv-non-isa#37, riscv-non-isa#47 , riscv-non-isa#67 , riscv-non-isa#96
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When a trigger doesn't exist, the test goes to the
passlabel. The result is that the signature is not written to after the trigger check, and the target will failmake verify. This doesn't seem like the ideal action, since it's valid for a target to have no trigger.For context, I'm trying to add rocket chip's
Default[RV32]Configas a target, and it only has one trigger.The text was updated successfully, but these errors were encountered: