From 2e5cabcecc5108274936cb4f2281d144be5ae403 Mon Sep 17 00:00:00 2001 From: Ved Shanbhogue Date: Tue, 19 Mar 2024 02:44:38 -0500 Subject: [PATCH] fix upper bits check for SXL=1 --- iommu_ref_model/libiommu/src/iommu_two_stage_trans.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/iommu_ref_model/libiommu/src/iommu_two_stage_trans.c b/iommu_ref_model/libiommu/src/iommu_two_stage_trans.c index 68c1e7ae..7f7c2524 100644 --- a/iommu_ref_model/libiommu/src/iommu_two_stage_trans.c +++ b/iommu_ref_model/libiommu/src/iommu_two_stage_trans.c @@ -97,9 +97,11 @@ two_stage_address_translation( } // Instruction fetch addresses and load and store effective addresses, // which are 64 bits, must have bits 63: all equal to bit - // (VASIZE-1), or else a page-fault exception will occur. - // Do the address is canonical check - if ( masked_upper_bits != 0 && masked_upper_bits != mask ) goto page_fault; + // (VASIZE-1), or else a page-fault exception will occur - for SXL=0 + // Do the address is canonical check - for SXL=0 + // For SXL = 1 check bits 63:32 are all 0 + if ( (masked_upper_bits != 0 && masked_upper_bits != mask && SXL == 0) || + (masked_upper_bits != 0 && SXL == 1) ) goto page_fault; i = LEVELS - 1; a = iosatp.PPN * PAGESIZE;