From 0385e122969db9504b3c8d42dc3a125d78a9ad9a Mon Sep 17 00:00:00 2001 From: cornelk Date: Mon, 9 Dec 2024 21:55:07 -0600 Subject: [PATCH] upgrade retrogolib --- go.mod | 2 +- go.sum | 4 ++-- internal/const.go | 3 +-- internal/disasm.go | 4 ++-- internal/parser.go | 7 +++---- internal/vars.go | 3 +-- 6 files changed, 10 insertions(+), 13 deletions(-) diff --git a/go.mod b/go.mod index e29ce67..f59f88b 100644 --- a/go.mod +++ b/go.mod @@ -2,4 +2,4 @@ module github.com/retroenv/nesgodisasm go 1.22 -require github.com/retroenv/retrogolib v0.0.0-20241105003543-931e147416dc +require github.com/retroenv/retrogolib v0.0.0-20241210033726-b294e4b1cc68 diff --git a/go.sum b/go.sum index 74b6fc3..fd54565 100644 --- a/go.sum +++ b/go.sum @@ -1,2 +1,2 @@ -github.com/retroenv/retrogolib v0.0.0-20241105003543-931e147416dc h1:hRuZBHYI/K0w0PTQEJrJ8o5hwW9s1wqWqEogdBL8Z3o= -github.com/retroenv/retrogolib v0.0.0-20241105003543-931e147416dc/go.mod h1:8pe9mEjbKL9Z5L4FFzYGSk1Ovhrq1LR6ucwRFj5CIXs= +github.com/retroenv/retrogolib v0.0.0-20241210033726-b294e4b1cc68 h1:woI2bmTWznMA9UX0iR5kZs7QfRaF4ZVM+B8mMHaTLCg= +github.com/retroenv/retrogolib v0.0.0-20241210033726-b294e4b1cc68/go.mod h1:8pe9mEjbKL9Z5L4FFzYGSk1Ovhrq1LR6ucwRFj5CIXs= diff --git a/internal/const.go b/internal/const.go index 935a140..9e44573 100644 --- a/internal/const.go +++ b/internal/const.go @@ -7,7 +7,6 @@ import ( . "github.com/retroenv/retrogolib/addressing" "github.com/retroenv/retrogolib/arch/cpu/m6502" "github.com/retroenv/retrogolib/arch/nes/register" - "github.com/retroenv/retrogolib/cpu" ) type constTranslation struct { @@ -17,7 +16,7 @@ type constTranslation struct { Write string } -func (dis *Disasm) replaceParamByConstant(address uint16, opcode cpu.Opcode, paramAsString string, +func (dis *Disasm) replaceParamByConstant(address uint16, opcode m6502.Opcode, paramAsString string, constantInfo constTranslation) string { // split parameter string in case of x/y indexing, only the first part will be replaced by a const name diff --git a/internal/disasm.go b/internal/disasm.go index 4427374..ca53c7d 100644 --- a/internal/disasm.go +++ b/internal/disasm.go @@ -14,11 +14,11 @@ import ( "github.com/retroenv/nesgodisasm/internal/options" "github.com/retroenv/nesgodisasm/internal/program" "github.com/retroenv/nesgodisasm/internal/writer" + "github.com/retroenv/retrogolib/arch/cpu/m6502" "github.com/retroenv/retrogolib/arch/nes" "github.com/retroenv/retrogolib/arch/nes/cartridge" "github.com/retroenv/retrogolib/arch/nes/codedatalog" "github.com/retroenv/retrogolib/arch/nes/parameter" - "github.com/retroenv/retrogolib/cpu" "github.com/retroenv/retrogolib/log" ) @@ -31,7 +31,7 @@ type fileWriterConstructor func(app *program.Program, options *options.Disassemb type offset struct { program.Offset - opcode cpu.Opcode // opcode that the byte at this offset represents + opcode m6502.Opcode // opcode that the byte at this offset represents branchFrom []bankReference // list of all addresses that branch to this offset branchingTo string // label to jump to if instruction branches diff --git a/internal/parser.go b/internal/parser.go index b0d51fb..0009ed0 100644 --- a/internal/parser.go +++ b/internal/parser.go @@ -9,7 +9,6 @@ import ( "github.com/retroenv/retrogolib/arch/cpu/m6502" "github.com/retroenv/retrogolib/arch/nes" "github.com/retroenv/retrogolib/arch/nes/parameter" - "github.com/retroenv/retrogolib/cpu" ) var errInstructionOverlapsIRQHandlers = errors.New("instruction overlaps IRQ handler start") @@ -140,7 +139,7 @@ func (dis *Disasm) processParamInstruction(address uint16, offsetInfo *offset) ( // replaceParamByAlias replaces the absolute address with an alias name if it can match it to // a constant, zero page variable or a code reference. -func (dis *Disasm) replaceParamByAlias(address uint16, opcode cpu.Opcode, param any, paramAsString string) string { +func (dis *Disasm) replaceParamByAlias(address uint16, opcode m6502.Opcode, param any, paramAsString string) string { forceVariableUsage := false addressReference, addressValid := getAddressingParam(param) if !addressValid || addressReference >= irqStartAddress { @@ -196,7 +195,7 @@ func (dis *Disasm) addressToDisassemble() uint16 { } // addAddressToParse adds an address to the list to be processed if the address has not been processed yet. -func (dis *Disasm) addAddressToParse(address, context, from uint16, currentInstruction *cpu.Instruction, +func (dis *Disasm) addAddressToParse(address, context, from uint16, currentInstruction *m6502.Instruction, isABranchDestination bool) { // ignore branching into addresses before the code base address, for example when generating code in @@ -288,7 +287,7 @@ func getAddressingParam(param any) (uint16, bool) { // checkBranchingParam checks whether the branching instruction should do a variable check for the parameter // and forces variable usage. -func checkBranchingParam(address uint16, opcode cpu.Opcode) (bool, bool) { +func checkBranchingParam(address uint16, opcode m6502.Opcode) (bool, bool) { switch { case opcode.Instruction.Name == m6502.Jmp.Name && opcode.Addressing == IndirectAddressing: return true, false diff --git a/internal/vars.go b/internal/vars.go index 21dbbe3..3944f95 100644 --- a/internal/vars.go +++ b/internal/vars.go @@ -9,7 +9,6 @@ import ( "github.com/retroenv/retrogolib/arch/cpu/m6502" "github.com/retroenv/retrogolib/arch/nes" "github.com/retroenv/retrogolib/arch/nes/parameter" - "github.com/retroenv/retrogolib/cpu" ) const ( @@ -34,7 +33,7 @@ type variable struct { // the given address directly by reading or writing. In a special case like // branching into a zeropage address the variable usage can be forced. func (dis *Disasm) addVariableReference(addressReference, usageAddress uint16, - opcode cpu.Opcode, forceVariableUsage bool) { + opcode m6502.Opcode, forceVariableUsage bool) { var reads, writes bool if opcode.ReadWritesMemory(m6502.MemoryReadWriteInstructions) {