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info.yaml
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---
# Tiny Tapeout project information
project:
wokwi_id: 0 # If using wokwi, set this to your project's ID
# If using an HDL, set wokwi_id as 0 and uncomment and list your source files here.
# Source files must be in ./src and you must list each source file separately
source_files:
- tt_um_rejunity_rule110.v
top_module: "tt_um_rejunity_rule110" # Put the name of your top module here, must start with "tt_um_". Make it unique by including your github username
# How many tiles your design occupies? A single tile is about 167x108 uM.
tiles: "1x2" # Valid values: 1x1, 1x2, 2x2, 4x2 or 8x2
# Keep a track of the submission yaml
yaml_version: 4
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it. This info will be automatically collected and used to make a datasheet for the chip.
#
# Here is a great example: https://github.com/davidsiaw/tt02-davidsiaw-stackcalc/blob/38c5647f83aad2aec675d566aa3d67b98f0aac81/info.yaml
documentation:
author: "ReJ aka Renaldas Zioma"
title: "Rule110 cell automata"
language: "Verilog"
description: "Cellular automaton based on the Rule 110"
# Longer description of how the project works. You can use standard markdown format.
how_it_works: |
This design executes **over 200 cells** of an elementary cellular automaton **every cycle** applying [Rule 110](https://en.wikipedia.org/wiki/Rule_110) to all of them **in parallel**.
Roughly 115 cells with parallel read/write bus can be placed on 1x1 TinyTapeout tile. Without read/write bus, up to 240 cells fit on a 1x1 tile!
**The edge of chaos** - Rule 110 exhibits complex behavior on the boundary **between stability and chaos**. It could be explored for pseudo random number generator and data compression.
**Gliders** - periodic structures with complex behaviour, universal computation and self-reproduction can be implemented with Rule 110.
**Turing complete** - with a particular repeating background pattern Rule 110 is known to be Turing complete.
This implies that, in principle, **any** calculation or computer program can be simulated using such automaton!
**Definition of Rule 110**
The following rule is applied to each triplet of the neighboring cells. Binary representation 01101110 of 110 defines the transformation pattern.
```
1. Current iteration of the automaton
111 110 101 100 011 010 001 000
| | | | | | | |
v v v v v v v v
2. The next iteration of the automaton
.0. .1. .1. .0. .1. .1. .1. .0.
```
**Interesting links for further reading**
* [Elemental Cellular Automaton Rule 110](http://www.comunidad.escom.ipn.mx/genaro/Rule110.html)
* [Gliders in Rule 110](http://www.comunidad.escom.ipn.mx/genaro/Papers/Papers_on_CA_files/MARTINEZ.pdf)
* [Compression-based investigation of the dynamical properties of cellular automata and other systems](https://arxiv.org/abs/0910.4042)
# Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
how_to_test: |
After **RESET** all cells will be set to 0 except the rightmost that is going to be 1. Automaton will immediately start running.
Automaton produce new state every cycle for all the cells in parallel. One hardware cycle is one iteration of the automaton.
Automaton will run until **/HALT** pin is pulled low.
The following diagram shows 10 first iteration of the automaton after **RESET**.
```
X
XX
XXX
XX X
XXXXX
XX X
XXX XX
XX X XXX
XXXXXXX X
automaton state on the XX XXX
10th iteration after RESET ----> XXX XX X
```
**To read automaton state**
1) pull **/HALT** pin low and 2) set the cell block address pins.
Cells are read in 8 cell blocks and are addressed sequentially from right to left. Adress #0 represents the rightmost 8 cells.
Adress #1 represents the cells from 16 to 9 on the rights and so forth.
```
automaton state on the
10th iteration after RESET ----> XXX XX X
00000000 ... 00000000000000000000011100001101
| | | | | |
[adr#14] ... [addr#3][addr#2][addr#1][addr#0]
cells are addressed in blocks of 8 bits
```
The state of the 8 cells in the block will appear on the **Output** pins once the cell block address is set.
```
Timing diagram
CLK ___ ___ ___ ___ ___ ___ ___
__/ `___/ `___/ `___/ `___/ `___/ `___ ... _/ `___
| | | | | | |
| | | | | | |
WRITE ____ _______
X__HALT__________________________________________ ... _/
WRITE_______________ ______________ _______________
_/ ADDR#0 `/ ADDR#1 `/ ADDR#2
READ OUTPUT_______ ________ ________
______/00001101`_______/00000111`______/00000000`_
^ ^
| |
these are the expected values on
the 10th cycle after RESET
____
HALT - /HALT, inverted halt automata
ADDR# - cell block address bits 0..4
```
**(Over)write automaton state**
To write state of the cells, 1) pull **/HALT** pin low, 2) set the cell block address pins,
3) set the new desired cell state on the **Input** pins and 4) finally pull **/WE** pin low.
Cells are updated in 8 cell blocks and are addressed sequentially from right to left. Adress #0 represents the rightmost 8 cells.
Adress #1 represents the cells from 16 to 9 on the rights and so forth.
```
Timing diagram
CLK ___ ___ ___ ___ ___ ___ ___
__/ `___/ `___/ `___/ `___/ `___/ `___ ... _/ `___
| | | | | | |
| | | | | | |
WRITE ____ _______
X__HALT__________________________________________ ... _/
WRITE_______________ ______________ _______________
_/ ADDR#0 `/ ADDR#1 `/ ADDR#2
WRITE INPUT_________ ______________ _____________
__/ 00000111 `/ 11100110 `/ 11010111 `_
WRITE______ __ ________ __ ________ __ __ ... _________
`_WE___/ `_WE___/ `_WE___/
wait 1 cycle wait 1 cycle
__
____ WE - /WE, inverted write enable
HALT - /HALT, inverted halt automata
ADDR# - cell block address bits 0..4
```
The following diagram shows 10 cycles of automaton after **/HALT** pulled back to high.
```
[adr#14] ... [addr#3][addr#2][addr#1][addr#0]
| | | | | |
00000000 ... 00000000110101111110011000000111
XX X XXXXXX XX XXX
XXXXXXX X XXX XX X
XX X XXXX X XXXXX
XXX XX XX XXX XX X
XX X XXX XXX XX X XXX XX
XXXXX XX XXX XXXXXX XX X XXX
XX X XXXXX XXX XXXXXXXX X
XXX XXXX XXX X XX XXX
XX X XX X XX XXX XXX XX X
10 cyles later -> XXXXXXXX XX XXXXX X XX X XXXXX
```
# A description of what the inputs do
inputs:
- write cell 0 state
- write cell 1 state
- write cell 2 state
- write cell 3 state
- write cell 4 state
- write cell 5 state
- write cell 6 state
- write cell 7 state
# A description of what the outputs do
outputs:
- read cell 0 state
- read cell 1 state
- read cell 2 state
- read cell 3 state
- read cell 4 state
- read cell 5 state
- read cell 6 state
- read cell 7 state
# A description of what the bidirectional I/O pins do (e.g. I2C SDA, I2C SCL, etc)
bidirectional:
- /WE, inverted write enable
- /HALT, inverted halt automata
- ADDR#, cell block address bit 0
- ADDR#, cell block address bit 1
- ADDR#, cell block address bit 2
- ADDR#, cell block address bit 3
- ADDR#, cell block address bit 4
- none
# The following fields are optional
tag: "cell automata, random number generator" # comma separated list of tags: test, encryption, experiment, clock, animation, utility, industrial, pwm, fpga, alu, microprocessor, risc, riscv, sensor, signal generator, fft, filter, music, bcd, sound, serial, timer, random number generator, calculator, decoder, counter, puzzle, multiplier, game, oscillator,
external_hw: "" # Describe any external hardware needed
discord: "rzioma" # Your discord handle, used for communication and automatically assigning tapeout role after a submission
doc_link: "" # URL to longer form documentation, eg the README.md in your repository
clock_hz: 0 # Clock frequency in Hz (if required)
picture: "images/passed48.jpg" # relative path to a picture in your repository (must be 512kb or less)