docker pull nishanthmenon/openocd
Yes - openOCD build and install is rather trivial. I could also alternatively host my own tree and patches. However, I'd rather people be able to "get go" on a platform with the openOCD being the least of their worries. Once the TI K3 patches get upstream, this docker container may not exactly be of value.. but, might be easier to have some basic startup scripts.
You can use one of the following scripts depending on the TI K3 EVM in use:
- am642evm.sh
- am654evm.sh
- j7200evm.sh
- j721evm.sh
In addition for a new SoC, you could also use:
- discover.sh
Overall, openOCD usage looks like this:
v0.11.0-1-g4307d93eb00a
All of TI K3 EVM come with an embedded xds110 onboard, so getting JTAG is just a matter of plugging in USB cable to the EVM. Few examples are below:
CFG file → tcl/board/am6evm.cfg
execute prior to connecting over GDB (since we do not know at any point what cores might be operational)
| Command | Function |
|---|---|
| m3_up | Start debug of DMSC M3 |
| mcu_r5_up 0 | MCU/Main R5 debug of core 0 in split mode or lockstep |
| mcu_r5_up 1 | MCU/Main R5 debug of core 1 in split mode |
| a53_up 0 1 2 3 | A53 in individual debug of core 0 to core 4 |
| a53_smp | A53s in SMP debug mode http://openocd.org/doc/html/GDB-and-OpenOCD.html\#usingopenocdsmpwithgdb |
| Port | Function |
|---|---|
| 3333 | M3 |
| 3334 | A53 Core 0/SMP |
| 3335 | A53 core 1 |
| 3336 | A53 core 2 |
| 3337 | A53 core 3 |
| 3338 | MCU R5 Core 0 (split/lockstep mode) |
| 3339 | MCU R5 core 1 (split mode) |
CFG file → tcl/board/j721evm.cfg
Since none of the cores can be guarenteed to be on any any time → run openocd sudo ../src/openocd -f ./board/j721evm.cfg and telnet localhost 4444 → run one or all of the commands as needed for debug target.
Telnet commands to execute prior to connecting over GDB (since we do not know at any point what cores might be operational)
| Command | Function |
|---|---|
| m3_up | Start debug of DMSC M3 |
| mcu_r5_up 0 | MCU R5 debug of core 0 in split mode or lockstep |
| mcu_r5_up 1 | MCU R5 debug of core 1 in split mode |
| main0_r5_up 0 | Main0 R5 debug of core 0 in split mode or lockstep |
| main0_r5_up 1 | Main0 R5 debug of core 1 in split mode |
| main1_r5_up 0 | Main1 R5 debug of core 0 in split mode or lockstep |
| main1_r5_up 1 | Main1 R5 debug of core 1 in split mode |
| a72_up 0 1 | A72 in individual debug of core 0 to core 4 |
| a72_smp | A72s in SMP debug mode http://openocd.org/doc/html/GDB-and-OpenOCD.html\#usingopenocdsmpwithgdb |
| Port | Function |
|---|---|
| 3333 | M3 |
| 3334 | A72 Core 0/SMP |
| 3335 | A72 core 1 |
| 3336 | MCU R5 Core 0 (split/lockstep mode) |
| 3337 | MCU R5 core 1 (split mode) |
| 3338 | Main0 R5 Core 0 (split/lockstep mode) |
| 3339 | Main0 R5 core 1 (split mode) |
| 3340 | Main1 R5 Core 0 (split/lockstep mode) |
| 3341 | Main1 R5 core 1 (split mode) |
CFG file → tcl/board/j7200evm.cfg
Since none of the cores can be guarenteed to be on any any time → run openocd sudo ../src/openocd -f ./board/j7200evm.cfg and telnet localhost 4444 → run one or all of the commands as needed for debug target.
Telnet commands to execute prior to connecting over GDB (since we do not know at any point what cores might be operational)
| Command | Function |
|---|---|
| m3_up | Start debug of DMSC M3 |
| mcu_r5_up 0 | MCU R5 debug of core 0 in split mode or lockstep |
| mcu_r5_up 1 | MCU R5 debug of core 1 in split mode |
| main0_r5_up 0 | Main0 R5 debug of core 0 in split mode or lockstep |
| main0_r5_up 1 | Main0 R5 debug of core 1 in split mode |
| a72_up 0 1 | A72 in individual debug of core 0 to core 4 |
| a72_smp | A72s in SMP debug mode http://openocd.org/doc/html/GDB-and-OpenOCD.html\#usingopenocdsmpwithgdb |
| Port | Function |
|---|---|
| 3333 | M3 |
| 3334 | A72 Core 0/SMP |
| 3335 | A72 core 1 |
| 3336 | MCU R5 Core 0 (split/lockstep mode) |
| 3337 | MCU R5 core 1 (split mode) |
| 3338 | Main0 R5 Core 0 (split/lockstep mode) |
| 3339 | Main0 R5 core 1 (split mode) |
CFG file → tcl/board/am642evm.cfg
Since none of the cores can be guarenteed to be on any any time → run openocd sudo ../src/openocd -f ./board/am642evm.cfg and telnet localhost 4444 → run one or all of the commands as needed for debug target.
Telnet commands to execute prior to connecting over GDB (since we do not know at any point what cores might be operational)
| Command | Function |
|---|---|
| m3_up | Start debug of DMSC M3 |
| main0_r5_up 0 | Main0 R5 debug of core 0 in split mode or lockstep |
| main0_r5_up 1 | Main0 R5 debug of core 1 in split mode |
| main1_r5_up 0 | Main1 R5 debug of core 0 in split mode or lockstep |
| main1_r5_up 1 | Main1 R5 debug of core 1 in split mode |
| a53_up 0 1 | A53 in individual debug of core 0 to core 4 |
| a53_smp | A53s in SMP debug mode http://openocd.org/doc/html/GDB-and-OpenOCD.html\#usingopenocdsmpwithgdb |
| m4_up | Start debug of MCU M4 |
| Port | Function |
|---|---|
| 3333 | M3 |
| 3334 | A53 Core 0/SMP |
| 3335 | A53 core 1 |
| 3336 | Main0 R5 Core 0 (split/lockstep mode) |
| 3337 | Main0 R5 core 1 (split mode) |
| 3338 | Main1 R5 Core 0 (split/lockstep mode) |
| 3339 | Main1 R5 core 1 (split mode) |
| 3340 | MCU M4F |
(to M3):
Your browser does not support the HTML5 video element
openocd-debug.mp4
to A72 uboot:
Your browser does not support the HTML5 video element
openocd-debug-uboot.mp4
gdb-dash.webm
https://github.com/cyrus-and/gdb-dashboard
wget -P ~ git.io/.gdbinit; mv ~/.gdbinit ~/.gdb-dashboard
arm-linux-gnueabihf-gdb --eval-command="target remote localhost:3333" ti-sci-firmware-am65x-gp.elf
source ~/.gdb-dashboard
https://github.com/hugsy/gef
https://github.com/longld/peda
https://github.com/pwndbg/pwndbg
https://github.com/snare/voltron
GDB (DDD startup):
ddd --eval-command="target remote localhost:3333" --debugger aarch64-linux-gnu-gdb /home/nmenon/Src/TI_Prop/KS3/KS3FS/linux/vmlinux
Config file:
$ cat /tmp/t32.gdb
PBI=GDB
OS=
SCREEN=
FONT=SMALL
HEADER=TRACE32 For PowerView for ARMV8[A53/A72..] on GDB
OR
t32 -m gdb -7
or
t32 -m gdb -8
Pictures (using openocd and t32 as gdb interface):
U-boot A72
Linux A72:
All R5s in lockstep:
DMSC (SYSFW) M3: