Avoid wide signals in sensitivity lists of immediate assertions #269
Workflow file for this run
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name: lint | |
on: [ push, pull_request, workflow_dispatch ] | |
jobs: | |
################ | |
# Verible Lint # | |
################ | |
verilog: | |
name: Verilog Sources | |
# This job runs on Linux (fixed ubuntu version) | |
runs-on: ubuntu-latest | |
steps: | |
- uses: actions/checkout@v3 | |
- uses: chipsalliance/verible-linter-action@main | |
with: | |
paths: | | |
./src | |
exclude_paths: | | |
./src/deprecated | |
extra_args: "--waiver_files lint/common_cells.style.waiver --rules=-interface-name-style --lint_fatal" | |
github_token: ${{ secrets.GITHUB_TOKEN }} | |
reviewdog_reporter: github-check |