From 67b099f4923dfe0ce5b230a0b9d24d17ee1514f4 Mon Sep 17 00:00:00 2001
From: "sem24h18 Fabian Hauser (fhauser)"
 <146116057+fhaus1@users.noreply.github.com>
Date: Wed, 11 Dec 2024 18:30:19 +0100
Subject: [PATCH] add testbench check memory format

---
 hw/newusb_tb/tb_new_usb.mem      |  6 +++---
 hw/newusb_tb/tb_new_usb.sv       | 16 +++++++++-------
 target/sim/vsim/start.newusb.tcl |  6 ++++--
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/hw/newusb_tb/tb_new_usb.mem b/hw/newusb_tb/tb_new_usb.mem
index a1219ba2..dbc5ae1c 100644
--- a/hw/newusb_tb/tb_new_usb.mem
+++ b/hw/newusb_tb/tb_new_usb.mem
@@ -6,7 +6,7 @@
 // 
 /// Address memory map for the testbench. The system has byte-addressable memory.
 /// All descriptors are 16-byte aligned, except isochronous TDs are 32-byte aligned.
-/// All values are in hexadecimal and will be stored LsB first. 
+/// All values are in hexadecimal and will be stored LsB first by the testbench. 
 /// Isochrounous TDs need to be loaded in two separate lines.
 /// Use the python script to generate connected EDs and TDs linked lists
 /// and insert them down below.
@@ -14,5 +14,5 @@
 /// Format:   @Address dword0 dword1 dword2 dword3
 /// Size:     (Address AxiAddrWidth) (dword 32bit)
 
-@0000A000 0000000A 0000000B 0000000C 0000000D
-@0000ABCD 00000001 00000002 00000003 00000004
\ No newline at end of file
+@0000A000 0000000D 0000000C 0000000B 0000000A
+@0000ABC0 00000004 00000003 00000002 00000001
\ No newline at end of file
diff --git a/hw/newusb_tb/tb_new_usb.sv b/hw/newusb_tb/tb_new_usb.sv
index 34c07e7c..aaa68932 100644
--- a/hw/newusb_tb/tb_new_usb.sv
+++ b/hw/newusb_tb/tb_new_usb.sv
@@ -40,7 +40,7 @@ module tb_new_usb #(
   logic [31:0] dword [3:0];
   reg [7:0] mem [logic [AxiAddrWidth-1:0]];
   integer file, status, i, j;
-  string line;
+  string line, rest;
   
   initial begin
       
@@ -60,9 +60,13 @@ module tb_new_usb #(
               continue;
           end
           // Try to parse the address and data
-          status = $sscanf(line, "@%h %h %h %h %h", address, dword[0], dword[1], dword[2], dword[3]);
-          
-          if (status == 5) begin  // Successfully read 5 values
+          status = $sscanf(line, "@%h %h %h %h %h%s", address, dword[0], dword[1], dword[2], dword[3], rest);
+
+          if (status == 5) begin  // Successfully read exactly 5 values
+              if ((address & 4'hF) != 0) begin
+                  $display("Not 16 Byte aligned address in line: %s", line);
+                  $stop;
+              end
               for (i = 0; i < 4; i++) begin
                   mem[address + i * 4 + 0] = dword[i][7:0];    // LSB to lowest address
                   mem[address + i * 4 + 1] = dword[i][15:8];   
@@ -70,11 +74,10 @@ module tb_new_usb #(
                   mem[address + i * 4 + 3] = dword[i][31:24];  // MSB to highest address
                   $display("Written into mem: @%h %h", address + i*4, dword[i]);
               end
-          end 
+          end
           else begin
               $display("Invalid data format in line: %s", line);
           end
-  
           if ($feof(file)) begin
               break;
           end
@@ -82,7 +85,6 @@ module tb_new_usb #(
   
       $fclose(file);
       #1000;
-      $finish;
   end
   
       //axi_lite_to_axi #(
diff --git a/target/sim/vsim/start.newusb.tcl b/target/sim/vsim/start.newusb.tcl
index aa2475fc..f858d37c 100755
--- a/target/sim/vsim/start.newusb.tcl
+++ b/target/sim/vsim/start.newusb.tcl
@@ -6,7 +6,9 @@
 
 set TESTBENCH tb_new_usb
 
+set StdArithNoWarnings 1
+set NumericStdNoWarnings 1
+
 eval vsim -c ${TESTBENCH} -t 1ps -vopt -voptargs="+acc"
 
-set StdArithNoWarnings 1
-set NumericStdNoWarnings 1
\ No newline at end of file
+run 1us
\ No newline at end of file