From 9cc6ce4a565ac9fb8f0760f9bf53e740d04f94de Mon Sep 17 00:00:00 2001 From: Weifeng Liu Date: Tue, 13 Aug 2024 06:50:48 +0000 Subject: [PATCH 1/2] Make Android specific code specific to Android We have some code specific to Android only and it should be built only on Android so that this code base could possibly be built on GNU/Linux systems. Also replace \xC2\xA0 (non-breaking space) with normal space for consistence. Signed-off-by: Weifeng Liu --- src/egl/drivers/dri2/egl_dri2.c | 2 ++ src/intel/common/intel_check.c | 34 +++++++++++++++--------------- src/intel/common/intel_check.h | 1 - src/intel/common/meson.build | 9 ++++++-- src/intel/vulkan/anv_device.c | 4 ++++ src/intel/vulkan/i915/anv_device.c | 4 +++- 6 files changed, 33 insertions(+), 21 deletions(-) diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index 510b23e4e20..a957b3dd710 100644 --- a/src/egl/drivers/dri2/egl_dri2.c +++ b/src/egl/drivers/dri2/egl_dri2.c @@ -1557,9 +1557,11 @@ dri2_create_context(_EGLDisplay *disp, _EGLConfig *conf, } else dri_config = NULL; +#ifdef HAVE_ANDROID_PLATFORM if (intel_lower_ctx_priority()) { dri2_ctx->base.ContextPriority = EGL_CONTEXT_PRIORITY_LOW_IMG; } +#endif if (!dri2_fill_context_attribs(dri2_ctx, dri2_dpy, ctx_attribs, &num_attribs)) diff --git a/src/intel/common/intel_check.c b/src/intel/common/intel_check.c index 42b679251aa..64d3cd3be4f 100644 --- a/src/intel/common/intel_check.c +++ b/src/intel/common/intel_check.c @@ -40,14 +40,14 @@ get_pid_name(pid_t pid, char *task_name) static bool use_dgpu_render(char *target) { -   char dGPU_prop[BUF_SIZE]; -   char vendor_buf[PROPERTY_VALUE_MAX]; -   sprintf(dGPU_prop, "persist.vendor.intel.dGPU.%s",target); -   if (property_get(dGPU_prop, vendor_buf, NULL) > 0) { -      if (vendor_buf[0] == '1') { -         return true; -      } -   } + char dGPU_prop[BUF_SIZE]; + char vendor_buf[PROPERTY_VALUE_MAX]; + sprintf(dGPU_prop, "persist.vendor.intel.dGPU.%s", target); + if (property_get(dGPU_prop, vendor_buf, NULL) > 0) { + if (vendor_buf[0] == '1') { + return true; + } + } return false; } @@ -86,18 +86,18 @@ bool intel_lower_ctx_priority(void) char process_name[BUF_SIZE]; get_pid_name(process_id, process_name); -   char lower_pri[BUF_SIZE]; -   char vendor_buf[PROPERTY_VALUE_MAX]; -   sprintf(lower_pri, "persist.vendor.intel.lowPir.%s",process_name); -   if (property_get(lower_pri, vendor_buf, NULL) > 0) { -      if (vendor_buf[0] == '1') { -         return true; -      } -   } + char lower_pri[BUF_SIZE]; + char vendor_buf[PROPERTY_VALUE_MAX]; + sprintf(lower_pri, "persist.vendor.intel.lowPir.%s",process_name); + if (property_get(lower_pri, vendor_buf, NULL) > 0) { + if (vendor_buf[0] == '1') { + return true; + } + } return false; } -bool has_local_mem(int fd) +static bool has_local_mem(int fd) { struct drm_i915_query_item item = { .query_id = DRM_I915_QUERY_MEMORY_REGIONS, diff --git a/src/intel/common/intel_check.h b/src/intel/common/intel_check.h index a6a0e519e5d..90db0a6429c 100644 --- a/src/intel/common/intel_check.h +++ b/src/intel/common/intel_check.h @@ -8,7 +8,6 @@ extern "C" { bool intel_is_dgpu_render(void); bool intel_lower_ctx_priority(void); bool is_dgpu(int id); -bool has_local_mem(int fd); int get_intel_node_num(void); #ifdef __cplusplus } diff --git a/src/intel/common/meson.build b/src/intel/common/meson.build index 9bbcc3a5042..febbbd36e3b 100644 --- a/src/intel/common/meson.build +++ b/src/intel/common/meson.build @@ -56,8 +56,6 @@ files_libintel_common = files( 'intel_mem.c', 'intel_mem.h', 'intel_pixel_hash.h', - 'intel_check.c', - 'intel_check.h', ) files_batch_decoder = files( @@ -86,6 +84,13 @@ batch_decoder_dependencies = [] files_libintel_common += files_batch_decoder #endif +if with_platform_android + files_libintel_common += files( + 'intel_check.c', + 'intel_check.h', + ) +endif + libintel_common = static_library( 'intel_common', [files_libintel_common, genX_xml_h, sha1_h], diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 13f534934f9..d16eee0ca95 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -61,7 +61,9 @@ #include "common/intel_aux_map.h" #include "common/intel_uuid.h" #include "common/i915/intel_gem.h" +#ifdef ANDROID #include "common/intel_check.h" +#endif #include "perf/intel_perf.h" #include "i915/anv_device.h" @@ -2170,6 +2172,7 @@ anv_physical_device_try_create(struct vk_instance *vk_instance, goto fail_fd; } +#ifdef ANDROID if (get_intel_node_num() > 1) { if (!is_dgpu(fd) && intel_is_dgpu_render()) { result = VK_ERROR_INCOMPATIBLE_DRIVER; @@ -2181,6 +2184,7 @@ anv_physical_device_try_create(struct vk_instance *vk_instance, goto fail_fd; } } +#endif if (devinfo.ver == 20) { mesa_logw("Vulkan not yet supported on %s", devinfo.name); diff --git a/src/intel/vulkan/i915/anv_device.c b/src/intel/vulkan/i915/anv_device.c index 68efd4caeaa..6746957608a 100644 --- a/src/intel/vulkan/i915/anv_device.c +++ b/src/intel/vulkan/i915/anv_device.c @@ -256,6 +256,7 @@ anv_i915_set_queue_parameters( } } +#ifdef ANDROID if (intel_lower_ctx_priority()) { int ret = anv_gem_set_context_param(device->fd, device->context_id, I915_CONTEXT_PARAM_PRIORITY, @@ -263,7 +264,8 @@ anv_i915_set_queue_parameters( if (ret != 0) { return vk_error(device, VK_ERROR_INITIALIZATION_FAILED); } -} + } +#endif return VK_SUCCESS; } From 70a48a7a0e94feb749f17a7ab07707270a514c90 Mon Sep 17 00:00:00 2001 From: Weifeng Liu Date: Tue, 20 Aug 2024 06:18:13 +0000 Subject: [PATCH 2/2] android: Open dGPU for composition in surfaceflinger When we have both dGPU and iGPU available, prefer dGPU for compositing because dGPU can cover more cases for us, e.g., allocating buffers in device memory. As a side work, also format the surrounding code for consistency. Tracked-On: OAM-124060 Signed-off-by: Weifeng Liu --- src/intel/common/intel_check.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/src/intel/common/intel_check.c b/src/intel/common/intel_check.c index 64d3cd3be4f..624cea00a42 100644 --- a/src/intel/common/intel_check.c +++ b/src/intel/common/intel_check.c @@ -52,17 +52,21 @@ use_dgpu_render(char *target) } static bool -is_target_process(char *target) +is_target_process(const char *target) { - char *str_char[] = { "k.lite:refinery", "k.lite:transfer", NULL }; - char **ptr = str_char; + static const char *str_char[] = { "k.lite:refinery", "k.lite:transfer", NULL }; + const char **ptr = str_char; - for (ptr=str_char; *ptr!=NULL; ptr++) - { - if(!strcmp(target, *ptr)) { + // Prefer dGPU for compositing in surfaceflinger since dGPU covers more + // scenarios than iGPU. + if (!strcmp(target, "surfaceflinger")) + return true; + + for (ptr = str_char; *ptr != NULL; ptr++) { + if (!strcmp(target, *ptr)) { char vendor_buf[PROPERTY_VALUE_MAX]; if (property_get("persist.vendor.intel.dGPU.ABenchMark.lite", - vendor_buf, NULL) > 0) { + vendor_buf, NULL) > 0) { if (vendor_buf[0] == '1') { return true; } @@ -72,7 +76,8 @@ is_target_process(char *target) return false; } -bool intel_is_dgpu_render(void) { +bool intel_is_dgpu_render(void) +{ pid_t process_id = getpid(); char process_name[BUF_SIZE];