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build.ninja
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# 0.1/base
rule 0_1_base_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/base/ferris.kicad_pcb build/0.1/base/ferris_front.svg
build build/0.1/base/ferris_front.svg: 0_1_base_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/base/ferris.kicad_pcb
rule 0_1_base_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/base/ferris.kicad_pcb build/0.1/base/ferris_back.svg --back
build build/0.1/base/ferris_back.svg: 0_1_base_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/base/ferris.kicad_pcb
rule 0_1_base_ibom
command = ./automation/run_ibom.sh 0.1/base
build build/0.1/base/ibom.html: 0_1_base_ibom ./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.1/base/ferris.kicad_pcb 0.1/base/ferris.xml
rule 0_1_base_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/base/ferris.xml build/0.1/base/bom_jlcpcb.csv
build build/0.1/base/bom_jlcpcb.csv: 0_1_base_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/base/ferris.xml
rule 0_1_base_pos
command = python3 ./automation/tools/generate_pos.py $
0.1/base/ferris.kicad_pcb > build/0.1/base/pos.csv
build build/0.1/base/pos.csv: 0_1_base_pos $
./automation/tools/generate_pos.py 0.1/base/ferris.kicad_pcb
rule 0_1_base_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/base/pos.csv build/0.1/base/cpl.csv
build build/0.1/base/cpl.csv: 0_1_base_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/base/pos.csv 0.1/base/ferris.kicad_pcb
rule 0_1_base_erc
command = ./automation/run_erc.sh 0.1/base/ferris.sch
build build/0.1/base/ferris.sch.erc_success: 0_1_base_erc $
./automation/run_erc.sh 0.1/base/ferris.sch
rule 0_1_base_ferris_drc
command = ./automation/run_drc.sh 0.1/base/ferris.kicad_pcb
build build/0.1/base/ferris.kicad_pcb.drc_success: 0_1_base_ferris_drc $
./automation/run_drc.sh 0.1/base/ferris.kicad_pcb
rule 0_1_base_gerbers
command = mkdir -p build/0.1/base && kiplot -b 0.1/base/ferris.kicad_pcb $
-c .kiplot.yml -d build/0.1/base
build build/0.1/base/ferris-B_Cu.gbr build/0.1/base/ferris-B_Mask.gbr $
build/0.1/base/ferris-B_Paste.gbr build/0.1/base/ferris-B_SilkS.gbr $
build/0.1/base/ferris-B_Fab.gbr build/0.1/base/ferris-Edge_Cuts.gbr $
build/0.1/base/ferris-F_Cu.gbr build/0.1/base/ferris-F_Mask.gbr $
build/0.1/base/ferris-F_Paste.gbr build/0.1/base/ferris-F_SilkS.gbr $
build/0.1/base/ferris-F_Fab.gbr build/0.1/base/ferris-NPTH-drl_map.gbr $
build/0.1/base/ferris-NPTH.drl build/0.1/base/ferris-PTH-drl_map.gbr $
build/0.1/base/ferris-PTH.drl: 0_1_base_gerbers .kiplot.yml $
0.1/base/ferris.kicad_pcb
rule 0_1_base_gerbers_zip
command = zip -q -j -r build/0.1/base/gerbers.zip $
build/0.1/base/ferris-B_Cu.gbr build/0.1/base/ferris-B_Mask.gbr $
build/0.1/base/ferris-B_Paste.gbr build/0.1/base/ferris-B_SilkS.gbr $
build/0.1/base/ferris-B_Fab.gbr build/0.1/base/ferris-Edge_Cuts.gbr $
build/0.1/base/ferris-F_Cu.gbr build/0.1/base/ferris-F_Mask.gbr $
build/0.1/base/ferris-F_Paste.gbr build/0.1/base/ferris-F_SilkS.gbr $
build/0.1/base/ferris-F_Fab.gbr $
build/0.1/base/ferris-NPTH-drl_map.gbr build/0.1/base/ferris-NPTH.drl $
build/0.1/base/ferris-PTH-drl_map.gbr build/0.1/base/ferris-PTH.drl
build build/0.1/base/gerbers.zip: 0_1_base_gerbers_zip $
build/0.1/base/ferris.sch.erc_success $
build/0.1/base/ferris.kicad_pcb.drc_success $
build/0.1/base/ferris-B_Cu.gbr build/0.1/base/ferris-B_Mask.gbr $
build/0.1/base/ferris-B_Paste.gbr build/0.1/base/ferris-B_SilkS.gbr $
build/0.1/base/ferris-B_Fab.gbr build/0.1/base/ferris-Edge_Cuts.gbr $
build/0.1/base/ferris-F_Cu.gbr build/0.1/base/ferris-F_Mask.gbr $
build/0.1/base/ferris-F_Paste.gbr build/0.1/base/ferris-F_SilkS.gbr $
build/0.1/base/ferris-F_Fab.gbr build/0.1/base/ferris-NPTH-drl_map.gbr $
build/0.1/base/ferris-NPTH.drl build/0.1/base/ferris-PTH-drl_map.gbr $
build/0.1/base/ferris-PTH.drl
build 0.1/base: phony build/0.1/base/gerbers.zip $
build/0.1/base/ferris_front.svg build/0.1/base/ferris_back.svg $
build/0.1/base/ibom.html build/0.1/base/bom_jlcpcb.csv $
build/0.1/base/cpl.csv
# 0.1/compact
rule 0_1_compact_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/compact/ferris.kicad_pcb build/0.1/compact/ferris_front.svg
build build/0.1/compact/ferris_front.svg: 0_1_compact_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/compact/ferris.kicad_pcb
rule 0_1_compact_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/compact/ferris.kicad_pcb build/0.1/compact/ferris_back.svg --back
build build/0.1/compact/ferris_back.svg: 0_1_compact_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.1/compact/ferris.kicad_pcb
rule 0_1_compact_ibom
command = ./automation/run_ibom.sh 0.1/compact
build build/0.1/compact/ibom.html: 0_1_compact_ibom $
./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.1/compact/ferris.kicad_pcb 0.1/compact/ferris.xml
rule 0_1_compact_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/compact/ferris.xml build/0.1/compact/bom_jlcpcb.csv
build build/0.1/compact/bom_jlcpcb.csv: 0_1_compact_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/compact/ferris.xml
rule 0_1_compact_pos
command = python3 ./automation/tools/generate_pos.py $
0.1/compact/ferris.kicad_pcb > build/0.1/compact/pos.csv
build build/0.1/compact/pos.csv: 0_1_compact_pos $
./automation/tools/generate_pos.py 0.1/compact/ferris.kicad_pcb
rule 0_1_compact_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/compact/pos.csv build/0.1/compact/cpl.csv
build build/0.1/compact/cpl.csv: 0_1_compact_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/compact/pos.csv 0.1/compact/ferris.kicad_pcb
rule 0_1_compact_erc
command = ./automation/run_erc.sh 0.1/compact/ferris.sch
build build/0.1/compact/ferris.sch.erc_success: 0_1_compact_erc $
./automation/run_erc.sh 0.1/compact/ferris.sch
rule 0_1_compact_ferris_drc
command = ./automation/run_drc.sh 0.1/compact/ferris.kicad_pcb
build build/0.1/compact/ferris.kicad_pcb.drc_success: $
0_1_compact_ferris_drc ./automation/run_drc.sh $
0.1/compact/ferris.kicad_pcb
rule 0_1_compact_gerbers
command = mkdir -p build/0.1/compact && kiplot -b $
0.1/compact/ferris.kicad_pcb -c .kiplot.yml -d build/0.1/compact
build build/0.1/compact/ferris-B_Cu.gbr build/0.1/compact/ferris-B_Mask.gbr $
build/0.1/compact/ferris-B_Paste.gbr $
build/0.1/compact/ferris-B_SilkS.gbr build/0.1/compact/ferris-B_Fab.gbr $
build/0.1/compact/ferris-Edge_Cuts.gbr $
build/0.1/compact/ferris-F_Cu.gbr build/0.1/compact/ferris-F_Mask.gbr $
build/0.1/compact/ferris-F_Paste.gbr $
build/0.1/compact/ferris-F_SilkS.gbr build/0.1/compact/ferris-F_Fab.gbr $
build/0.1/compact/ferris-NPTH-drl_map.gbr $
build/0.1/compact/ferris-NPTH.drl $
build/0.1/compact/ferris-PTH-drl_map.gbr $
build/0.1/compact/ferris-PTH.drl: 0_1_compact_gerbers .kiplot.yml $
0.1/compact/ferris.kicad_pcb
rule 0_1_compact_gerbers_zip
command = zip -q -j -r build/0.1/compact/gerbers.zip $
build/0.1/compact/ferris-B_Cu.gbr build/0.1/compact/ferris-B_Mask.gbr $
build/0.1/compact/ferris-B_Paste.gbr $
build/0.1/compact/ferris-B_SilkS.gbr $
build/0.1/compact/ferris-B_Fab.gbr $
build/0.1/compact/ferris-Edge_Cuts.gbr $
build/0.1/compact/ferris-F_Cu.gbr build/0.1/compact/ferris-F_Mask.gbr $
build/0.1/compact/ferris-F_Paste.gbr $
build/0.1/compact/ferris-F_SilkS.gbr $
build/0.1/compact/ferris-F_Fab.gbr $
build/0.1/compact/ferris-NPTH-drl_map.gbr $
build/0.1/compact/ferris-NPTH.drl $
build/0.1/compact/ferris-PTH-drl_map.gbr $
build/0.1/compact/ferris-PTH.drl
build build/0.1/compact/gerbers.zip: 0_1_compact_gerbers_zip $
build/0.1/compact/ferris.sch.erc_success $
build/0.1/compact/ferris.kicad_pcb.drc_success $
build/0.1/compact/ferris-B_Cu.gbr build/0.1/compact/ferris-B_Mask.gbr $
build/0.1/compact/ferris-B_Paste.gbr $
build/0.1/compact/ferris-B_SilkS.gbr build/0.1/compact/ferris-B_Fab.gbr $
build/0.1/compact/ferris-Edge_Cuts.gbr $
build/0.1/compact/ferris-F_Cu.gbr build/0.1/compact/ferris-F_Mask.gbr $
build/0.1/compact/ferris-F_Paste.gbr $
build/0.1/compact/ferris-F_SilkS.gbr build/0.1/compact/ferris-F_Fab.gbr $
build/0.1/compact/ferris-NPTH-drl_map.gbr $
build/0.1/compact/ferris-NPTH.drl $
build/0.1/compact/ferris-PTH-drl_map.gbr build/0.1/compact/ferris-PTH.drl
build 0.1/compact: phony build/0.1/compact/gerbers.zip $
build/0.1/compact/ferris_front.svg build/0.1/compact/ferris_back.svg $
build/0.1/compact/ibom.html build/0.1/compact/bom_jlcpcb.csv $
build/0.1/compact/cpl.csv
# 0.1/high
rule 0_1_high_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.1/high/ferris.kicad_pcb build/0.1/high/ferris_front.svg
build build/0.1/high/ferris_front.svg: 0_1_high_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.1/high/ferris.kicad_pcb
rule 0_1_high_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.1/high/ferris.kicad_pcb build/0.1/high/ferris_back.svg --back
build build/0.1/high/ferris_back.svg: 0_1_high_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.1/high/ferris.kicad_pcb
rule 0_1_high_ibom
command = ./automation/run_ibom.sh 0.1/high
build build/0.1/high/ibom.html: 0_1_high_ibom ./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.1/high/ferris.kicad_pcb 0.1/high/ferris.xml
rule 0_1_high_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/high/ferris.xml build/0.1/high/bom_jlcpcb.csv
build build/0.1/high/bom_jlcpcb.csv: 0_1_high_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/high/ferris.xml
rule 0_1_high_pos
command = python3 ./automation/tools/generate_pos.py $
0.1/high/ferris.kicad_pcb > build/0.1/high/pos.csv
build build/0.1/high/pos.csv: 0_1_high_pos $
./automation/tools/generate_pos.py 0.1/high/ferris.kicad_pcb
rule 0_1_high_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/high/pos.csv build/0.1/high/cpl.csv
build build/0.1/high/cpl.csv: 0_1_high_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/high/pos.csv 0.1/high/ferris.kicad_pcb
rule 0_1_high_erc
command = ./automation/run_erc.sh 0.1/high/ferris.sch
build build/0.1/high/ferris.sch.erc_success: 0_1_high_erc $
./automation/run_erc.sh 0.1/high/ferris.sch
rule 0_1_high_ferris_drc
command = ./automation/run_drc.sh 0.1/high/ferris.kicad_pcb
build build/0.1/high/ferris.kicad_pcb.drc_success: 0_1_high_ferris_drc $
./automation/run_drc.sh 0.1/high/ferris.kicad_pcb
rule 0_1_high_gerbers
command = mkdir -p build/0.1/high && kiplot -b 0.1/high/ferris.kicad_pcb $
-c .kiplot.yml -d build/0.1/high
build build/0.1/high/ferris-B_Cu.gbr build/0.1/high/ferris-B_Mask.gbr $
build/0.1/high/ferris-B_Paste.gbr build/0.1/high/ferris-B_SilkS.gbr $
build/0.1/high/ferris-B_Fab.gbr build/0.1/high/ferris-Edge_Cuts.gbr $
build/0.1/high/ferris-F_Cu.gbr build/0.1/high/ferris-F_Mask.gbr $
build/0.1/high/ferris-F_Paste.gbr build/0.1/high/ferris-F_SilkS.gbr $
build/0.1/high/ferris-F_Fab.gbr build/0.1/high/ferris-NPTH-drl_map.gbr $
build/0.1/high/ferris-NPTH.drl build/0.1/high/ferris-PTH-drl_map.gbr $
build/0.1/high/ferris-PTH.drl: 0_1_high_gerbers .kiplot.yml $
0.1/high/ferris.kicad_pcb
rule 0_1_high_gerbers_zip
command = zip -q -j -r build/0.1/high/gerbers.zip $
build/0.1/high/ferris-B_Cu.gbr build/0.1/high/ferris-B_Mask.gbr $
build/0.1/high/ferris-B_Paste.gbr build/0.1/high/ferris-B_SilkS.gbr $
build/0.1/high/ferris-B_Fab.gbr build/0.1/high/ferris-Edge_Cuts.gbr $
build/0.1/high/ferris-F_Cu.gbr build/0.1/high/ferris-F_Mask.gbr $
build/0.1/high/ferris-F_Paste.gbr build/0.1/high/ferris-F_SilkS.gbr $
build/0.1/high/ferris-F_Fab.gbr $
build/0.1/high/ferris-NPTH-drl_map.gbr build/0.1/high/ferris-NPTH.drl $
build/0.1/high/ferris-PTH-drl_map.gbr build/0.1/high/ferris-PTH.drl
build build/0.1/high/gerbers.zip: 0_1_high_gerbers_zip $
build/0.1/high/ferris.sch.erc_success $
build/0.1/high/ferris.kicad_pcb.drc_success $
build/0.1/high/ferris-B_Cu.gbr build/0.1/high/ferris-B_Mask.gbr $
build/0.1/high/ferris-B_Paste.gbr build/0.1/high/ferris-B_SilkS.gbr $
build/0.1/high/ferris-B_Fab.gbr build/0.1/high/ferris-Edge_Cuts.gbr $
build/0.1/high/ferris-F_Cu.gbr build/0.1/high/ferris-F_Mask.gbr $
build/0.1/high/ferris-F_Paste.gbr build/0.1/high/ferris-F_SilkS.gbr $
build/0.1/high/ferris-F_Fab.gbr build/0.1/high/ferris-NPTH-drl_map.gbr $
build/0.1/high/ferris-NPTH.drl build/0.1/high/ferris-PTH-drl_map.gbr $
build/0.1/high/ferris-PTH.drl
build 0.1/high: phony build/0.1/high/gerbers.zip $
build/0.1/high/ferris_front.svg build/0.1/high/ferris_back.svg $
build/0.1/high/ibom.html build/0.1/high/bom_jlcpcb.csv $
build/0.1/high/cpl.csv
# 0.1/low
rule 0_1_low_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.1/low/ferris.kicad_pcb build/0.1/low/ferris_front.svg
build build/0.1/low/ferris_front.svg: 0_1_low_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.1/low/ferris.kicad_pcb
rule 0_1_low_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.1/low/ferris.kicad_pcb build/0.1/low/ferris_back.svg --back
build build/0.1/low/ferris_back.svg: 0_1_low_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.1/low/ferris.kicad_pcb
rule 0_1_low_ibom
command = ./automation/run_ibom.sh 0.1/low
build build/0.1/low/ibom.html: 0_1_low_ibom ./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.1/low/ferris.kicad_pcb 0.1/low/ferris.xml
rule 0_1_low_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/low/ferris.xml build/0.1/low/bom_jlcpcb.csv
build build/0.1/low/bom_jlcpcb.csv: 0_1_low_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.1/low/ferris.xml
rule 0_1_low_pos
command = python3 ./automation/tools/generate_pos.py $
0.1/low/ferris.kicad_pcb > build/0.1/low/pos.csv
build build/0.1/low/pos.csv: 0_1_low_pos ./automation/tools/generate_pos.py $
0.1/low/ferris.kicad_pcb
rule 0_1_low_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/low/pos.csv build/0.1/low/cpl.csv
build build/0.1/low/cpl.csv: 0_1_low_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.1/low/pos.csv 0.1/low/ferris.kicad_pcb
rule 0_1_low_erc
command = ./automation/run_erc.sh 0.1/low/ferris.sch
build build/0.1/low/ferris.sch.erc_success: 0_1_low_erc $
./automation/run_erc.sh 0.1/low/ferris.sch
rule 0_1_low_ferris_drc
command = ./automation/run_drc.sh 0.1/low/ferris.kicad_pcb
build build/0.1/low/ferris.kicad_pcb.drc_success: 0_1_low_ferris_drc $
./automation/run_drc.sh 0.1/low/ferris.kicad_pcb
rule 0_1_low_gerbers
command = mkdir -p build/0.1/low && kiplot -b 0.1/low/ferris.kicad_pcb -c $
.kiplot.yml -d build/0.1/low
build build/0.1/low/ferris-B_Cu.gbr build/0.1/low/ferris-B_Mask.gbr $
build/0.1/low/ferris-B_Paste.gbr build/0.1/low/ferris-B_SilkS.gbr $
build/0.1/low/ferris-B_Fab.gbr build/0.1/low/ferris-Edge_Cuts.gbr $
build/0.1/low/ferris-F_Cu.gbr build/0.1/low/ferris-F_Mask.gbr $
build/0.1/low/ferris-F_Paste.gbr build/0.1/low/ferris-F_SilkS.gbr $
build/0.1/low/ferris-F_Fab.gbr build/0.1/low/ferris-NPTH-drl_map.gbr $
build/0.1/low/ferris-NPTH.drl build/0.1/low/ferris-PTH-drl_map.gbr $
build/0.1/low/ferris-PTH.drl: 0_1_low_gerbers .kiplot.yml $
0.1/low/ferris.kicad_pcb
rule 0_1_low_gerbers_zip
command = zip -q -j -r build/0.1/low/gerbers.zip $
build/0.1/low/ferris-B_Cu.gbr build/0.1/low/ferris-B_Mask.gbr $
build/0.1/low/ferris-B_Paste.gbr build/0.1/low/ferris-B_SilkS.gbr $
build/0.1/low/ferris-B_Fab.gbr build/0.1/low/ferris-Edge_Cuts.gbr $
build/0.1/low/ferris-F_Cu.gbr build/0.1/low/ferris-F_Mask.gbr $
build/0.1/low/ferris-F_Paste.gbr build/0.1/low/ferris-F_SilkS.gbr $
build/0.1/low/ferris-F_Fab.gbr build/0.1/low/ferris-NPTH-drl_map.gbr $
build/0.1/low/ferris-NPTH.drl build/0.1/low/ferris-PTH-drl_map.gbr $
build/0.1/low/ferris-PTH.drl
build build/0.1/low/gerbers.zip: 0_1_low_gerbers_zip $
build/0.1/low/ferris.sch.erc_success $
build/0.1/low/ferris.kicad_pcb.drc_success $
build/0.1/low/ferris-B_Cu.gbr build/0.1/low/ferris-B_Mask.gbr $
build/0.1/low/ferris-B_Paste.gbr build/0.1/low/ferris-B_SilkS.gbr $
build/0.1/low/ferris-B_Fab.gbr build/0.1/low/ferris-Edge_Cuts.gbr $
build/0.1/low/ferris-F_Cu.gbr build/0.1/low/ferris-F_Mask.gbr $
build/0.1/low/ferris-F_Paste.gbr build/0.1/low/ferris-F_SilkS.gbr $
build/0.1/low/ferris-F_Fab.gbr build/0.1/low/ferris-NPTH-drl_map.gbr $
build/0.1/low/ferris-NPTH.drl build/0.1/low/ferris-PTH-drl_map.gbr $
build/0.1/low/ferris-PTH.drl
build 0.1/low: phony build/0.1/low/gerbers.zip $
build/0.1/low/ferris_front.svg build/0.1/low/ferris_back.svg $
build/0.1/low/ibom.html build/0.1/low/bom_jlcpcb.csv build/0.1/low/cpl.csv
# 0.2/bling
rule 0_2_bling_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/ferris.kicad_pcb build/0.2/bling/ferris_front.svg
build build/0.2/bling/ferris_front.svg: 0_2_bling_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/ferris.kicad_pcb
rule 0_2_bling_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/ferris.kicad_pcb build/0.2/bling/ferris_back.svg --back
build build/0.2/bling/ferris_back.svg: 0_2_bling_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/ferris.kicad_pcb
rule 0_2_bling_ibom
command = ./automation/run_ibom.sh 0.2/bling
build build/0.2/bling/ibom.html: 0_2_bling_ibom ./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.2/bling/ferris.kicad_pcb 0.2/bling/ferris.xml
rule 0_2_bling_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/bling/ferris.xml build/0.2/bling/bom_jlcpcb.csv
build build/0.2/bling/bom_jlcpcb.csv: 0_2_bling_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/bling/ferris.xml
rule 0_2_bling_pos
command = python3 ./automation/tools/generate_pos.py $
0.2/bling/ferris.kicad_pcb > build/0.2/bling/pos.csv
build build/0.2/bling/pos.csv: 0_2_bling_pos $
./automation/tools/generate_pos.py 0.2/bling/ferris.kicad_pcb
rule 0_2_bling_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/bling/pos.csv build/0.2/bling/cpl.csv
build build/0.2/bling/cpl.csv: 0_2_bling_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/bling/pos.csv 0.2/bling/ferris.kicad_pcb
rule 0_2_bling_erc
command = ./automation/run_erc.sh 0.2/bling/ferris.sch
build build/0.2/bling/ferris.sch.erc_success: 0_2_bling_erc $
./automation/run_erc.sh 0.2/bling/ferris.sch
rule 0_2_bling_ferris_drc
command = ./automation/run_drc.sh 0.2/bling/ferris.kicad_pcb
build build/0.2/bling/ferris.kicad_pcb.drc_success: 0_2_bling_ferris_drc $
./automation/run_drc.sh 0.2/bling/ferris.kicad_pcb
rule 0_2_bling_gerbers
command = mkdir -p build/0.2/bling && kiplot -b $
0.2/bling/ferris.kicad_pcb -c .kiplot.yml -d build/0.2/bling
build build/0.2/bling/ferris-B_Cu.gbr build/0.2/bling/ferris-B_Mask.gbr $
build/0.2/bling/ferris-B_Paste.gbr build/0.2/bling/ferris-B_SilkS.gbr $
build/0.2/bling/ferris-B_Fab.gbr build/0.2/bling/ferris-Edge_Cuts.gbr $
build/0.2/bling/ferris-F_Cu.gbr build/0.2/bling/ferris-F_Mask.gbr $
build/0.2/bling/ferris-F_Paste.gbr build/0.2/bling/ferris-F_SilkS.gbr $
build/0.2/bling/ferris-F_Fab.gbr $
build/0.2/bling/ferris-NPTH-drl_map.gbr build/0.2/bling/ferris-NPTH.drl $
build/0.2/bling/ferris-PTH-drl_map.gbr build/0.2/bling/ferris-PTH.drl: $
0_2_bling_gerbers .kiplot.yml 0.2/bling/ferris.kicad_pcb
rule 0_2_bling_gerbers_zip
command = zip -q -j -r build/0.2/bling/gerbers.zip $
build/0.2/bling/ferris-B_Cu.gbr build/0.2/bling/ferris-B_Mask.gbr $
build/0.2/bling/ferris-B_Paste.gbr build/0.2/bling/ferris-B_SilkS.gbr $
build/0.2/bling/ferris-B_Fab.gbr build/0.2/bling/ferris-Edge_Cuts.gbr $
build/0.2/bling/ferris-F_Cu.gbr build/0.2/bling/ferris-F_Mask.gbr $
build/0.2/bling/ferris-F_Paste.gbr build/0.2/bling/ferris-F_SilkS.gbr $
build/0.2/bling/ferris-F_Fab.gbr $
build/0.2/bling/ferris-NPTH-drl_map.gbr $
build/0.2/bling/ferris-NPTH.drl $
build/0.2/bling/ferris-PTH-drl_map.gbr build/0.2/bling/ferris-PTH.drl
build build/0.2/bling/gerbers.zip: 0_2_bling_gerbers_zip $
build/0.2/bling/ferris.sch.erc_success $
build/0.2/bling/ferris.kicad_pcb.drc_success $
build/0.2/bling/ferris-B_Cu.gbr build/0.2/bling/ferris-B_Mask.gbr $
build/0.2/bling/ferris-B_Paste.gbr build/0.2/bling/ferris-B_SilkS.gbr $
build/0.2/bling/ferris-B_Fab.gbr build/0.2/bling/ferris-Edge_Cuts.gbr $
build/0.2/bling/ferris-F_Cu.gbr build/0.2/bling/ferris-F_Mask.gbr $
build/0.2/bling/ferris-F_Paste.gbr build/0.2/bling/ferris-F_SilkS.gbr $
build/0.2/bling/ferris-F_Fab.gbr $
build/0.2/bling/ferris-NPTH-drl_map.gbr build/0.2/bling/ferris-NPTH.drl $
build/0.2/bling/ferris-PTH-drl_map.gbr build/0.2/bling/ferris-PTH.drl
rule 0_2_bling_cases_mid_profile_left_switch_plate_drc
command = ./automation/run_drc.sh $
0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb
build $
build/0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb.drc_success: $
0_2_bling_cases_mid_profile_left_switch_plate_drc $
./automation/run_drc.sh $
0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb
rule 0_2_bling_cases_mid_profile_render_left_switch_plate_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb $
build/0.2/bling/cases/mid_profile/left_switch_plate_front.svg
build build/0.2/bling/cases/mid_profile/left_switch_plate_front.svg: $
0_2_bling_cases_mid_profile_render_left_switch_plate_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb
rule 0_2_bling_cases_mid_profile_left_switch_plate_edge_cuts
command = mkdir -p build/0.2/bling/cases/mid_profile && kiplot -b $
0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb -c $
.kiplot.edge_cuts.yml -d build/0.2/bling/cases/mid_profile
build build/0.2/bling/cases/mid_profile/left_switch_plate-Edge_Cuts.dxf $
build/0.2/bling/cases/mid_profile/left_switch_plate-Edge_Cuts.svg: $
0_2_bling_cases_mid_profile_left_switch_plate_edge_cuts $
0.2/bling/cases/mid_profile/left_switch_plate.kicad_pcb $
.kiplot.edge_cuts.yml
rule 0_2_bling_cases_mid_profile_right_switch_plate_drc
command = ./automation/run_drc.sh $
0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb
build $
build/0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb.drc_success: $
0_2_bling_cases_mid_profile_right_switch_plate_drc $
./automation/run_drc.sh $
0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb
rule 0_2_bling_cases_mid_profile_render_right_switch_plate_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb $
build/0.2/bling/cases/mid_profile/right_switch_plate_front.svg
build build/0.2/bling/cases/mid_profile/right_switch_plate_front.svg: $
0_2_bling_cases_mid_profile_render_right_switch_plate_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb
rule 0_2_bling_cases_mid_profile_right_switch_plate_edge_cuts
command = mkdir -p build/0.2/bling/cases/mid_profile && kiplot -b $
0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb -c $
.kiplot.edge_cuts.yml -d build/0.2/bling/cases/mid_profile
build build/0.2/bling/cases/mid_profile/right_switch_plate-Edge_Cuts.dxf $
build/0.2/bling/cases/mid_profile/right_switch_plate-Edge_Cuts.svg: $
0_2_bling_cases_mid_profile_right_switch_plate_edge_cuts $
0.2/bling/cases/mid_profile/right_switch_plate.kicad_pcb $
.kiplot.edge_cuts.yml
rule 0_2_bling_cases_mid_profile_lip_drc
command = ./automation/run_drc.sh 0.2/bling/cases/mid_profile/lip.kicad_pcb
build build/0.2/bling/cases/mid_profile/lip.kicad_pcb.drc_success: $
0_2_bling_cases_mid_profile_lip_drc ./automation/run_drc.sh $
0.2/bling/cases/mid_profile/lip.kicad_pcb
rule 0_2_bling_cases_mid_profile_render_lip_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/lip.kicad_pcb $
build/0.2/bling/cases/mid_profile/lip_front.svg
build build/0.2/bling/cases/mid_profile/lip_front.svg: $
0_2_bling_cases_mid_profile_render_lip_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/lip.kicad_pcb
rule 0_2_bling_cases_mid_profile_lip_edge_cuts
command = mkdir -p build/0.2/bling/cases/mid_profile && kiplot -b $
0.2/bling/cases/mid_profile/lip.kicad_pcb -c .kiplot.edge_cuts.yml -d $
build/0.2/bling/cases/mid_profile
build build/0.2/bling/cases/mid_profile/lip-Edge_Cuts.dxf $
build/0.2/bling/cases/mid_profile/lip-Edge_Cuts.svg: $
0_2_bling_cases_mid_profile_lip_edge_cuts $
0.2/bling/cases/mid_profile/lip.kicad_pcb .kiplot.edge_cuts.yml
rule 0_2_bling_cases_mid_profile_bottom_plate_puck_drc
command = ./automation/run_drc.sh $
0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb
build $
build/0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb.drc_success: $
0_2_bling_cases_mid_profile_bottom_plate_puck_drc $
./automation/run_drc.sh $
0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb
rule 0_2_bling_cases_mid_profile_render_bottom_plate_puck_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb $
build/0.2/bling/cases/mid_profile/bottom_plate_puck_front.svg
build build/0.2/bling/cases/mid_profile/bottom_plate_puck_front.svg: $
0_2_bling_cases_mid_profile_render_bottom_plate_puck_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb
rule 0_2_bling_cases_mid_profile_bottom_plate_puck_edge_cuts
command = mkdir -p build/0.2/bling/cases/mid_profile && kiplot -b $
0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb -c $
.kiplot.edge_cuts.yml -d build/0.2/bling/cases/mid_profile
build build/0.2/bling/cases/mid_profile/bottom_plate_puck-Edge_Cuts.dxf $
build/0.2/bling/cases/mid_profile/bottom_plate_puck-Edge_Cuts.svg: $
0_2_bling_cases_mid_profile_bottom_plate_puck_edge_cuts $
0.2/bling/cases/mid_profile/bottom_plate_puck.kicad_pcb $
.kiplot.edge_cuts.yml
rule 0_2_bling_cases_mid_profile_bottom_plate_no_puck_drc
command = ./automation/run_drc.sh $
0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb
build $
build/0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb.drc_success: $
0_2_bling_cases_mid_profile_bottom_plate_no_puck_drc $
./automation/run_drc.sh $
0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb
rule 0_2_bling_cases_mid_profile_render_bottom_plate_no_puck_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb $
build/0.2/bling/cases/mid_profile/bottom_plate_no_puck_front.svg
build build/0.2/bling/cases/mid_profile/bottom_plate_no_puck_front.svg: $
0_2_bling_cases_mid_profile_render_bottom_plate_no_puck_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb
rule 0_2_bling_cases_mid_profile_bottom_plate_no_puck_edge_cuts
command = mkdir -p build/0.2/bling/cases/mid_profile && kiplot -b $
0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb -c $
.kiplot.edge_cuts.yml -d build/0.2/bling/cases/mid_profile
build build/0.2/bling/cases/mid_profile/bottom_plate_no_puck-Edge_Cuts.dxf $
build/0.2/bling/cases/mid_profile/bottom_plate_no_puck-Edge_Cuts.svg: $
0_2_bling_cases_mid_profile_bottom_plate_no_puck_edge_cuts $
0.2/bling/cases/mid_profile/bottom_plate_no_puck.kicad_pcb $
.kiplot.edge_cuts.yml
build 0.2/bling: phony build/0.2/bling/gerbers.zip $
build/0.2/bling/ferris_front.svg build/0.2/bling/ferris_back.svg $
build/0.2/bling/ibom.html build/0.2/bling/bom_jlcpcb.csv $
build/0.2/bling/cpl.csv
# 0.2/compact
rule 0_2_compact_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/ferris.kicad_pcb build/0.2/compact/ferris_front.svg
build build/0.2/compact/ferris_front.svg: 0_2_compact_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/ferris.kicad_pcb
rule 0_2_compact_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/ferris.kicad_pcb build/0.2/compact/ferris_back.svg --back
build build/0.2/compact/ferris_back.svg: 0_2_compact_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/ferris.kicad_pcb
rule 0_2_compact_ibom
command = ./automation/run_ibom.sh 0.2/compact
build build/0.2/compact/ibom.html: 0_2_compact_ibom $
./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.2/compact/ferris.kicad_pcb 0.2/compact/ferris.xml
rule 0_2_compact_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/compact/ferris.xml build/0.2/compact/bom_jlcpcb.csv
build build/0.2/compact/bom_jlcpcb.csv: 0_2_compact_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/compact/ferris.xml
rule 0_2_compact_pos
command = python3 ./automation/tools/generate_pos.py $
0.2/compact/ferris.kicad_pcb > build/0.2/compact/pos.csv
build build/0.2/compact/pos.csv: 0_2_compact_pos $
./automation/tools/generate_pos.py 0.2/compact/ferris.kicad_pcb
rule 0_2_compact_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/compact/pos.csv build/0.2/compact/cpl.csv
build build/0.2/compact/cpl.csv: 0_2_compact_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/compact/pos.csv 0.2/compact/ferris.kicad_pcb
rule 0_2_compact_erc
command = ./automation/run_erc.sh 0.2/compact/ferris.sch
build build/0.2/compact/ferris.sch.erc_success: 0_2_compact_erc $
./automation/run_erc.sh 0.2/compact/ferris.sch
rule 0_2_compact_ferris_drc
command = ./automation/run_drc.sh 0.2/compact/ferris.kicad_pcb
build build/0.2/compact/ferris.kicad_pcb.drc_success: $
0_2_compact_ferris_drc ./automation/run_drc.sh $
0.2/compact/ferris.kicad_pcb
rule 0_2_compact_gerbers
command = mkdir -p build/0.2/compact && kiplot -b $
0.2/compact/ferris.kicad_pcb -c .kiplot.yml -d build/0.2/compact
build build/0.2/compact/ferris-B_Cu.gbr build/0.2/compact/ferris-B_Mask.gbr $
build/0.2/compact/ferris-B_Paste.gbr $
build/0.2/compact/ferris-B_SilkS.gbr build/0.2/compact/ferris-B_Fab.gbr $
build/0.2/compact/ferris-Edge_Cuts.gbr $
build/0.2/compact/ferris-F_Cu.gbr build/0.2/compact/ferris-F_Mask.gbr $
build/0.2/compact/ferris-F_Paste.gbr $
build/0.2/compact/ferris-F_SilkS.gbr build/0.2/compact/ferris-F_Fab.gbr $
build/0.2/compact/ferris-NPTH-drl_map.gbr $
build/0.2/compact/ferris-NPTH.drl $
build/0.2/compact/ferris-PTH-drl_map.gbr $
build/0.2/compact/ferris-PTH.drl: 0_2_compact_gerbers .kiplot.yml $
0.2/compact/ferris.kicad_pcb
rule 0_2_compact_gerbers_zip
command = zip -q -j -r build/0.2/compact/gerbers.zip $
build/0.2/compact/ferris-B_Cu.gbr build/0.2/compact/ferris-B_Mask.gbr $
build/0.2/compact/ferris-B_Paste.gbr $
build/0.2/compact/ferris-B_SilkS.gbr $
build/0.2/compact/ferris-B_Fab.gbr $
build/0.2/compact/ferris-Edge_Cuts.gbr $
build/0.2/compact/ferris-F_Cu.gbr build/0.2/compact/ferris-F_Mask.gbr $
build/0.2/compact/ferris-F_Paste.gbr $
build/0.2/compact/ferris-F_SilkS.gbr $
build/0.2/compact/ferris-F_Fab.gbr $
build/0.2/compact/ferris-NPTH-drl_map.gbr $
build/0.2/compact/ferris-NPTH.drl $
build/0.2/compact/ferris-PTH-drl_map.gbr $
build/0.2/compact/ferris-PTH.drl
build build/0.2/compact/gerbers.zip: 0_2_compact_gerbers_zip $
build/0.2/compact/ferris.sch.erc_success $
build/0.2/compact/ferris.kicad_pcb.drc_success $
build/0.2/compact/ferris-B_Cu.gbr build/0.2/compact/ferris-B_Mask.gbr $
build/0.2/compact/ferris-B_Paste.gbr $
build/0.2/compact/ferris-B_SilkS.gbr build/0.2/compact/ferris-B_Fab.gbr $
build/0.2/compact/ferris-Edge_Cuts.gbr $
build/0.2/compact/ferris-F_Cu.gbr build/0.2/compact/ferris-F_Mask.gbr $
build/0.2/compact/ferris-F_Paste.gbr $
build/0.2/compact/ferris-F_SilkS.gbr build/0.2/compact/ferris-F_Fab.gbr $
build/0.2/compact/ferris-NPTH-drl_map.gbr $
build/0.2/compact/ferris-NPTH.drl $
build/0.2/compact/ferris-PTH-drl_map.gbr build/0.2/compact/ferris-PTH.drl
rule 0_2_compact_cases_low_profile_metal_plate_drc
command = ./automation/run_drc.sh $
0.2/compact/cases/low_profile/metal_plate.kicad_pcb
build $
build/0.2/compact/cases/low_profile/metal_plate.kicad_pcb.drc_success: $
0_2_compact_cases_low_profile_metal_plate_drc ./automation/run_drc.sh $
0.2/compact/cases/low_profile/metal_plate.kicad_pcb
rule 0_2_compact_cases_low_profile_render_metal_plate_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/cases/low_profile/metal_plate.kicad_pcb $
build/0.2/compact/cases/low_profile/metal_plate_front.svg
build build/0.2/compact/cases/low_profile/metal_plate_front.svg: $
0_2_compact_cases_low_profile_render_metal_plate_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/cases/low_profile/metal_plate.kicad_pcb
rule 0_2_compact_cases_low_profile_metal_plate_edge_cuts
command = mkdir -p build/0.2/compact/cases/low_profile && kiplot -b $
0.2/compact/cases/low_profile/metal_plate.kicad_pcb -c $
.kiplot.edge_cuts.yml -d build/0.2/compact/cases/low_profile
build build/0.2/compact/cases/low_profile/metal_plate-Edge_Cuts.dxf $
build/0.2/compact/cases/low_profile/metal_plate-Edge_Cuts.svg: $
0_2_compact_cases_low_profile_metal_plate_edge_cuts $
0.2/compact/cases/low_profile/metal_plate.kicad_pcb .kiplot.edge_cuts.yml
rule 0_2_compact_cases_low_profile_cork_spacer_and_lip_drc
command = ./automation/run_drc.sh $
0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb
build $
build/0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb.drc_success: $
0_2_compact_cases_low_profile_cork_spacer_and_lip_drc $
./automation/run_drc.sh $
0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb
rule 0_2_compact_cases_low_profile_render_cork_spacer_and_lip_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb $
build/0.2/compact/cases/low_profile/cork_spacer_and_lip_front.svg
build build/0.2/compact/cases/low_profile/cork_spacer_and_lip_front.svg: $
0_2_compact_cases_low_profile_render_cork_spacer_and_lip_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb
rule 0_2_compact_cases_low_profile_cork_spacer_and_lip_edge_cuts
command = mkdir -p build/0.2/compact/cases/low_profile && kiplot -b $
0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb -c $
.kiplot.edge_cuts.yml -d build/0.2/compact/cases/low_profile
build build/0.2/compact/cases/low_profile/cork_spacer_and_lip-Edge_Cuts.dxf $
build/0.2/compact/cases/low_profile/cork_spacer_and_lip-Edge_Cuts.svg: $
0_2_compact_cases_low_profile_cork_spacer_and_lip_edge_cuts $
0.2/compact/cases/low_profile/cork_spacer_and_lip.kicad_pcb $
.kiplot.edge_cuts.yml
rule 0_2_compact_cases_low_profile_lip_drc
command = ./automation/run_drc.sh $
0.2/compact/cases/low_profile/lip.kicad_pcb
build build/0.2/compact/cases/low_profile/lip.kicad_pcb.drc_success: $
0_2_compact_cases_low_profile_lip_drc ./automation/run_drc.sh $
0.2/compact/cases/low_profile/lip.kicad_pcb
rule 0_2_compact_cases_low_profile_render_lip_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/cases/low_profile/lip.kicad_pcb $
build/0.2/compact/cases/low_profile/lip_front.svg
build build/0.2/compact/cases/low_profile/lip_front.svg: $
0_2_compact_cases_low_profile_render_lip_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-white-enig.json $
0.2/compact/cases/low_profile/lip.kicad_pcb
rule 0_2_compact_cases_low_profile_lip_edge_cuts
command = mkdir -p build/0.2/compact/cases/low_profile && kiplot -b $
0.2/compact/cases/low_profile/lip.kicad_pcb -c .kiplot.edge_cuts.yml $
-d build/0.2/compact/cases/low_profile
build build/0.2/compact/cases/low_profile/lip-Edge_Cuts.dxf $
build/0.2/compact/cases/low_profile/lip-Edge_Cuts.svg: $
0_2_compact_cases_low_profile_lip_edge_cuts $
0.2/compact/cases/low_profile/lip.kicad_pcb .kiplot.edge_cuts.yml
build 0.2/compact: phony build/0.2/compact/gerbers.zip $
build/0.2/compact/ferris_front.svg build/0.2/compact/ferris_back.svg $
build/0.2/compact/ibom.html build/0.2/compact/bom_jlcpcb.csv $
build/0.2/compact/cpl.csv
# 0.2/high
rule 0_2_high_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.2/high/ferris.kicad_pcb build/0.2/high/ferris_front.svg
build build/0.2/high/ferris_front.svg: 0_2_high_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.2/high/ferris.kicad_pcb
rule 0_2_high_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.2/high/ferris.kicad_pcb build/0.2/high/ferris_back.svg --back
build build/0.2/high/ferris_back.svg: 0_2_high_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-yellow-enig.json $
0.2/high/ferris.kicad_pcb
rule 0_2_high_ibom
command = ./automation/run_ibom.sh 0.2/high
build build/0.2/high/ibom.html: 0_2_high_ibom ./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.2/high/ferris.kicad_pcb 0.2/high/ferris.xml
rule 0_2_high_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/high/ferris.xml build/0.2/high/bom_jlcpcb.csv
build build/0.2/high/bom_jlcpcb.csv: 0_2_high_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/high/ferris.xml
rule 0_2_high_pos
command = python3 ./automation/tools/generate_pos.py $
0.2/high/ferris.kicad_pcb > build/0.2/high/pos.csv
build build/0.2/high/pos.csv: 0_2_high_pos $
./automation/tools/generate_pos.py 0.2/high/ferris.kicad_pcb
rule 0_2_high_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/high/pos.csv build/0.2/high/cpl.csv
build build/0.2/high/cpl.csv: 0_2_high_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/high/pos.csv 0.2/high/ferris.kicad_pcb
rule 0_2_high_erc
command = ./automation/run_erc.sh 0.2/high/ferris.sch
build build/0.2/high/ferris.sch.erc_success: 0_2_high_erc $
./automation/run_erc.sh 0.2/high/ferris.sch
rule 0_2_high_ferris_drc
command = ./automation/run_drc.sh 0.2/high/ferris.kicad_pcb
build build/0.2/high/ferris.kicad_pcb.drc_success: 0_2_high_ferris_drc $
./automation/run_drc.sh 0.2/high/ferris.kicad_pcb
rule 0_2_high_gerbers
command = mkdir -p build/0.2/high && kiplot -b 0.2/high/ferris.kicad_pcb $
-c .kiplot.yml -d build/0.2/high
build build/0.2/high/ferris-B_Cu.gbr build/0.2/high/ferris-B_Mask.gbr $
build/0.2/high/ferris-B_Paste.gbr build/0.2/high/ferris-B_SilkS.gbr $
build/0.2/high/ferris-B_Fab.gbr build/0.2/high/ferris-Edge_Cuts.gbr $
build/0.2/high/ferris-F_Cu.gbr build/0.2/high/ferris-F_Mask.gbr $
build/0.2/high/ferris-F_Paste.gbr build/0.2/high/ferris-F_SilkS.gbr $
build/0.2/high/ferris-F_Fab.gbr build/0.2/high/ferris-NPTH-drl_map.gbr $
build/0.2/high/ferris-NPTH.drl build/0.2/high/ferris-PTH-drl_map.gbr $
build/0.2/high/ferris-PTH.drl: 0_2_high_gerbers .kiplot.yml $
0.2/high/ferris.kicad_pcb
rule 0_2_high_gerbers_zip
command = zip -q -j -r build/0.2/high/gerbers.zip $
build/0.2/high/ferris-B_Cu.gbr build/0.2/high/ferris-B_Mask.gbr $
build/0.2/high/ferris-B_Paste.gbr build/0.2/high/ferris-B_SilkS.gbr $
build/0.2/high/ferris-B_Fab.gbr build/0.2/high/ferris-Edge_Cuts.gbr $
build/0.2/high/ferris-F_Cu.gbr build/0.2/high/ferris-F_Mask.gbr $
build/0.2/high/ferris-F_Paste.gbr build/0.2/high/ferris-F_SilkS.gbr $
build/0.2/high/ferris-F_Fab.gbr $
build/0.2/high/ferris-NPTH-drl_map.gbr build/0.2/high/ferris-NPTH.drl $
build/0.2/high/ferris-PTH-drl_map.gbr build/0.2/high/ferris-PTH.drl
build build/0.2/high/gerbers.zip: 0_2_high_gerbers_zip $
build/0.2/high/ferris.sch.erc_success $
build/0.2/high/ferris.kicad_pcb.drc_success $
build/0.2/high/ferris-B_Cu.gbr build/0.2/high/ferris-B_Mask.gbr $
build/0.2/high/ferris-B_Paste.gbr build/0.2/high/ferris-B_SilkS.gbr $
build/0.2/high/ferris-B_Fab.gbr build/0.2/high/ferris-Edge_Cuts.gbr $
build/0.2/high/ferris-F_Cu.gbr build/0.2/high/ferris-F_Mask.gbr $
build/0.2/high/ferris-F_Paste.gbr build/0.2/high/ferris-F_SilkS.gbr $
build/0.2/high/ferris-F_Fab.gbr build/0.2/high/ferris-NPTH-drl_map.gbr $
build/0.2/high/ferris-NPTH.drl build/0.2/high/ferris-PTH-drl_map.gbr $
build/0.2/high/ferris-PTH.drl
build 0.2/high: phony build/0.2/high/gerbers.zip $
build/0.2/high/ferris_front.svg build/0.2/high/ferris_back.svg $
build/0.2/high/ibom.html build/0.2/high/bom_jlcpcb.csv $
build/0.2/high/cpl.csv
# 0.2/mini
rule 0_2_mini_render_ferris_front
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.2/mini/ferris.kicad_pcb build/0.2/mini/ferris_front.svg
build build/0.2/mini/ferris_front.svg: 0_2_mini_render_ferris_front $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.2/mini/ferris.kicad_pcb
rule 0_2_mini_render_ferris_back
command = python3 automation/tools/PcbDraw/pcbdraw/pcbdraw.py --silent $
--style automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.2/mini/ferris.kicad_pcb build/0.2/mini/ferris_back.svg --back
build build/0.2/mini/ferris_back.svg: 0_2_mini_render_ferris_back $
automation/tools/PcbDraw/pcbdraw/pcbdraw.py $
automation/tools/PcbDraw/pcbdraw/styles/set-blue-enig.json $
0.2/mini/ferris.kicad_pcb
rule 0_2_mini_ibom
command = ./automation/run_ibom.sh 0.2/mini
build build/0.2/mini/ibom.html: 0_2_mini_ibom ./automation/run_ibom.sh $
automation/tools/InteractiveHtmlBom/InteractiveHtmlBom/generate_interactive_bom.py $
0.2/mini/ferris.kicad_pcb 0.2/mini/ferris.xml
rule 0_2_mini_jlc_bom
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/mini/ferris.xml build/0.2/mini/bom_jlcpcb.csv
build build/0.2/mini/bom_jlcpcb.csv: 0_2_mini_jlc_bom $
automation/tools/kicad-jlcpcb-bom-plugin/bom_csv_jlcpcb.py $
0.2/mini/ferris.xml
rule 0_2_mini_pos
command = python3 ./automation/tools/generate_pos.py $
0.2/mini/ferris.kicad_pcb > build/0.2/mini/pos.csv
build build/0.2/mini/pos.csv: 0_2_mini_pos $
./automation/tools/generate_pos.py 0.2/mini/ferris.kicad_pcb
rule 0_2_mini_jlc_cpl
command = python3 $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/mini/pos.csv build/0.2/mini/cpl.csv
build build/0.2/mini/cpl.csv: 0_2_mini_jlc_cpl $
automation/tools/kicad-jlcpcb-bom-plugin/kicad_pos_to_cpl.py $
build/0.2/mini/pos.csv 0.2/mini/ferris.kicad_pcb
rule 0_2_mini_erc
command = ./automation/run_erc.sh 0.2/mini/ferris.sch
build build/0.2/mini/ferris.sch.erc_success: 0_2_mini_erc $
./automation/run_erc.sh 0.2/mini/ferris.sch
rule 0_2_mini_ferris_drc
command = ./automation/run_drc.sh 0.2/mini/ferris.kicad_pcb
build build/0.2/mini/ferris.kicad_pcb.drc_success: 0_2_mini_ferris_drc $
./automation/run_drc.sh 0.2/mini/ferris.kicad_pcb
rule 0_2_mini_gerbers
command = mkdir -p build/0.2/mini && kiplot -b 0.2/mini/ferris.kicad_pcb $
-c .kiplot.yml -d build/0.2/mini
build build/0.2/mini/ferris-B_Cu.gbr build/0.2/mini/ferris-B_Mask.gbr $
build/0.2/mini/ferris-B_Paste.gbr build/0.2/mini/ferris-B_SilkS.gbr $
build/0.2/mini/ferris-B_Fab.gbr build/0.2/mini/ferris-Edge_Cuts.gbr $
build/0.2/mini/ferris-F_Cu.gbr build/0.2/mini/ferris-F_Mask.gbr $
build/0.2/mini/ferris-F_Paste.gbr build/0.2/mini/ferris-F_SilkS.gbr $