From d6fb3df93fa0089834a484386ce3e31ff199720a Mon Sep 17 00:00:00 2001 From: pcasaretto Date: Mon, 8 Apr 2024 22:48:51 -0300 Subject: [PATCH] one more load instruction --- src/instructions/ld.rs | 17 +++++++++++++++++ src/instructions/mod.rs | 1 + 2 files changed, 18 insertions(+) diff --git a/src/instructions/ld.rs b/src/instructions/ld.rs index f4f36ff..7f6fb65 100644 --- a/src/instructions/ld.rs +++ b/src/instructions/ld.rs @@ -57,6 +57,14 @@ pub fn ld_d8_r(target: RegisterTarget) -> impl Fn(&mut CPU) { } } +pub fn ld_a_mem_at_d8() -> impl Fn(&mut CPU) { + move |cpu: &mut CPU| { + let addr = 0xFF00 + cpu.read_next_byte() as u16; + let value = cpu.registers.get_u8(RegisterTarget::A); + cpu.bus.write_byte(addr, value); + } +} + #[cfg(test)] mod tests { use super::*; @@ -138,4 +146,13 @@ mod tests { ld_d8_mem_at_r16(Register16bTarget::HL)(&mut cpu); assert_eq!(cpu.bus.memory[0x1000], 0x34); } + + #[test] + fn test_ld_a_mem_at_d8() { + let mut cpu = CPU::default(); + cpu.bus.memory[0] = 0x34; + cpu.registers.set_u8(RegisterTarget::A, 0x42); + ld_a_mem_at_d8()(&mut cpu); + assert_eq!(cpu.bus.read_byte(0xFF34), 0x42); + } } diff --git a/src/instructions/mod.rs b/src/instructions/mod.rs index d8db729..bcf8c5b 100644 --- a/src/instructions/mod.rs +++ b/src/instructions/mod.rs @@ -143,6 +143,7 @@ pub fn from_byte(byte: u8) -> Box { 0xD6 => Box::new(sub::sub_d8()), + 0xE0 => Box::new(ld::ld_a_mem_at_d8()), 0xEA => Box::new(ld::ld_r_mem_at_d16(RegisterTarget::A)), 0xF3 => Box::new(int::di()),