From fe7aa04b5ed9743f6207edb71faa3d65d83d9755 Mon Sep 17 00:00:00 2001
From: George Zlobin <george.zlobin@intel.com>
Date: Mon, 14 Dec 2020 11:29:39 +0300
Subject: [PATCH] rm include

---
 .../vpu/graph_transformer/src/middleend/passes/reshape_conv.cpp  | 1 -
 1 file changed, 1 deletion(-)

diff --git a/inference-engine/src/vpu/graph_transformer/src/middleend/passes/reshape_conv.cpp b/inference-engine/src/vpu/graph_transformer/src/middleend/passes/reshape_conv.cpp
index ee4254aa9b4dbb..85f5e5e18de98e 100644
--- a/inference-engine/src/vpu/graph_transformer/src/middleend/passes/reshape_conv.cpp
+++ b/inference-engine/src/vpu/graph_transformer/src/middleend/passes/reshape_conv.cpp
@@ -6,7 +6,6 @@
 // to get more efficient HW tiling (pass "hwConvTiling") using reshape stages.
 
 #include <vpu/middleend/pass_manager.hpp>
-#include <vpu/middleend/hw/conv_tiling/reshape_conv_func.hpp>
 
 namespace vpu {