From 61cf09ecb9f6f2da034e4ef182a5cadde4f488be Mon Sep 17 00:00:00 2001
From: AMAN MOGAL <81488924+amanmogal@users.noreply.github.com>
Date: Wed, 4 Dec 2024 20:36:49 +0530
Subject: [PATCH] updated
 src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp

---
 .../plugin/aarch64/debug_capabilities.hpp     | 30 +++++++++++++------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp b/src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp
index 906fce65c3b107..cbde685edb64bf 100644
--- a/src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp
+++ b/src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp
@@ -8,17 +8,29 @@
 
 class RegPrints {
 public:
-    // Print general-purpose registers
-    static void print_gpr(const uint64_t& reg_value, const char* reg_name) {
-        std::cout << "Register " << reg_name << ": " << std::hex << reg_value << std::endl;
+    static void print_gpr(jit_generator &gen, const uint64_t &reg_value, const char *reg_name) {
+        // Emit JIT code to print general-purpose register during runtime
+        gen.mov(gen.rdi, reg_value); // Move register value into rdi
+        gen.mov(gen.rsi, reinterpret_cast<uint64_t>(reg_name)); // Pass register name as argument
+        gen.call(reinterpret_cast<void(*)(const char*, uint64_t)>(print_runtime_gpr)); // Call runtime function
     }
 
-    // Print vector registers (SIMD)
-    static void print_simd(const float32x4_t& reg_value, const char* reg_name) {
-        float values[4];
-        vst1q_f32(values, reg_value); // Store SIMD register into an array
-        std::cout << "SIMD Register " << reg_name << ": ["
-                  << ov::util::join(values, values + 4, ", ") << "]" << std::endl;
+    static void print_simd(jit_generator &gen, const float32x4_t &reg_value, const char *reg_name) {
+        // Emit JIT code to handle SIMD printing during runtime
+        gen.mov(gen.rdi, reinterpret_cast<uint64_t>(&reg_value)); // Move SIMD value into rdi
+        gen.mov(gen.rsi, reinterpret_cast<uint64_t>(reg_name)); // Pass register name as argument
+        gen.call(reinterpret_cast<void(*)(const char*, const float*)>(print_runtime_simd)); // Call runtime function
+    }
+
+private:
+    // Runtime functions to print the registers
+    static void print_runtime_gpr(const char *reg_name, uint64_t value) {
+        std::cout << "Register " << reg_name << ": " << std::hex << value << std::endl;
+    }
+
+    static void print_runtime_simd(const char *reg_name, const float *values) {
+        std::cout << "SIMD Register " << reg_name << ": [" 
+                  << values[0] << ", " << values[1] << ", " << values[2] << ", " << values[3] << "]" << std::endl;
     }
 };