From cafcd2a7d4136370aeaa16cb64ae5ba992fdaba9 Mon Sep 17 00:00:00 2001 From: subbu009 Date: Fri, 31 May 2024 14:47:14 +0530 Subject: [PATCH 1/3] modified run_phase -> main_phase --- cv32e40p/env/uvme/uvme_cv32e40p_env.sv | 6 +++--- .../tests/uvmt/base-tests/uvmt_cv32e40p_base_test.sv | 8 ++++---- .../compliance-tests/uvmt_cv32e40p_firmware_test.sv | 10 +++++----- .../uvmt_cv32e40p_riscof_firmware_test.sv | 10 +++++----- 4 files changed, 17 insertions(+), 17 deletions(-) diff --git a/cv32e40p/env/uvme/uvme_cv32e40p_env.sv b/cv32e40p/env/uvme/uvme_cv32e40p_env.sv index 224198fb77..ca578a173c 100644 --- a/cv32e40p/env/uvme/uvme_cv32e40p_env.sv +++ b/cv32e40p/env/uvme/uvme_cv32e40p_env.sv @@ -88,7 +88,7 @@ class uvme_cv32e40p_env_c extends uvm_env; /** * Creates and starts the instruction and virtual peripheral sequences in active mode. */ - extern virtual task run_phase(uvm_phase phase); + extern virtual task main_phase(uvm_phase phase); /** * Get virtual interface handles from UVM Configuration Database. @@ -225,7 +225,7 @@ endfunction: connect_phase // 2. The calls to randomize() are on sequences that are only randomized // once in this ENV. // -task uvme_cv32e40p_env_c::run_phase(uvm_phase phase); +task uvme_cv32e40p_env_c::main_phase(uvm_phase phase); uvma_obi_memory_fw_preload_seq_c fw_preload_seq; uvma_obi_memory_slv_seq_c instr_slv_seq; @@ -310,7 +310,7 @@ task uvme_cv32e40p_env_c::run_phase(uvm_phase phase); join_none end -endtask : run_phase +endtask : main_phase //@DVT_LINTER_WAIVER_END "MT20220302_01" diff --git a/cv32e40p/tests/uvmt/base-tests/uvmt_cv32e40p_base_test.sv b/cv32e40p/tests/uvmt/base-tests/uvmt_cv32e40p_base_test.sv index c065dc4b7d..8958da617c 100644 --- a/cv32e40p/tests/uvmt/base-tests/uvmt_cv32e40p_base_test.sv +++ b/cv32e40p/tests/uvmt/base-tests/uvmt_cv32e40p_base_test.sv @@ -110,7 +110,7 @@ class uvmt_cv32e40p_base_test_c extends uvm_test; * 1. Triggers the start of clock generation via start_clk() * 2. Starts the watchdog timeout via watchdog_timeout() */ - extern virtual task run_phase(uvm_phase phase); + extern virtual task main_phase(uvm_phase phase); /** * Runs reset_vseq. @@ -262,13 +262,13 @@ function void uvmt_cv32e40p_base_test_c::end_of_elaboration_phase(uvm_phase phas endfunction : end_of_elaboration_phase -task uvmt_cv32e40p_base_test_c::run_phase(uvm_phase phase); +task uvmt_cv32e40p_base_test_c::main_phase(uvm_phase phase); - super.run_phase(phase); + super.main_phase(phase); watchdog_timer(); -endtask : run_phase +endtask : main_phase task uvmt_cv32e40p_base_test_c::reset_phase(uvm_phase phase); diff --git a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv index 41c920e856..f2a1c77ed1 100644 --- a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv +++ b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv @@ -76,7 +76,7 @@ class uvmt_cv32e40p_firmware_test_c extends uvmt_cv32e40p_base_test_c; /** * Enable program execution, wait for completion. */ - extern virtual task run_phase(uvm_phase phase); + extern virtual task main_phase(uvm_phase phase); /** * Start random debug sequencer @@ -122,10 +122,10 @@ task uvmt_cv32e40p_firmware_test_c::configure_phase(uvm_phase phase); endtask : configure_phase -task uvmt_cv32e40p_firmware_test_c::run_phase(uvm_phase phase); +task uvmt_cv32e40p_firmware_test_c::main_phase(uvm_phase phase); // start_clk() and watchdog_timer() are called in the base_test - super.run_phase(phase); + super.main_phase(phase); if ($test$plusargs("gen_random_debug") || $test$plusargs("gen_reduced_rand_dbg_req")) begin fork @@ -151,7 +151,7 @@ task uvmt_cv32e40p_firmware_test_c::run_phase(uvm_phase phase); end phase.raise_objection(this); - @(posedge env_cntxt.clknrst_cntxt.vif.reset_n); + //@(posedge env_cntxt.clknrst_cntxt.vif.reset_n); repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk); `uvm_info("TEST", "Started RUN", UVM_NONE) // The firmware is expected to write exit status and pass/fail indication to the Virtual Peripheral @@ -165,7 +165,7 @@ task uvmt_cv32e40p_firmware_test_c::run_phase(uvm_phase phase); `uvm_info("TEST", $sformatf("Finished RUN: exit status is %0h", vp_status_vif.exit_value), UVM_NONE) phase.drop_objection(this); -endtask : run_phase +endtask : main_phase task uvmt_cv32e40p_firmware_test_c::reset_debug(); uvme_cv32e40p_random_debug_reset_c debug_vseq; diff --git a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv index 92bd466dad..3e52eba3da 100644 --- a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv +++ b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv @@ -84,7 +84,7 @@ class uvmt_cv32e40p_riscof_firmware_test_c extends uvmt_cv32e40p_base_test_c; /** * Enable program execution, wait for completion. */ - extern virtual task run_phase(uvm_phase phase); + extern virtual task main_phase(uvm_phase phase); extern function void write_riscof_signature(); @@ -139,12 +139,12 @@ function void uvmt_cv32e40p_riscof_firmware_test_c::post_randomize(); endfunction : post_randomize -task uvmt_cv32e40p_riscof_firmware_test_c::run_phase(uvm_phase phase); +task uvmt_cv32e40p_riscof_firmware_test_c::main_phase(uvm_phase phase); - super.run_phase(phase); + super.main_phase(phase); phase.raise_objection(this); - @(posedge env_cntxt.clknrst_cntxt.vif.reset_n); + //@(posedge env_cntxt.clknrst_cntxt.vif.reset_n); repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk); `uvm_info("TEST", "Started RUN", UVM_NONE) @@ -162,7 +162,7 @@ task uvmt_cv32e40p_riscof_firmware_test_c::run_phase(uvm_phase phase); phase.drop_objection(this); -endtask : run_phase +endtask : main_phase function void uvmt_cv32e40p_riscof_firmware_test_c::write_riscof_signature(); bit[31:0] mem_read; From 61d856305f696f8f9c10258d79ee30a15e0b8484 Mon Sep 17 00:00:00 2001 From: subbu009 Date: Mon, 3 Jun 2024 21:16:21 +0530 Subject: [PATCH 2/3] Removed waiting for posedge reset_n --- .../tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv | 2 +- .../uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv index f2a1c77ed1..a158911f0d 100644 --- a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv +++ b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv @@ -151,7 +151,7 @@ task uvmt_cv32e40p_firmware_test_c::main_phase(uvm_phase phase); end phase.raise_objection(this); - //@(posedge env_cntxt.clknrst_cntxt.vif.reset_n); + repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk); `uvm_info("TEST", "Started RUN", UVM_NONE) // The firmware is expected to write exit status and pass/fail indication to the Virtual Peripheral diff --git a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv index 3e52eba3da..1d49fba4a8 100644 --- a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv +++ b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv @@ -144,7 +144,7 @@ task uvmt_cv32e40p_riscof_firmware_test_c::main_phase(uvm_phase phase); super.main_phase(phase); phase.raise_objection(this); - //@(posedge env_cntxt.clknrst_cntxt.vif.reset_n); + repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk); `uvm_info("TEST", "Started RUN", UVM_NONE) From b3ed47838d4b972763fa4ed69f1b75d4fff449c8 Mon Sep 17 00:00:00 2001 From: subbu009 Date: Wed, 5 Jun 2024 20:54:44 +0530 Subject: [PATCH 3/3] Added wait on reset_n --- .../tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv | 2 +- .../uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv index a158911f0d..4eb89c8d7a 100644 --- a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv +++ b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_firmware_test.sv @@ -151,7 +151,7 @@ task uvmt_cv32e40p_firmware_test_c::main_phase(uvm_phase phase); end phase.raise_objection(this); - + wait(env_cntxt.clknrst_cntxt.vif.reset_n === 1'b1); repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk); `uvm_info("TEST", "Started RUN", UVM_NONE) // The firmware is expected to write exit status and pass/fail indication to the Virtual Peripheral diff --git a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv index 1d49fba4a8..899b6903cf 100644 --- a/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv +++ b/cv32e40p/tests/uvmt/compliance-tests/uvmt_cv32e40p_riscof_firmware_test.sv @@ -144,7 +144,7 @@ task uvmt_cv32e40p_riscof_firmware_test_c::main_phase(uvm_phase phase); super.main_phase(phase); phase.raise_objection(this); - + wait(env_cntxt.clknrst_cntxt.vif.reset_n === 1'b1); repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk); `uvm_info("TEST", "Started RUN", UVM_NONE)