SDF annotation

[Blebowski]

Hi,

I was wondering whether you though about having SDF annotator for Vital models.

I understand this is completely out of scope of you current focus (VHD2019, Verilog, PSL),
I am just wonderingnwhether you have some ideas about it.

[nickg]

I don't really have any opinion on it at all as I never used SDF or VITAL models before. AFAIK the annotator needs to read the SDF file and generate a VHDL configuration with the timings passed as generics to the VITAL components.

[Blebowski]

I have been using SDFs mostly annotated on Verilog ASIC Libraries. AFAIK VITAL annotated cells simulate much slower than Verilog models of cells. Therefore annotating SDFs on Verilog cell models is the most common way of using SDF. Some time ago, Xilinx used
to provide Vital models for their FPGA cells, so it was possible to do Vital annotated post-PnR simulation. I think this is not possible for the latest FPGAs. You can only do write_vhdl without the "timing", therefore no annotation of VHDL netlist is possible. So SDF->Vital might have limited usability. However, annotating SDFs to Verilog models may be very desired feature especially for ASIC sign-off.

I will try to start playing with this, and try to put together at least basic SDF parser. The syntax is quite simple. For longer time I wanted to gain some "hands-on" experience with writing YACC grammar files.