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rimage: update rimage: add configuration and extended manifest #10
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Commits on Jan 5, 2021
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rimage: update rimage: add configuration and extended manifest
rimage dropped its "-m" parameter and switched over to using "-c" for a configuration file, including a target name. Add support for extended manifest for all cAVS versions. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs: fix manifest base address
On cAVS 1.5, 2.0 and 2.5 platforms the correct manifest address is 0xB0032000. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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sof: remove superfluous and duplicate code
1. SOF doesn't have to be built in .bin format 2. don't include soc.c and soc_mp.c twice in cmake 3. remove an unused mailbox.h header Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs: disable all interrupts when configuring interrupt controllers
Some interrupts can be enabled by the ROM, e.g. the timer interrupt. When then in Zephyr the interrupt controller is enabled, before individual interrupts are configured, interrupts can arrive and lead to the spurious interrupt handler being invoked. Fix thid by disabling all child interrupts when configuring cAVS interrupt controllers. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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xtensa: disable unused memory power down
The current unused memory calculation is broken because it doesn't take into account the stack area, allocated at the top of HP SRAM. Until this is fixed disable powering down unused RAM. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs: fix shim register location on 1.8 and above
Shim register location on cAVS 1.5 is different than on 1.8 and up, fix it. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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xtensa: IPM is only required if SMP is enabled
A configuration with CONFIG_MP_NUM_CPUS > 1 and CONFIG_IPM_CAVS_IDC not defined is valid if COMFIG_SMP is disabled. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs: (cosmetic) clean up and simplification of intc_cavs.c
1. don't use "inline" in .c, let the compiler decide 2. remove superfluous parentheses 3. simplify a function by directly returning the result of a boolean operation Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs_v18, v20, v25: calculate trace base address correctly
RAM window layout differs between cAVS versions. Fix apparent copy-paste definition blocks to match cAVS 1.8, 2.0 and 2.5. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs_v25: switch over to Tigerlake H configuration
Tigerlake H has less RAM and fewer cores. Both should be supported, selectable at the board level. For now use the H configuration as more readily available for testing. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs_v25: fix copy-pasted definitions
shim.h on cAVS 2.5 contains register definitions, copy-pasted from other architectures. Fix them to correct values. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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CONFIG_BOOTLOADER_MCUBOOT is never defined in cAVS builds, code, built only when that option is enabled, contains invalid expressions. Fix them. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs: fix LSPGISTS and LSPGCTL access
On cAVS 1.8, 2.0 and 2.5 LSPGISTS and LSPGCTL are located in a different shim register range, they cannot be accessed, using the usual SHIM_BASE offset. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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cavs: (cosmetic) remove redundant LPRAM_* macros
LPRAM_BASE and LPRAM_SIZE are duplicates of LP_SRAM_BASE and LP_SRAM_SIZE respectively. Remove them and use LP_SRAM_* consistently everywhere. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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bootloader: use ceiling_fraction() instead of open-coding it
Use the existing ceiling_fraction() function instead of open- coding it. Signed-off-by: Guennadi Liakhovetski <[email protected]>
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