From f115b8b0864ebefb3f1269f353330216f4f77cbc Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Fri, 15 Dec 2017 14:48:34 +0000
Subject: [PATCH] can: mcp2517fd: added can0/can1 overlays

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 arch/arm/boot/dts/overlays/Makefile           |  2 +
 .../dts/overlays/mcp2517fd-can0-overlay.dts   | 78 +++++++++++++++++++
 .../dts/overlays/mcp2517fd-can1-overlay.dts   | 78 +++++++++++++++++++
 3 files changed, 158 insertions(+)
 create mode 100644 arch/arm/boot/dts/overlays/mcp2517fd-can0-overlay.dts
 create mode 100644 arch/arm/boot/dts/overlays/mcp2517fd-can1-overlay.dts

diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
index 8f5b8a9bbbf35d..57c20fd3fb8991 100644
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -77,6 +77,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
 	mcp23s17.dtbo \
 	mcp2515-can0.dtbo \
 	mcp2515-can1.dtbo \
+	mcp2517fd-can0.dtbo \
+	mcp2517fd-can1.dtbo \
 	mcp3008.dtbo \
 	mcp3202.dtbo \
 	media-center.dtbo \
diff --git a/arch/arm/boot/dts/overlays/mcp2517fd-can0-overlay.dts b/arch/arm/boot/dts/overlays/mcp2517fd-can0-overlay.dts
new file mode 100644
index 00000000000000..7995ed3ff89de6
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/mcp2517fd-can0-overlay.dts
@@ -0,0 +1,78 @@
+/*
+ * Device tree overlay for mcp2517fd/can0 on spi0.0
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+    compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
+    /* disable spi-dev for spi0.0 */
+    fragment@0 {
+        target = <&spi0>;
+        __overlay__ {
+            status = "okay";
+        };
+    };
+
+    fragment@1 {
+	target = <&spidev0>;
+	__overlay__ {
+	    status = "disabled";
+	};
+    };
+
+    /* the interrupt pin of the can-controller */
+    fragment@2 {
+        target = <&gpio>;
+        __overlay__ {
+            can0_pins: can0_pins {
+                brcm,pins = <25>;
+                brcm,function = <0>; /* input */
+            };
+        };
+    };
+
+    /* the clock/oscillator of the can-controller */
+    fragment@3 {
+        target-path = "/clocks";
+        __overlay__ {
+            /* external oscillator of mcp2517fd on SPI0.0 */
+            can0_osc: can0_osc {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency  = <40000000>;
+            };
+        };
+    };
+
+    /* the spi config of the can-controller itself binding everything together */
+    fragment@4 {
+        target = <&spi0>;
+        __overlay__ {
+            /* needed to avoid dtc warning */
+            #address-cells = <1>;
+            #size-cells = <0>;
+            can0: mcp2517fd@0 {
+                reg = <0>;
+                compatible = "microchip,mcp2517fd";
+                pinctrl-names = "default";
+                pinctrl-0 = <&can0_pins>;
+                spi-max-frequency = <20000000>;
+                interrupt-parent = <&gpio>;
+                interrupts = <25 0x8>;
+                clocks = <&can0_osc>;
+                microchip,clock-out-div = <10>;
+            };
+        };
+    };
+
+    __overrides__ {
+        oscillator = <&can0_osc>,"clock-frequency:0";
+        spimaxfrequency = <&can0>,"spi-max-frequency:0";
+        interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
+	clockdiv = <&can0>,"microchip,clock-div?";
+	clockoutdiv = <&can0>,"microchip,clock-out-div:0";
+	opendrain = <&can0>, "gpio-open-drain?";
+    };
+};
diff --git a/arch/arm/boot/dts/overlays/mcp2517fd-can1-overlay.dts b/arch/arm/boot/dts/overlays/mcp2517fd-can1-overlay.dts
new file mode 100644
index 00000000000000..55f0d3774389ba
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/mcp2517fd-can1-overlay.dts
@@ -0,0 +1,78 @@
+/*
+ * Device tree overlay for mcp2517fd/can1 on spi0.1
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+    compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
+    /* disable spi-dev for spi0.1 */
+    fragment@0 {
+        target = <&spi0>;
+        __overlay__ {
+            status = "okay";
+        };
+    };
+
+    fragment@1 {
+	target = <&spidev1>;
+	__overlay__ {
+	    status = "disabled";
+	};
+    };
+
+    /* the interrupt pin of the can-controller */
+    fragment@2 {
+        target = <&gpio>;
+        __overlay__ {
+            can1_pins: can1_pins {
+                brcm,pins = <26>;
+                brcm,function = <0>; /* input */
+            };
+        };
+    };
+
+    /* the clock/oscillator of the can-controller */
+    fragment@3 {
+        target-path = "/clocks";
+        __overlay__ {
+            /* external oscillator of mcp2517fd on SPI0.0 */
+            can1_osc: can1_osc {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+                clock-frequency  = <40000000>;
+            };
+        };
+    };
+
+    /* the spi config of the can-controller itself binding everything together */
+    fragment@4 {
+        target = <&spi0>;
+        __overlay__ {
+            /* needed to avoid dtc warning */
+            #address-cells = <1>;
+            #size-cells = <0>;
+            can1: mcp2517fd@1 {
+                reg = <1>;
+                compatible = "microchip,mcp2517fd";
+                pinctrl-names = "default";
+                pinctrl-0 = <&can1_pins>;
+                spi-max-frequency = <20000000>;
+                interrupt-parent = <&gpio>;
+                interrupts = <26 0x8>;
+                clocks = <&can1_osc>;
+                microchip,clock-out-div = <10>;
+            };
+        };
+    };
+
+    __overrides__ {
+        oscillator = <&can1_osc>,"clock-frequency:0";
+        spimaxfrequency = <&can1>,"spi-max-frequency:0";
+        interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
+	clockdiv = <&can1>,"microchip,clock-div?";
+	clockoutdiv = <&can1>,"microchip,clock-out-div:0";
+	opendrain = <&can1>, "gpio-open-drain?";
+    };
+};