diff --git a/hw/ip/sysrst_ctrl/data/sysrst_ctrl.hjson b/hw/ip/sysrst_ctrl/data/sysrst_ctrl.hjson
index b4d50f93d28f15..304bd5b71d0595 100644
--- a/hw/ip/sysrst_ctrl/data/sysrst_ctrl.hjson
+++ b/hw/ip/sysrst_ctrl/data/sysrst_ctrl.hjson
@@ -31,6 +31,7 @@
   interrupt_list: [
     { name: "event_detected",
       desc: "Common interrupt triggered by combo or keyboard events.",
+      type: "status"
     }
   ],
   alert_list: [
@@ -278,7 +279,7 @@
     { name: "ULP_STATUS",
       desc: "Ultra low power status",
       swaccess: "rw1c",
-      hwaccess: "hwo",
+      hwaccess: "hrw",
       resval: "0",
       tags: [ // the value of these regs is determined by the
               // value on the pins, hence it cannot be predicted.
@@ -972,7 +973,7 @@
             interrupt action is configured in the corresponding !!COM_OUT_CTL register.
             ''',
       swaccess: "rw1c",
-      hwaccess: "hwo",
+      hwaccess: "hrw",
       resval: "0",
       tags: [ // the value of these regs is determined by the
               // value on the pins, hence it cannot be predicted.
@@ -1003,7 +1004,7 @@
     { name: "KEY_INTR_STATUS",
       desc: "key interrupt source",
       swaccess: "rw1c",
-      hwaccess: "hwo",
+      hwaccess: "hrw",
       resval: "0",
       tags: [ // the value of these regs is determined by the value on the pins
               // or other CSRs, hence it cannot be predicted.
diff --git a/hw/ip/sysrst_ctrl/doc/interfaces.md b/hw/ip/sysrst_ctrl/doc/interfaces.md
index 6670efff4a1892..23bb1a63a06af2 100644
--- a/hw/ip/sysrst_ctrl/doc/interfaces.md
+++ b/hw/ip/sysrst_ctrl/doc/interfaces.md
@@ -38,7 +38,7 @@ Referring to the [Comportable guideline for peripheral device functionality](htt
 
 | Interrupt Name   | Type   | Description                                             |
 |:-----------------|:-------|:--------------------------------------------------------|
-| event_detected   | Event  | Common interrupt triggered by combo or keyboard events. |
+| event_detected   | Status | Common interrupt triggered by combo or keyboard events. |
 
 ## Security Alerts
 
diff --git a/hw/ip/sysrst_ctrl/doc/registers.md b/hw/ip/sysrst_ctrl/doc/registers.md
index f4edfdd3810942..28d0508893d236 100644
--- a/hw/ip/sysrst_ctrl/doc/registers.md
+++ b/hw/ip/sysrst_ctrl/doc/registers.md
@@ -58,13 +58,13 @@ Interrupt State Register
 ### Fields
 
 ```wavejson
-{"reg": [{"name": "event_detected", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}}
+{"reg": [{"name": "event_detected", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}}
 ```
 
 |  Bits  |  Type  |  Reset  | Name           | Description                                             |
 |:------:|:------:|:-------:|:---------------|:--------------------------------------------------------|
 |  31:1  |        |         |                | Reserved                                                |
-|   0    |  rw1c  |   0x0   | event_detected | Common interrupt triggered by combo or keyboard events. |
+|   0    |   ro   |   0x0   | event_detected | Common interrupt triggered by combo or keyboard events. |
 
 ## INTR_ENABLE
 Interrupt Enable Register
diff --git a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv
index 71ad3f2a6d5a55..4bb478626be437 100644
--- a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv
+++ b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl.sv
@@ -337,6 +337,9 @@ module sysrst_ctrl
     .intr_state_i(reg2hw.intr_state),
     .intr_enable_i(reg2hw.intr_enable),
     .intr_test_i(reg2hw.intr_test),
+    .key_intr_status_i(reg2hw.key_intr_status),
+    .combo_intr_status_i(reg2hw.combo_intr_status),
+    .ulp_status_i(reg2hw.ulp_status),
     .wkup_status_o(hw2reg.wkup_status),
     .intr_state_o(hw2reg.intr_state),
     .key_intr_status_o(hw2reg.key_intr_status),
diff --git a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_intr.sv b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_intr.sv
index fedda2c0e375f4..fed4aa63129674 100644
--- a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_intr.sv
+++ b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_intr.sv
@@ -17,10 +17,13 @@ module sysrst_ctrl_intr
   input  [NumCombo-1:0]   aon_combo_intr_i,
   input                   aon_ulp_wakeup_pulse_i,
 
-  input  sysrst_ctrl_reg2hw_wkup_status_reg_t wkup_status_i,
-  input  sysrst_ctrl_reg2hw_intr_state_reg_t  intr_state_i,
-  input  sysrst_ctrl_reg2hw_intr_enable_reg_t intr_enable_i,
-  input  sysrst_ctrl_reg2hw_intr_test_reg_t   intr_test_i,
+  input  sysrst_ctrl_reg2hw_wkup_status_reg_t       wkup_status_i,
+  input  sysrst_ctrl_reg2hw_intr_state_reg_t        intr_state_i,
+  input  sysrst_ctrl_reg2hw_intr_enable_reg_t       intr_enable_i,
+  input  sysrst_ctrl_reg2hw_intr_test_reg_t         intr_test_i,
+  input  sysrst_ctrl_reg2hw_key_intr_status_reg_t   key_intr_status_i,
+  input  sysrst_ctrl_reg2hw_combo_intr_status_reg_t combo_intr_status_i,
+  input  sysrst_ctrl_reg2hw_ulp_status_reg_t        ulp_status_i,
 
   output sysrst_ctrl_hw2reg_wkup_status_reg_t       wkup_status_o,
   output sysrst_ctrl_hw2reg_intr_state_reg_t        intr_state_o,
@@ -168,21 +171,20 @@ module sysrst_ctrl_intr
   assign ulp_status_o.d = 1'b1;
   assign ulp_status_o.de = ulp_wakeup_pulse;
 
-  // Aggregate interrupt event pulses.
-  logic intr_event_pulse;
-  assign intr_event_pulse = |{ulp_wakeup_pulse,
-                              combo_intr,
-                              h2l_key_intr,
-                              l2h_key_intr};
+  // Aggregate interrupt event statuses.
+  logic intr_event_status;
+  assign intr_event_status = |{ulp_status_i,
+                               combo_intr_status_i,
+                               key_intr_status_i};
 
   // instantiate interrupt hardware primitive
   prim_intr_hw #(
    .Width(1),
-   .IntrT("Event")
+   .IntrT("Status")
   ) u_sysrst_ctrl_intr_o (
     .clk_i,
     .rst_ni,
-    .event_intr_i           (intr_event_pulse),
+    .event_intr_i           (intr_event_status),
     .reg2hw_intr_enable_q_i (intr_enable_i.q),
     .reg2hw_intr_test_q_i   (intr_test_i.q),
     .reg2hw_intr_test_qe_i  (intr_test_i.qe),
diff --git a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_pkg.sv b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_pkg.sv
index 29046030f06354..db112187742749 100644
--- a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_pkg.sv
+++ b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_pkg.sv
@@ -58,6 +58,10 @@ package sysrst_ctrl_reg_pkg;
     logic        q;
   } sysrst_ctrl_reg2hw_ulp_ctl_reg_t;
 
+  typedef struct packed {
+    logic        q;
+  } sysrst_ctrl_reg2hw_ulp_status_reg_t;
+
   typedef struct packed {
     logic        q;
   } sysrst_ctrl_reg2hw_wkup_status_reg_t;
@@ -344,6 +348,66 @@ package sysrst_ctrl_reg_pkg;
     } bat_disable;
   } sysrst_ctrl_reg2hw_com_out_ctl_mreg_t;
 
+  typedef struct packed {
+    struct packed {
+      logic        q;
+    } combo3_h2l;
+    struct packed {
+      logic        q;
+    } combo2_h2l;
+    struct packed {
+      logic        q;
+    } combo1_h2l;
+    struct packed {
+      logic        q;
+    } combo0_h2l;
+  } sysrst_ctrl_reg2hw_combo_intr_status_reg_t;
+
+  typedef struct packed {
+    struct packed {
+      logic        q;
+    } flash_wp_l_l2h;
+    struct packed {
+      logic        q;
+    } ec_rst_l_l2h;
+    struct packed {
+      logic        q;
+    } ac_present_l2h;
+    struct packed {
+      logic        q;
+    } key2_in_l2h;
+    struct packed {
+      logic        q;
+    } key1_in_l2h;
+    struct packed {
+      logic        q;
+    } key0_in_l2h;
+    struct packed {
+      logic        q;
+    } pwrb_l2h;
+    struct packed {
+      logic        q;
+    } flash_wp_l_h2l;
+    struct packed {
+      logic        q;
+    } ec_rst_l_h2l;
+    struct packed {
+      logic        q;
+    } ac_present_h2l;
+    struct packed {
+      logic        q;
+    } key2_in_h2l;
+    struct packed {
+      logic        q;
+    } key1_in_h2l;
+    struct packed {
+      logic        q;
+    } key0_in_h2l;
+    struct packed {
+      logic        q;
+    } pwrb_h2l;
+  } sysrst_ctrl_reg2hw_key_intr_status_reg_t;
+
   typedef struct packed {
     logic        d;
     logic        de;
@@ -474,29 +538,32 @@ package sysrst_ctrl_reg_pkg;
 
   // Register -> HW type
   typedef struct packed {
-    sysrst_ctrl_reg2hw_intr_state_reg_t intr_state; // [480:480]
-    sysrst_ctrl_reg2hw_intr_enable_reg_t intr_enable; // [479:479]
-    sysrst_ctrl_reg2hw_intr_test_reg_t intr_test; // [478:477]
-    sysrst_ctrl_reg2hw_alert_test_reg_t alert_test; // [476:475]
-    sysrst_ctrl_reg2hw_ec_rst_ctl_reg_t ec_rst_ctl; // [474:459]
-    sysrst_ctrl_reg2hw_ulp_ac_debounce_ctl_reg_t ulp_ac_debounce_ctl; // [458:443]
-    sysrst_ctrl_reg2hw_ulp_lid_debounce_ctl_reg_t ulp_lid_debounce_ctl; // [442:427]
-    sysrst_ctrl_reg2hw_ulp_pwrb_debounce_ctl_reg_t ulp_pwrb_debounce_ctl; // [426:411]
-    sysrst_ctrl_reg2hw_ulp_ctl_reg_t ulp_ctl; // [410:410]
-    sysrst_ctrl_reg2hw_wkup_status_reg_t wkup_status; // [409:409]
-    sysrst_ctrl_reg2hw_key_invert_ctl_reg_t key_invert_ctl; // [408:397]
-    sysrst_ctrl_reg2hw_pin_allowed_ctl_reg_t pin_allowed_ctl; // [396:381]
-    sysrst_ctrl_reg2hw_pin_out_ctl_reg_t pin_out_ctl; // [380:373]
-    sysrst_ctrl_reg2hw_pin_out_value_reg_t pin_out_value; // [372:365]
-    sysrst_ctrl_reg2hw_key_intr_ctl_reg_t key_intr_ctl; // [364:351]
-    sysrst_ctrl_reg2hw_key_intr_debounce_ctl_reg_t key_intr_debounce_ctl; // [350:335]
-    sysrst_ctrl_reg2hw_auto_block_debounce_ctl_reg_t auto_block_debounce_ctl; // [334:318]
-    sysrst_ctrl_reg2hw_auto_block_out_ctl_reg_t auto_block_out_ctl; // [317:312]
-    sysrst_ctrl_reg2hw_com_pre_sel_ctl_mreg_t [3:0] com_pre_sel_ctl; // [311:292]
-    sysrst_ctrl_reg2hw_com_pre_det_ctl_mreg_t [3:0] com_pre_det_ctl; // [291:164]
-    sysrst_ctrl_reg2hw_com_sel_ctl_mreg_t [3:0] com_sel_ctl; // [163:144]
-    sysrst_ctrl_reg2hw_com_det_ctl_mreg_t [3:0] com_det_ctl; // [143:16]
-    sysrst_ctrl_reg2hw_com_out_ctl_mreg_t [3:0] com_out_ctl; // [15:0]
+    sysrst_ctrl_reg2hw_intr_state_reg_t intr_state; // [499:499]
+    sysrst_ctrl_reg2hw_intr_enable_reg_t intr_enable; // [498:498]
+    sysrst_ctrl_reg2hw_intr_test_reg_t intr_test; // [497:496]
+    sysrst_ctrl_reg2hw_alert_test_reg_t alert_test; // [495:494]
+    sysrst_ctrl_reg2hw_ec_rst_ctl_reg_t ec_rst_ctl; // [493:478]
+    sysrst_ctrl_reg2hw_ulp_ac_debounce_ctl_reg_t ulp_ac_debounce_ctl; // [477:462]
+    sysrst_ctrl_reg2hw_ulp_lid_debounce_ctl_reg_t ulp_lid_debounce_ctl; // [461:446]
+    sysrst_ctrl_reg2hw_ulp_pwrb_debounce_ctl_reg_t ulp_pwrb_debounce_ctl; // [445:430]
+    sysrst_ctrl_reg2hw_ulp_ctl_reg_t ulp_ctl; // [429:429]
+    sysrst_ctrl_reg2hw_ulp_status_reg_t ulp_status; // [428:428]
+    sysrst_ctrl_reg2hw_wkup_status_reg_t wkup_status; // [427:427]
+    sysrst_ctrl_reg2hw_key_invert_ctl_reg_t key_invert_ctl; // [426:415]
+    sysrst_ctrl_reg2hw_pin_allowed_ctl_reg_t pin_allowed_ctl; // [414:399]
+    sysrst_ctrl_reg2hw_pin_out_ctl_reg_t pin_out_ctl; // [398:391]
+    sysrst_ctrl_reg2hw_pin_out_value_reg_t pin_out_value; // [390:383]
+    sysrst_ctrl_reg2hw_key_intr_ctl_reg_t key_intr_ctl; // [382:369]
+    sysrst_ctrl_reg2hw_key_intr_debounce_ctl_reg_t key_intr_debounce_ctl; // [368:353]
+    sysrst_ctrl_reg2hw_auto_block_debounce_ctl_reg_t auto_block_debounce_ctl; // [352:336]
+    sysrst_ctrl_reg2hw_auto_block_out_ctl_reg_t auto_block_out_ctl; // [335:330]
+    sysrst_ctrl_reg2hw_com_pre_sel_ctl_mreg_t [3:0] com_pre_sel_ctl; // [329:310]
+    sysrst_ctrl_reg2hw_com_pre_det_ctl_mreg_t [3:0] com_pre_det_ctl; // [309:182]
+    sysrst_ctrl_reg2hw_com_sel_ctl_mreg_t [3:0] com_sel_ctl; // [181:162]
+    sysrst_ctrl_reg2hw_com_det_ctl_mreg_t [3:0] com_det_ctl; // [161:34]
+    sysrst_ctrl_reg2hw_com_out_ctl_mreg_t [3:0] com_out_ctl; // [33:18]
+    sysrst_ctrl_reg2hw_combo_intr_status_reg_t combo_intr_status; // [17:14]
+    sysrst_ctrl_reg2hw_key_intr_status_reg_t key_intr_status; // [13:0]
   } sysrst_ctrl_reg2hw_t;
 
   // HW -> register type
diff --git a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_top.sv b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_top.sv
index 04d3c52cee0a2b..2bc879edb8d0d1 100644
--- a/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_top.sv
+++ b/hw/ip/sysrst_ctrl/rtl/sysrst_ctrl_reg_top.sv
@@ -123,9 +123,7 @@ module sysrst_ctrl_reg_top (
   // Define SW related signals
   // Format: <reg>_<field>_{wd|we|qs}
   //        or <reg>_{wd|we|qs} if field == 1 or 0
-  logic intr_state_we;
   logic intr_state_qs;
-  logic intr_state_wd;
   logic intr_enable_we;
   logic intr_enable_qs;
   logic intr_enable_wd;
@@ -1827,7 +1825,7 @@ module sysrst_ctrl_reg_top (
   // R[intr_state]: V(False)
   prim_subreg #(
     .DW      (1),
-    .SwAccess(prim_subreg_pkg::SwAccessW1C),
+    .SwAccess(prim_subreg_pkg::SwAccessRO),
     .RESVAL  (1'h0),
     .Mubi    (1'b0)
   ) u_intr_state (
@@ -1835,8 +1833,8 @@ module sysrst_ctrl_reg_top (
     .rst_ni  (rst_ni),
 
     // from register interface
-    .we     (intr_state_we),
-    .wd     (intr_state_wd),
+    .we     (1'b0),
+    .wd     ('0),
 
     // from internal hardware
     .de     (hw2reg.intr_state.de),
@@ -2123,7 +2121,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.ulp_status.q),
     .ds     (),
 
     // to register interface (read)
@@ -6085,7 +6083,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.combo_intr_status.combo0_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6112,7 +6110,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.combo_intr_status.combo1_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6139,7 +6137,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.combo_intr_status.combo2_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6166,7 +6164,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.combo_intr_status.combo3_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6195,7 +6193,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.pwrb_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6222,7 +6220,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.key0_in_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6249,7 +6247,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.key1_in_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6276,7 +6274,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.key2_in_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6303,7 +6301,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.ac_present_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6330,7 +6328,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.ec_rst_l_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6357,7 +6355,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.flash_wp_l_h2l.q),
     .ds     (),
 
     // to register interface (read)
@@ -6384,7 +6382,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.pwrb_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6411,7 +6409,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.key0_in_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6438,7 +6436,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.key1_in_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6465,7 +6463,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.key2_in_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6492,7 +6490,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.ac_present_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6519,7 +6517,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.ec_rst_l_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6546,7 +6544,7 @@ module sysrst_ctrl_reg_top (
 
     // to internal hardware
     .qe     (),
-    .q      (),
+    .q      (reg2hw.key_intr_status.flash_wp_l_l2h.q),
     .ds     (),
 
     // to register interface (read)
@@ -6654,9 +6652,6 @@ module sysrst_ctrl_reg_top (
   end
 
   // Generate write-enables
-  assign intr_state_we = addr_hit[0] & reg_we & !reg_error;
-
-  assign intr_state_wd = reg_wdata[0];
   assign intr_enable_we = addr_hit[1] & reg_we & !reg_error;
 
   assign intr_enable_wd = reg_wdata[0];
@@ -6885,7 +6880,7 @@ module sysrst_ctrl_reg_top (
   // Assign write-enables to checker logic vector.
   always_comb begin
     reg_we_check = '0;
-    reg_we_check[0] = intr_state_we;
+    reg_we_check[0] = 1'b0;
     reg_we_check[1] = intr_enable_we;
     reg_we_check[2] = intr_test_we;
     reg_we_check[3] = alert_test_we;
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 4fd7157eb1cc45..10963aa7005a04 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -14283,7 +14283,7 @@
       width: 1
       type: interrupt
       module_name: sysrst_ctrl_aon
-      intr_type: IntrType.Event
+      intr_type: IntrType.Status
       default_val: false
     }
     {
diff --git a/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen.c b/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen.c
index 71eda0b27af9f4..05d16bd99e23c5 100644
--- a/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen.c
+++ b/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen.c
@@ -65,7 +65,7 @@ static bool sysrst_ctrl_get_irq_bit_index(dif_sysrst_ctrl_irq_t irq,
 }
 
 static dif_irq_type_t irq_types[] = {
-    kDifIrqTypeEvent,
+    kDifIrqTypeStatus,
 };
 
 OT_WARN_UNUSED_RESULT
diff --git a/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen_unittest.cc b/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen_unittest.cc
index ebfec8c7eb139d..608699f04cb80e 100644
--- a/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen_unittest.cc
+++ b/sw/device/lib/dif/autogen/dif_sysrst_ctrl_autogen_unittest.cc
@@ -85,7 +85,7 @@ TEST_F(IrqGetTypeTest, Success) {
 
   EXPECT_DIF_OK(dif_sysrst_ctrl_irq_get_type(
       &sysrst_ctrl_, kDifSysrstCtrlIrqEventDetected, &type));
-  EXPECT_EQ(type, kDifIrqTypeEvent);
+  EXPECT_EQ(type, kDifIrqTypeStatus);
 }
 
 class IrqGetStateTest : public SysrstCtrlTest {};
diff --git a/sw/device/lib/testing/autogen/isr_testutils.c b/sw/device/lib/testing/autogen/isr_testutils.c
index 56cc1419aad9c0..260fa87e08e357 100644
--- a/sw/device/lib/testing/autogen/isr_testutils.c
+++ b/sw/device/lib/testing/autogen/isr_testutils.c
@@ -866,7 +866,7 @@ void isr_testutils_spi_host_isr(
 
 void isr_testutils_sysrst_ctrl_isr(
     plic_isr_ctx_t plic_ctx, sysrst_ctrl_isr_ctx_t sysrst_ctrl_ctx,
-    top_earlgrey_plic_peripheral_t *peripheral_serviced,
+    bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
     dif_sysrst_ctrl_irq_t *irq_serviced) {
   // Claim the IRQ at the PLIC.
   dif_rv_plic_irq_id_t plic_irq_id;
@@ -900,6 +900,9 @@ void isr_testutils_sysrst_ctrl_isr(
   if (type == kDifIrqTypeEvent) {
     CHECK_DIF_OK(
         dif_sysrst_ctrl_irq_acknowledge(sysrst_ctrl_ctx.sysrst_ctrl, irq));
+  } else if (mute_status_irq) {
+    CHECK_DIF_OK(dif_sysrst_ctrl_irq_set_enabled(sysrst_ctrl_ctx.sysrst_ctrl,
+                                                 irq, kDifToggleDisabled));
   }
 
   // Complete the IRQ at the PLIC.
diff --git a/sw/device/lib/testing/autogen/isr_testutils.h b/sw/device/lib/testing/autogen/isr_testutils.h
index 5e951014b9f302..362a89342d52ff 100644
--- a/sw/device/lib/testing/autogen/isr_testutils.h
+++ b/sw/device/lib/testing/autogen/isr_testutils.h
@@ -848,13 +848,14 @@ void isr_testutils_spi_host_isr(
  *
  * @param plic_ctx A PLIC ISR context handle.
  * @param sysrst_ctrl_ctx A(n) sysrst_ctrl ISR context handle.
+ * @param mute_status_irq set to true to disable the serviced status type IRQ.
  * @param[out] peripheral_serviced Out param for the peripheral that was
  * serviced.
  * @param[out] irq_serviced Out param for the IRQ that was serviced.
  */
 void isr_testutils_sysrst_ctrl_isr(
     plic_isr_ctx_t plic_ctx, sysrst_ctrl_isr_ctx_t sysrst_ctrl_ctx,
-    top_earlgrey_plic_peripheral_t *peripheral_serviced,
+    bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
     dif_sysrst_ctrl_irq_t *irq_serviced);
 
 /**
diff --git a/sw/device/tests/autogen/plic_all_irqs_test.c b/sw/device/tests/autogen/plic_all_irqs_test.c
index c6736231da643b..e2d7f927733a35 100644
--- a/sw/device/tests/autogen/plic_all_irqs_test.c
+++ b/sw/device/tests/autogen/plic_all_irqs_test.c
@@ -983,7 +983,19 @@ void ottf_external_isr(uint32_t *exc_info) {
               "Only sysrst_ctrl_aon IRQ %d expected to fire. Actual interrupt "
               "status = %x", irq, snapshot);
 
-        CHECK_DIF_OK(dif_sysrst_ctrl_irq_acknowledge(&sysrst_ctrl_aon, irq));
+        // If this is a status type interrupt, we do not have to acknowledge the interrupt at
+        // the IP side, but we need to clear the test force register.
+        if (0x1 & (1 << irq)) {
+          CHECK_DIF_OK(dif_sysrst_ctrl_irq_force(&sysrst_ctrl_aon, irq, false));
+          // In case this status interrupt is asserted by default, we also disable it at
+          // this point so that it does not interfere with the rest of the test.
+          if ((0x0 & (1 << irq))) {
+            CHECK_DIF_OK(dif_sysrst_ctrl_irq_set_enabled(&sysrst_ctrl_aon, irq, false));
+          }
+        // If this is a regular event type interrupt, we acknowledge it at this point.
+        } else {
+          CHECK_DIF_OK(dif_sysrst_ctrl_irq_acknowledge(&sysrst_ctrl_aon, irq));
+        }
         break;
       }
 #endif
@@ -2207,6 +2219,7 @@ static void peripheral_irqs_trigger(void) {
 
 #if TEST_MIN_IRQ_PERIPHERAL <= 20 && 20 < TEST_MAX_IRQ_PERIPHERAL
   peripheral_expected = kTopEarlgreyPlicPeripheralSysrstCtrlAon;
+  status_default_mask = 0x0;
   for (dif_sysrst_ctrl_irq_t irq = kDifSysrstCtrlIrqEventDetected;
        irq <= kDifSysrstCtrlIrqEventDetected; ++irq) {
 
@@ -2214,6 +2227,14 @@ static void peripheral_irqs_trigger(void) {
     LOG_INFO("Triggering sysrst_ctrl_aon IRQ %d.", irq);
     CHECK_DIF_OK(dif_sysrst_ctrl_irq_force(&sysrst_ctrl_aon, irq, true));
 
+    // In this case, the interrupt has not been enabled yet because that would
+    // interfere with testing other interrupts. We enable it here and let the
+    // interrupt handler disable it again.
+    if ((status_default_mask & 0x1)) {
+       CHECK_DIF_OK(dif_sysrst_ctrl_irq_set_enabled(&sysrst_ctrl_aon, irq, true));
+    }
+    status_default_mask >>= 1;
+
     // This avoids a race where *irq_serviced is read before
     // entering the ISR.
     IBEX_SPIN_FOR(sysrst_ctrl_irq_serviced == irq, 1);