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[sival,clkmgr] Add test for chip_sw_clkmgr_jitter_cycle_measurements …
…testpoint Fixes lowRISC#20230 Signed-off-by: Guillermo Maturana <[email protected]>
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| Original file line number | Diff line number | Diff line change |
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| // Copyright lowRISC contributors. | ||
| // Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
| // SPDX-License-Identifier: Apache-2.0 | ||
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| #include "sw/device/lib/base/memory.h" | ||
| #include "sw/device/lib/dif/dif_rv_plic.h" | ||
| #include "sw/device/lib/dif/dif_sensor_ctrl.h" | ||
| #include "sw/device/lib/runtime/irq.h" | ||
| #include "sw/device/lib/runtime/log.h" | ||
| #include "sw/device/lib/testing/aon_timer_testutils.h" | ||
| #include "sw/device/lib/testing/clkmgr_testutils.h" | ||
| #include "sw/device/lib/testing/pwrmgr_testutils.h" | ||
| #include "sw/device/lib/testing/sensor_ctrl_testutils.h" | ||
| #include "sw/device/lib/testing/test_framework/check.h" | ||
| #include "sw/device/lib/testing/test_framework/ottf_main.h" | ||
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| #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h" | ||
| #include "sw/device/lib/testing/autogen/isr_testutils.h" | ||
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| OTTF_DEFINE_TEST_CONFIG(); | ||
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| /** | ||
| * This test measure clock counts with clkmgr frequency measurements and with | ||
| * jitter enabled, performing 100 measurements per round. Measurement errors | ||
| * (fast or slow clocks) are recorded as recoverable error in clkmgr. | ||
| * | ||
| * This assumes clocks have been calibrated: | ||
| * - for silicon validation this means clocks are calibrated, which means SV1 | ||
| * tasks are completed | ||
| * - for simulation it requires overriding the hardware behavior via plusargs | ||
| * so it runs with calibrated USB clock, or the USB clock frequency will be | ||
| * incorrect. | ||
| */ | ||
| enum { | ||
| kMeasurementsPerRound = 100, | ||
| }; | ||
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| static dif_clkmgr_t clkmgr; | ||
| static dif_pwrmgr_t pwrmgr; | ||
| static dif_rv_plic_t rv_plic; | ||
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| static plic_isr_ctx_t plic_ctx = {.rv_plic = &rv_plic, | ||
| .hart_id = kTopEarlgreyPlicTargetIbex0}; | ||
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| static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = { | ||
| .pwrmgr = &pwrmgr, | ||
| .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup, | ||
| .expected_irq = kDifPwrmgrIrqWakeup, | ||
| .is_only_irq = true}; | ||
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| static volatile bool isr_entered; | ||
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| /** | ||
| * External interrupt handler. | ||
| */ | ||
| void ottf_external_isr(void) { | ||
| dif_pwrmgr_irq_t irq_id; | ||
| top_earlgrey_plic_peripheral_t peripheral; | ||
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| isr_entered = true; | ||
| isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id); | ||
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| // Check that both the peripheral and the irq id are correct. | ||
| CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon, | ||
| "IRQ peripheral: %d is incorrect", peripheral); | ||
| CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id); | ||
| } | ||
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| bool test_main(void) { | ||
| dif_sensor_ctrl_t sensor_ctrl; | ||
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| uint32_t delay_micros = 0; | ||
| CHECK_STATUS_OK(aon_timer_testutils_get_us_from_aon_cycles( | ||
| kMeasurementsPerRound, &delay_micros)); | ||
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| // Enable global and external IRQ at Ibex. | ||
| irq_global_ctrl(true); | ||
| irq_external_ctrl(true); | ||
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| CHECK_DIF_OK(dif_clkmgr_init( | ||
| mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr)); | ||
| CHECK_DIF_OK(dif_sensor_ctrl_init( | ||
| mmio_region_from_addr(TOP_EARLGREY_SENSOR_CTRL_AON_BASE_ADDR), | ||
| &sensor_ctrl)); | ||
| CHECK_DIF_OK(dif_pwrmgr_init( | ||
| mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr)); | ||
| CHECK_DIF_OK(dif_rv_plic_init( | ||
| mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &rv_plic)); | ||
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| LOG_INFO("TEST: wait for ast init"); | ||
| IBEX_SPIN_FOR(sensor_ctrl_ast_init_done(&sensor_ctrl), 1000); | ||
| LOG_INFO("TEST: done ast init"); | ||
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| CHECK(UNWRAP(pwrmgr_testutils_is_wakeup_reason(&pwrmgr, 0)) == true); | ||
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| CHECK_STATUS_OK(clkmgr_testutils_enable_clock_counts_with_expected_thresholds( | ||
| &clkmgr, /*jitter_enabled=*/true, /*external_clk=*/false, | ||
| /*low_speed=*/false)); | ||
| busy_spin_micros(delay_micros); | ||
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| // check results | ||
| CHECK_STATUS_OK(clkmgr_testutils_check_measurement_counts(&clkmgr)); | ||
| CHECK_STATUS_OK(clkmgr_testutils_disable_clock_counts(&clkmgr)); | ||
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| CHECK(!isr_entered); | ||
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| return true; | ||
| } |