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[dv, chip]: Add pull delay and pad_in_dis_val
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Signed-off-by: Walaa Hattab <[email protected]>
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@walaahattab @eshapira
walaahattab authored and eshapira committed Jul 7, 2024
1 parent 089a15d commit 2e5d86c
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Showing 2 changed files with 25 additions and 8 deletions.
1 change: 1 addition & 0 deletions hw/top_earlgrey/dv/env/chip_env_cfg.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,7 @@ class chip_env_cfg #(type RAL_T = chip_ral_pkg::chip_reg_block) extends cip_base
uint sw_test_timeout_ns = 12_000_000; // 12ms
// delay until the pull is propagated, only available in closed-source
uint pad_pull_delay = 0;
logic pad_in_dis_val = 1'bz;
sw_logger_vif sw_logger_vif;
sw_test_status_vif sw_test_status_vif;
ast_supply_vif ast_supply_vif;
Expand Down
32 changes: 24 additions & 8 deletions hw/top_earlgrey/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -456,9 +456,9 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
InselOne: exp_in = 1;
InselPad: begin
exp_in = cfg.chip_vif.mios_if.pins[pad];
if (mio_pad_attr[pad].invert && exp_in !== 1'bz) exp_in = ~exp_in;
if (exp_in === 1'bz && mio_pad_attr[i].pull_en) exp_in = mio_pad_attr[i].pull_select;
exp_in = mio_pad_attr[pad].input_disable ? 1'bz : exp_in;
exp_in = mio_pad_attr[pad].input_disable ? cfg.pad_in_dis_val : exp_in;
if (mio_pad_attr[pad].invert && exp_in !== 1'bz) exp_in = ~exp_in;
end
default: ;
endcase
Expand Down Expand Up @@ -566,7 +566,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
`DV_CHECK(dio_pad_attr[i].pull_en)
exp = dio_pad_attr[i].pull_select;
end
if (dio_pad_attr[i].input_disable) exp = 1'bz;
if (dio_pad_attr[i].input_disable) exp = cfg.pad_in_dis_val;
if (dio_pad_attr[i].invert) exp = ~exp;
if (exp === 1'bz) exp = 1'bx; // Undriven input treated as x.
`DV_CHECK_CASE_EQ(exp, cfg.chip_vif.dio_to_periph[i], msg)
Expand Down Expand Up @@ -600,7 +600,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
end
default: ;
endcase
exp_in = dio_pad_attr[i].input_disable ? 1'bz : exp_in;
exp_in = dio_pad_attr[i].input_disable ? cfg.pad_in_dis_val : exp_in;
if (exp_in === 1'bz) exp_in = 1'bx; // Undriven input treated as x.
if (dio_pad_attr[i].invert) exp_in = ~exp_in;
`DV_CHECK_CASE_EQ(exp_in, cfg.chip_vif.dio_to_periph[i], msg)
Expand Down Expand Up @@ -629,6 +629,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
.predict(1));
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[0].pull_en), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.cc_if.pins[0]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -639,6 +640,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull-up
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[0].pull_select), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.cc_if.pins[0]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -649,6 +651,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull disabled
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[0].pull_en), .value(1'b0), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.cc_if.pins[0]);
`DV_CHECK_STREQ(obs_strength, "HiZ", "on CC1")
// ---------------------------------------------------------------------------------------------
Expand All @@ -662,6 +665,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
.predict(1));
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[1].pull_en), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.cc_if.pins[1]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -672,6 +676,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull-up
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[1].pull_select), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.cc_if.pins[1]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -682,6 +687,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull disabled
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[1].pull_en), .value(1'b0), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.cc_if.pins[1]);
`DV_CHECK_STREQ(obs_strength, "HiZ", "on CC2")
// ---------------------------------------------------------------------------------------------
Expand All @@ -695,6 +701,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
.predict(1));
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[2].pull_en), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[0]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -705,6 +712,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull-up
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[2].pull_select), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[0]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -715,6 +723,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull disabled
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[2].pull_en), .value(1'b0), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[0]);
`DV_CHECK_STREQ(obs_strength, "HiZ", "on FLASH_TEST_MODE0")
// ---------------------------------------------------------------------------------------------
Expand All @@ -728,6 +737,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
.predict(1));
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[3].pull_en), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[1]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -738,6 +748,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull-up
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[3].pull_select), .value(1'b1), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[1]);
`ifdef VCS
// TODO(#18988): Drive strengh seems to be reported incorrectly by VCS.
Expand All @@ -748,6 +759,7 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
// - pull disabled
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[3].pull_en), .value(1'b0), .blocking(1),
.predict(1));
#(cfg.pad_pull_delay * 1ns);
obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[1]);
`DV_CHECK_STREQ(obs_strength, "HiZ", "on FLASH_TEST_MODE1")
// ---------------------------------------------------------------------------------------------
Expand All @@ -761,6 +773,10 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;

task check_manual_dios_input_disable();
logic act;
logic lsb_exp_val;

lsb_exp_val = cfg.pad_in_dis_val;
if (cfg.pad_in_dis_val === 1'bz) lsb_exp_val = 1'bx;

cfg.chip_vif.cc_if.drive('1);
cfg.chip_vif.io_div4_clk_rst_if.wait_clks(1);
Expand All @@ -769,13 +785,13 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[0].input_disable), .value(1'b1), .blocking(1),
.predict(1));
act = hdl_read_lsb("tb.dut.manual_in_cc1");
`DV_CHECK_CASE_EQ(1'bx, act)
`DV_CHECK_CASE_EQ(lsb_exp_val, act)
act = hdl_read_lsb("tb.dut.manual_in_cc2");
`DV_CHECK_CASE_EQ(1'b1, act)
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[1].input_disable), .value(1'b1), .blocking(1),
.predict(1));
act = hdl_read_lsb("tb.dut.manual_in_cc2");
`DV_CHECK_CASE_EQ(1'bx, act)
`DV_CHECK_CASE_EQ(lsb_exp_val, act)

cfg.chip_vif.flash_test_mode_if.drive('1);
cfg.chip_vif.io_div4_clk_rst_if.wait_clks(1);
Expand All @@ -784,13 +800,13 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[2].input_disable), .value(1'b1), .blocking(1),
.predict(1));
act = hdl_read_lsb("tb.dut.manual_in_flash_test_mode0");
`DV_CHECK_CASE_EQ(1'bx, act)
`DV_CHECK_CASE_EQ(lsb_exp_val, act)
act = hdl_read_lsb("tb.dut.manual_in_flash_test_mode1");
`DV_CHECK_CASE_EQ(1'b1, act)
csr_wr(.ptr(ral.sensor_ctrl_aon.manual_pad_attr[3].input_disable), .value(1'b1), .blocking(1),
.predict(1));
act = hdl_read_lsb("tb.dut.manual_in_flash_test_mode1");
`DV_CHECK_CASE_EQ(1'bx, act)
`DV_CHECK_CASE_EQ(lsb_exp_val, act)
endtask

endclass

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