From 6cc31fb36fa330325b2bb0ffde3a7288384e58ab Mon Sep 17 00:00:00 2001 From: Ryan OShea <86965113+ArmRyan@users.noreply.github.com> Date: Tue, 5 Mar 2024 09:52:07 +0000 Subject: [PATCH] Int4 Depthwise performance improvement (#117) * Fix unit test generation for depthwise * Add new unit tests for arm_depthwise_conv_s4_generic * Improved performance for arm_depthwise_conv_s4_generic * Fix buffer allocation for arm_depthwise_conv_s4_generic unit tests Change-Id: I87543d055e936481f406f1d0872debcf87efdbdd Signed-off-by: Ryan O'Shea --- .../arm_depthwise_conv_s4.c | 453 +++++++++++++---- .../depthwise_int4_generic_5/biases_data.h | 9 + .../depthwise_int4_generic_5/config_data.h | 25 + .../depthwise_int4_generic_5/input_data.h | 471 ++++++++++++++++++ .../output_mult_data.h | 9 + .../output_ref_data.h | 79 +++ .../output_shift_data.h | 7 + .../depthwise_int4_generic_5/test_data.h | 9 + .../depthwise_int4_generic_5/weights_data.h | 18 + .../depthwise_int4_generic_6/biases_data.h | 17 + .../depthwise_int4_generic_6/config_data.h | 25 + .../depthwise_int4_generic_6/input_data.h | 99 ++++ .../output_mult_data.h | 17 + .../output_ref_data.h | 136 +++++ .../output_shift_data.h | 6 + .../depthwise_int4_generic_6/test_data.h | 9 + .../depthwise_int4_generic_6/weights_data.h | 9 + .../Unity/unity_test_arm_depthwise_conv_s4.c | 4 +- .../test_arm_depthwise_conv_s4.c | 206 +++++++- .../test_arm_depthwise_conv_s4_opt.c | 6 +- Tests/UnitTest/conv_settings.py | 21 +- Tests/UnitTest/generate_test_data.py | 46 ++ 22 files changed, 1572 insertions(+), 109 deletions(-) create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/biases_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/config_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/input_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_mult_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_ref_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_shift_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/test_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/weights_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/biases_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/config_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/input_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_mult_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_ref_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_shift_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/test_data.h create mode 100644 Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/weights_data.h diff --git a/Source/ConvolutionFunctions/arm_depthwise_conv_s4.c b/Source/ConvolutionFunctions/arm_depthwise_conv_s4.c index de9e7476..ed387bbf 100644 --- a/Source/ConvolutionFunctions/arm_depthwise_conv_s4.c +++ b/Source/ConvolutionFunctions/arm_depthwise_conv_s4.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -21,8 +21,8 @@ * Title: arm_depthwise_conv_s4.c * Description: s4 version of depthwise convolution. * - * $Date: 31 October 2023 - * $Revision: V.1.0.0 + * $Date: 13 February 2024 + * $Revision: V.1.1.0 * * Target : Arm(R) M-Profile Architecture * @@ -73,145 +73,412 @@ static void depthwise_conv_s4_generic(const int8_t *input, int i_batch; const int32_t kernel_index_offset = input_ch >> 1; - - for (i_batch = 0; i_batch < input_batches; i_batch++) + if (!(input_ch % 2)) { - for (int i_out_y = 0; i_out_y < output_y; i_out_y++) + for (i_batch = 0; i_batch < input_batches; i_batch++) { - const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; - for (int i_out_x = 0; i_out_x < output_x; i_out_x++) + for (int i_out_y = 0; i_out_y < output_y; i_out_y++) { - const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; - int idx_out_ch_s4 = 0; - int get_low_nibble = 1; - - for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) + const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; + for (int i_out_x = 0; i_out_x < output_x; i_out_x++) { - for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++) + const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; + int idx_out_ch_s4 = 0; + int get_low_nibble = 1; + + // If ch_mult is 1 we can process 2 outputs at a time by doing 2 input_ch iterations + if (ch_mult == 1) { - const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; - if (idx_out_ch && (idx_out_ch % 2 == 0)) + for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch += 2, idx_out_ch_s4++) { - idx_out_ch_s4++; - } - - int16_t kernel_index_offset_uneven = 0; - int32_t acc_0 = 0; + int32_t acc_0 = 0; + int32_t acc_1 = 0; - int ker_y_start; - int ker_x_start; - int ker_y_end; - int ker_x_end; + int ker_y_start; + int ker_x_start; + int ker_y_end; + int ker_x_end; - if (dilation_x > 1) - { - const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; - ker_x_start = MAX(0, start_x_max); - const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; - ker_x_end = MIN(kernel_x, end_min_x); - } - else - { - ker_x_start = MAX(0, -base_idx_x); - ker_x_end = MIN(kernel_x, input_x - base_idx_x); - } + if (dilation_x > 1) + { + const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; + ker_x_start = MAX(0, start_x_max); + const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; + ker_x_end = MIN(kernel_x, end_min_x); + } + else + { + ker_x_start = MAX(0, -base_idx_x); + ker_x_end = MIN(kernel_x, input_x - base_idx_x); + } - if (dilation_y > 1) - { - const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; - ker_y_start = MAX(0, start_y_max); - const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; - ker_y_end = MIN(kernel_y, end_min_y); - } - else - { - ker_y_start = MAX(0, -base_idx_y); - ker_y_end = MIN(kernel_y, input_y - base_idx_y); - } + if (dilation_y > 1) + { + const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; + ker_y_start = MAX(0, start_y_max); + const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; + ker_y_end = MIN(kernel_y, end_min_y); + } + else + { + ker_y_start = MAX(0, -base_idx_y); + ker_y_end = MIN(kernel_y, input_y - base_idx_y); + } - if (bias) - { - acc_0 = bias[idx_out_ch]; - } + if (bias) + { + acc_0 = bias[i_input_ch]; + acc_1 = bias[i_input_ch + 1]; + } - if (input_ch % 2) - { + int32_t idx_y = base_idx_y + dilation_y * ker_y_start; for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) { - const int32_t idx_y = base_idx_y + dilation_y * i_ker_y; + int32_t idx_x = base_idx_x + dilation_x * ker_x_start; + int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; + + int32_t ker_idx_0 = + (i_ker_y * kernel_x + ker_x_start) * kernel_index_offset + idx_out_ch_s4; + for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) { - int8_t ker_val; - const int32_t idx_x = base_idx_x + dilation_x * i_ker_x; + int8_t ker_val0, ker_val1; + + ker_val0 = ((int8_t)(kernel[ker_idx_0] << 4) >> 4); + ker_val1 = (kernel[ker_idx_0] >> 4); + + acc_0 += (input[idx_0] + input_offset) * ker_val0; + acc_1 += (input[idx_0 + 1] + input_offset) * ker_val1; + + idx_0 += dilation_x * input_ch; + idx_x += dilation_x; + ker_idx_0 += kernel_index_offset; + } + idx_y += dilation_y; + } + + /* Requantize and clamp output to provided range */ + acc_0 = arm_nn_requantize(acc_0, output_mult[i_input_ch], output_shift[i_input_ch]); + acc_0 += output_offset; + acc_0 = MAX(acc_0, output_activation_min); + acc_0 = MIN(acc_0, output_activation_max); + output[i_out++] = acc_0; + + acc_1 = arm_nn_requantize(acc_1, output_mult[i_input_ch + 1], output_shift[i_input_ch + 1]); + acc_1 += output_offset; + acc_1 = MAX(acc_1, output_activation_min); + acc_1 = MIN(acc_1, output_activation_max); + output[i_out++] = acc_1; + } + } + // if ch_mult is odd and greater than 1, we need to continue to process 1 output at a time + else if (ch_mult % 2) + { + for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) + { + for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++) + { + const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; + if (idx_out_ch && (idx_out_ch % 2 == 0)) + { + idx_out_ch_s4++; + } + + int32_t acc_0 = 0; + + int ker_y_start; + int ker_x_start; + int ker_y_end; + int ker_x_end; + + if (dilation_x > 1) + { + const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; + ker_x_start = MAX(0, start_x_max); + const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; + ker_x_end = MIN(kernel_x, end_min_x); + } + else + { + ker_x_start = MAX(0, -base_idx_x); + ker_x_end = MIN(kernel_x, input_x - base_idx_x); + } + + if (dilation_y > 1) + { + const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; + ker_y_start = MAX(0, start_y_max); + const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; + ker_y_end = MIN(kernel_y, end_min_y); + } + else + { + ker_y_start = MAX(0, -base_idx_y); + ker_y_end = MIN(kernel_y, input_y - base_idx_y); + } + + if (bias) + { + acc_0 = bias[idx_out_ch]; + } + + int32_t idx_y = base_idx_y + dilation_y * ker_y_start; + for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) + { + int32_t idx_x = base_idx_x + dilation_x * ker_x_start; int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; + int32_t ker_idx_0 = - (i_ker_y * kernel_x + i_ker_x) * (kernel_index_offset * ch_mult) + - idx_out_ch_s4 + kernel_index_offset_uneven; + (i_ker_y * kernel_x + ker_x_start) * (kernel_index_offset * ch_mult) + + idx_out_ch_s4; - if (get_low_nibble) - { - get_low_nibble = 0; - ker_val = ((int8_t)(kernel[ker_idx_0] << 4) >> 4); - } - else + for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) { - ker_val = (kernel[ker_idx_0] >> 4); - get_low_nibble = 1; - kernel_index_offset_uneven++; - } + int8_t ker_val0; - acc_0 += (input[idx_0] + input_offset) * ker_val; + if (get_low_nibble) + { + ker_val0 = ((int8_t)(kernel[ker_idx_0] << 4) >> 4); + } + else + { + ker_val0 = (kernel[ker_idx_0] >> 4); + } + + acc_0 += (input[idx_0] + input_offset) * ker_val0; + + idx_0 += dilation_x * input_ch; + idx_x += dilation_x; + ker_idx_0 += (kernel_index_offset * ch_mult); + } + idx_y += dilation_y; } + get_low_nibble = !get_low_nibble; + + /* Requantize and clamp output to provided range */ + acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]); + acc_0 += output_offset; + acc_0 = MAX(acc_0, output_activation_min); + acc_0 = MIN(acc_0, output_activation_max); + output[i_out++] = acc_0; } - if ((kernel_x * kernel_y) % 2) + } + } + // if ch_mult is even then we can do 2 outputs at a time by processing 2 ch_mult iterations + else + { + for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) + { + // ch_mult is limited to being a multiple of input_ch. + // This means that we can assume ch_mult is a multiple of 2 given that input_ch is even + for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult += 2, idx_out_ch_s4++) { - kernel_index_offset_uneven++; - get_low_nibble = !get_low_nibble; + const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; + + int32_t acc_0 = 0; + int32_t acc_1 = 0; + + int ker_y_start; + int ker_x_start; + int ker_y_end; + int ker_x_end; + + if (dilation_x > 1) + { + const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; + ker_x_start = MAX(0, start_x_max); + const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; + ker_x_end = MIN(kernel_x, end_min_x); + } + else + { + ker_x_start = MAX(0, -base_idx_x); + ker_x_end = MIN(kernel_x, input_x - base_idx_x); + } + + if (dilation_y > 1) + { + const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; + ker_y_start = MAX(0, start_y_max); + const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; + ker_y_end = MIN(kernel_y, end_min_y); + } + else + { + ker_y_start = MAX(0, -base_idx_y); + ker_y_end = MIN(kernel_y, input_y - base_idx_y); + } + + if (bias) + { + acc_0 = bias[idx_out_ch]; + acc_1 = bias[idx_out_ch + 1]; + } + + int32_t idx_y = base_idx_y + dilation_y * ker_y_start; + for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) + { + int32_t idx_x = base_idx_x + dilation_x * ker_x_start; + int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; + + int32_t ker_idx_0 = + (i_ker_y * kernel_x + ker_x_start) * (kernel_index_offset * ch_mult) + + idx_out_ch_s4; + + for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) + { + int8_t ker_val0, ker_val1; + + ker_val0 = ((int8_t)(kernel[ker_idx_0] << 4) >> 4); + ker_val1 = (kernel[ker_idx_0] >> 4); + + acc_0 += (input[idx_0] + input_offset) * ker_val0; + acc_1 += (input[idx_0] + input_offset) * ker_val1; + + idx_0 += dilation_x * input_ch; + idx_x += dilation_x; + ker_idx_0 += (kernel_index_offset * ch_mult); + } + idx_y += dilation_y; + } + + /* Requantize and clamp output to provided range */ + acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]); + acc_0 += output_offset; + acc_0 = MAX(acc_0, output_activation_min); + acc_0 = MIN(acc_0, output_activation_max); + output[i_out++] = acc_0; + + acc_1 = + arm_nn_requantize(acc_1, output_mult[idx_out_ch + 1], output_shift[idx_out_ch + 1]); + acc_1 += output_offset; + acc_1 = MAX(acc_1, output_activation_min); + acc_1 = MIN(acc_1, output_activation_max); + output[i_out++] = acc_1; } } - else + } + } + } + /* Advance to the next batch */ + input += (input_x * input_y * input_ch); + } + } + else + { + for (i_batch = 0; i_batch < input_batches; i_batch++) + { + for (int i_out_y = 0; i_out_y < output_y; i_out_y++) + { + const int16_t base_idx_y = (i_out_y * stride_y) - pad_y; + for (int i_out_x = 0; i_out_x < output_x; i_out_x++) + { + const int16_t base_idx_x = (i_out_x * stride_x) - pad_x; + int idx_out_ch_s4 = 0; + int get_low_nibble = 1; + + for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++) + { + for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++) { + const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult; + if (idx_out_ch && (idx_out_ch % 2 == 0)) + { + idx_out_ch_s4++; + } + + int16_t kernel_index_offset_uneven = 0; + int32_t acc_0 = 0; + + int ker_y_start; + int ker_x_start; + int ker_y_end; + int ker_x_end; + + if (dilation_x > 1) + { + const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x; + ker_x_start = MAX(0, start_x_max); + const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x; + ker_x_end = MIN(kernel_x, end_min_x); + } + else + { + ker_x_start = MAX(0, -base_idx_x); + ker_x_end = MIN(kernel_x, input_x - base_idx_x); + } + + if (dilation_y > 1) + { + const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y; + ker_y_start = MAX(0, start_y_max); + const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y; + ker_y_end = MIN(kernel_y, end_min_y); + } + else + { + ker_y_start = MAX(0, -base_idx_y); + ker_y_end = MIN(kernel_y, input_y - base_idx_y); + } + + if (bias) + { + acc_0 = bias[idx_out_ch]; + } + int32_t idx_y = base_idx_y + dilation_y * ker_y_start; for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++) { - const int32_t idx_y = base_idx_y + dilation_y * i_ker_y; + int32_t idx_x = base_idx_x + dilation_x * ker_x_start; + int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; + + int32_t ker_idx_0 = + (i_ker_y * kernel_x + ker_x_start) * (kernel_index_offset * ch_mult) + + idx_out_ch_s4 + kernel_index_offset_uneven; + for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++) { int8_t ker_val; - const int32_t idx_x = base_idx_x + dilation_x * i_ker_x; - int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch; - int32_t ker_idx_0 = - (i_ker_y * kernel_x + i_ker_x) * (kernel_index_offset * ch_mult) + - idx_out_ch_s4; if (get_low_nibble) { + get_low_nibble = 0; ker_val = ((int8_t)(kernel[ker_idx_0] << 4) >> 4); } else { ker_val = (kernel[ker_idx_0] >> 4); + get_low_nibble = 1; + kernel_index_offset_uneven++; } acc_0 += (input[idx_0] + input_offset) * ker_val; + idx_0 += dilation_x * input_ch; + idx_x += dilation_x; + ker_idx_0 += (kernel_index_offset * ch_mult) + get_low_nibble; } + idx_y += dilation_y; } - } - get_low_nibble = !get_low_nibble; + if ((kernel_x * kernel_y) % 2) + { + get_low_nibble = !get_low_nibble; + } + get_low_nibble = !get_low_nibble; - /* Requantize and clamp output to provided range */ - acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]); - acc_0 += output_offset; - acc_0 = MAX(acc_0, output_activation_min); - acc_0 = MIN(acc_0, output_activation_max); + /* Requantize and clamp output to provided range */ + acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]); + acc_0 += output_offset; + acc_0 = MAX(acc_0, output_activation_min); + acc_0 = MIN(acc_0, output_activation_max); - output[i_out++] = acc_0; + output[i_out++] = acc_0; + } } } } - } - /* Advance to the next batch */ - input += (input_x * input_y * input_ch); + /* Advance to the next batch */ + input += (input_x * input_y * input_ch); + } } } @@ -239,7 +506,6 @@ arm_cmsis_nn_status arm_depthwise_conv_s4(const cmsis_nn_context *ctx, const int32_t dilation_x = dw_conv_params->dilation.w; const int32_t dilation_y = dw_conv_params->dilation.h; - depthwise_conv_s4_generic(input, input_dims->n, input_dims->w, @@ -266,7 +532,6 @@ arm_cmsis_nn_status arm_depthwise_conv_s4(const cmsis_nn_context *ctx, dw_conv_params->activation.max, dilation_x, dilation_y); - /* Return to application */ return ARM_CMSIS_NN_SUCCESS; } diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/biases_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/biases_data.h new file mode 100644 index 00000000..0255074d --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/biases_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int32_t depthwise_int4_generic_5_biases[20] = {-8594325, -1703598848, 1687007744, -571777664, 521577216, + 2024419072, -263814048, -794905728, 1743926656, -1629277440, + -1894920320, -219097952, -2074920448, 942072256, -156722528, + -1605767168, -181432688, 1205177728, 552752768, -2036018944}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/config_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/config_data.h new file mode 100644 index 00000000..fc037fd8 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/config_data.h @@ -0,0 +1,25 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#define DEPTHWISE_INT4_GENERIC_5_OUT_CH 20 +#define DEPTHWISE_INT4_GENERIC_5_IN_CH 20 +#define DEPTHWISE_INT4_GENERIC_5_INPUT_W 21 +#define DEPTHWISE_INT4_GENERIC_5_INPUT_H 21 +#define DEPTHWISE_INT4_GENERIC_5_DST_SIZE 1820 +#define DEPTHWISE_INT4_GENERIC_5_INPUT_SIZE 8820 +#define DEPTHWISE_INT4_GENERIC_5_OUT_ACTIVATION_MIN -127 +#define DEPTHWISE_INT4_GENERIC_5_OUT_ACTIVATION_MAX 125 +#define DEPTHWISE_INT4_GENERIC_5_INPUT_BATCHES 1 +#define DEPTHWISE_INT4_GENERIC_5_FILTER_X 5 +#define DEPTHWISE_INT4_GENERIC_5_FILTER_Y 5 +#define DEPTHWISE_INT4_GENERIC_5_STRIDE_X 1 +#define DEPTHWISE_INT4_GENERIC_5_STRIDE_Y 2 +#define DEPTHWISE_INT4_GENERIC_5_PAD_X 0 +#define DEPTHWISE_INT4_GENERIC_5_PAD_Y 0 +#define DEPTHWISE_INT4_GENERIC_5_OUTPUT_W 13 +#define DEPTHWISE_INT4_GENERIC_5_OUTPUT_H 7 +#define DEPTHWISE_INT4_GENERIC_5_CH_MULT 1 +#define DEPTHWISE_INT4_GENERIC_5_INPUT_OFFSET 128 +#define DEPTHWISE_INT4_GENERIC_5_OUTPUT_OFFSET -2 +#define DEPTHWISE_INT4_GENERIC_5_DILATION_X 2 +#define DEPTHWISE_INT4_GENERIC_5_DILATION_Y 2 diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/input_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/input_data.h new file mode 100644 index 00000000..2ce8ba84 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/input_data.h @@ -0,0 +1,471 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int8_t depthwise_int4_generic_5_input[8820] = { + -39, 59, 21, 68, 26, -97, -54, 5, 97, 90, -50, -46, 88, -12, 9, 51, -103, 103, 70, + 111, -116, -75, -95, 98, -45, -118, -13, 48, -90, 67, 44, -120, -12, -15, -127, -5, -19, -79, + -35, -11, 84, 38, 119, -38, 92, -2, -11, -127, 52, 93, -111, -18, 61, -22, -30, 20, -67, + 93, -107, -32, 13, -125, 24, 73, -73, 110, 62, 88, 106, -77, -39, -41, -112, -108, 35, 3, + 29, -73, -89, -55, 36, -72, -118, 31, -18, 0, 0, 105, 98, 117, 21, -78, 18, -45, 29, + 34, -28, -69, 62, 99, 49, 103, 72, 81, -29, 45, -61, -113, -78, 3, -19, -35, -74, 96, + 45, 47, 110, 54, 97, -98, 57, -114, -35, -125, -58, -17, -85, 56, 26, -52, -80, -43, -100, + -121, 11, -16, 55, 79, -56, -71, 93, 75, -124, 59, 20, -16, -117, -6, 24, -124, -66, -48, + -8, -19, -36, -101, -25, -37, 71, -90, 102, 44, -83, 60, -6, 75, -46, -9, -102, -105, 85, + -31, -53, 52, 7, 85, -85, 28, 38, 49, -96, 106, 92, -21, 83, 74, 54, -77, -11, 70, + 125, 0, -122, -110, -90, -113, 118, 13, 116, -22, -77, -67, 14, 126, 47, 32, -122, -14, -46, + -19, 71, -52, 0, 13, 29, -43, 55, -11, -66, -128, -18, -55, 48, 68, 33, 120, 90, -18, + 16, 92, -92, 59, -113, 108, 119, 108, 1, 25, 99, 40, -67, -97, 6, 109, 86, -63, 6, + -33, 27, 36, -67, 31, -47, 79, -54, -39, 54, 60, -93, -80, -46, 66, 46, -76, -90, 10, + -120, 12, -119, -36, -2, 13, -39, -8, -123, 77, 61, -63, 52, -93, 42, 59, -98, 27, -54, + 42, -92, 120, 47, 91, -42, 97, -38, 84, 125, 8, 99, -40, -60, -39, 23, -58, 75, 24, + -42, 86, 52, -127, -10, -91, -107, 123, -88, 79, 96, 24, 115, -63, 81, 86, 57, 50, 119, + -44, -75, 10, -101, -7, 60, 93, 33, 30, 98, -104, 107, 40, 12, -42, -29, -29, -120, 38, + 4, -85, 109, -94, -15, 83, -79, 36, -70, 2, -109, 91, -105, -37, 36, -108, -111, -89, -10, + 111, 11, 5, -22, 36, -125, -108, -7, -80, -1, -121, -79, -71, -127, -124, 31, 84, -76, 24, + -97, -45, -105, 1, -19, 36, -63, 74, 103, 107, -87, -99, -58, -88, 71, 26, -107, 86, -87, + -60, -49, 59, 18, 70, 72, -96, -69, -115, 0, 20, 113, 10, -74, 57, -53, 28, 81, -80, + -125, 55, 1, 101, 55, 23, 71, -82, 10, 79, 95, -15, -80, -70, -109, -41, -75, 49, 67, + 7, 72, 76, 58, -16, -16, -50, -122, 125, 35, 14, -3, 87, -66, -21, -82, -80, -102, 82, + -7, -30, 6, -50, -16, -56, -79, -13, 46, 101, -68, -97, -60, -24, 95, -109, 121, 85, -75, + -34, 94, -3, -117, 77, -12, -11, 95, 40, -46, 126, 57, 115, 71, 86, -115, 25, -60, 89, + -9, 8, -29, -9, 35, -52, 69, 14, 26, 53, -100, -49, -14, 115, -73, -40, -90, -94, 8, + -78, -6, 95, -32, -17, 109, 75, 15, 64, -11, -85, -114, -78, 27, -67, -87, 119, 69, -34, + -72, 17, -21, -110, 11, -50, 59, -70, 44, -12, 120, 2, 77, 107, -35, -63, 120, -77, 12, + -51, 38, -52, 5, 0, -76, 42, 93, -104, 7, 59, 124, 100, 47, 61, 101, 57, -126, -64, + 126, -94, -101, 49, 115, 25, 9, -50, -57, -93, 0, -59, -87, -100, -107, 64, -55, -38, -19, + 76, -64, 116, 44, -125, 67, -27, 12, -19, -27, 104, 1, 40, -50, 56, -32, 49, -107, -51, + -31, 101, -51, -5, -9, -60, 119, -88, -98, 61, 64, 15, 64, -76, 23, 4, 27, -19, -118, + -31, -24, -95, -19, -102, 56, -69, 14, 53, -58, 101, 118, 67, 105, 30, 6, -106, 37, -8, + -68, -53, 57, -117, -85, -86, 21, 81, -49, 71, 32, -45, 6, 74, -119, -35, 91, -86, -49, + 80, 99, -118, 116, 56, -26, 124, -61, 5, 91, 95, 87, -13, 56, -73, -44, 54, -1, -47, + -49, 8, 93, 46, -20, 86, -52, 56, -124, 71, 107, 40, 75, 117, -114, 91, 103, 105, 63, + -9, -25, -21, 87, -89, 96, 82, -5, 62, -5, -79, 111, 56, -108, 46, -6, 52, -43, -126, + 6, -97, -44, 124, -41, 23, -25, 27, -19, 99, -84, 92, -77, 116, -106, 65, -121, 93, 17, + -54, -48, 54, 29, 99, 109, 113, -90, 25, -64, 126, 94, -39, -61, 36, -12, -30, -76, 19, + -93, -66, -32, -116, -30, 104, 58, 108, -96, -59, 18, -14, -119, 67, 34, 16, 75, 101, -124, + 9, -114, -72, 72, 66, 65, 20, 125, -55, 102, 66, -127, 105, -127, -58, -104, -66, -114, -62, + -1, -19, -21, -94, 105, 101, -30, -91, 51, 69, 1, 49, 46, 113, -51, -119, -5, -22, -33, + -20, 23, 1, -71, 29, 97, -54, -97, 36, -99, 121, -27, 120, -107, 70, -93, -37, 92, 65, + -30, 115, 116, -121, -60, -107, 17, 82, 6, -68, -46, 93, 9, 95, 51, 78, 75, -126, -71, + -12, -5, 40, -12, -125, -48, 66, -91, -23, 109, 125, -6, 95, 55, 37, 96, 115, -89, 81, + 0, -85, -48, 51, 94, -18, 30, -69, 0, -58, 15, 21, -92, 54, 124, -9, -44, -97, -120, + -99, -124, 112, -109, -75, -74, 30, 89, 58, 89, 26, -46, -70, 126, 62, -45, -3, 2, -82, + 126, 110, -109, -8, 33, -68, 113, -83, 18, 84, 83, -37, -121, 16, -89, -81, 19, 13, 12, + -7, 36, 68, -73, -80, -25, 35, 106, -29, 109, -123, 49, -30, 95, 93, -6, 92, 26, -18, + -113, 13, -41, 122, 38, -20, -119, 11, 88, -75, -3, -29, -35, 60, -93, 115, 1, 71, -77, + 116, -16, -19, 49, 107, 96, -46, -83, 126, -45, -47, 48, 122, 4, 34, 111, -10, -2, -58, + 14, -24, -80, 36, -124, 103, 71, -33, 55, 88, -95, 103, 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-67, -89, 47, 62, 76, 99, -14, + -63, -116, -90, -25, 122, 40, -29, -77, 91, -32, -98, 99, 80, -100, 27, 96, -32, 109, 21, + -9, -72, 98, 8, 10, 93, 20, -50, 104, -69, 64, 118, 17, 118, -7, 50, 118, 112, -28, + -90, -25, -108, -11, 68, 16, -15, 106, -30, -38, 36, 113, -97, -2, -102, 53, -27, -121, 16, + 44, -69, -32, -50, 106, -101, 1, 79, 64, -37, -13, -108, 110, -43, 120, 120, -76, -23, -110, + 28, 109, -37, -78, 60, -96, 65, 65, -69, -37, -28, -44, -53, 61, -112, 90, -65, 62, -3, + -101, -8, -58, 89, 34, -95, -25, 117, 72, 49, -35, -112, 115, -56, -82, 76, -103, 29, 54, + -59, -127, 89, 60, -118, 1, -82, 20, -62, 24, 5, -17, -4, -76, -3, 93, 68, 37, 93, + -112, -28, -113, -103, 5, -117, -37, 122, 109, -74, 23, 49, -122, 114, 115, 16, 75, 38, -101, + 54, -58, -29, -46, -47, 75, -59, -54, 72, -12, -36, 105, 42, -54, 74, -82, -65, -53, 71, + 98, 33, -66, 97, 88, -50, 35, -30, 13, 123, -16, -94, -22, -52, -123, 102, 59, 93, 101, + 66, -117, -26, 92, -89, -5, -4, -98, -9, 68, -88, -125, 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48, 72, -53, 86, -49, 100, 101, -17, -28, 32, 73, -5, 58, -11, 80, 113, -105, -37, 57, + -61, 76, 69, -42}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_mult_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_mult_data.h new file mode 100644 index 00000000..14f1020e --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_mult_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int32_t depthwise_int4_generic_5_output_mult[20] = {1075004527, 1647295198, 1888315972, 1321105339, 1585122696, + 1252045640, 1869573033, 1425108753, 1398916209, 1183393042, + 1799365468, 1536291489, 1403481944, 1894003979, 1455287472, + 1437413539, 1237118826, 1475310136, 1982989726, 1894603641}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_ref_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_ref_data.h new file mode 100644 index 00000000..e8757206 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_ref_data.h @@ -0,0 +1,79 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int8_t depthwise_int4_generic_5_output_ref[1820] = { + -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, + 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, + -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, + -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, + -2, -7, 1, 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-14, -3, -22, 4, -3, -18, -4, 0, 2, -15, + -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, + 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, + -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, + -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, + -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, + 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, + -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, + -18, -4, 0, 2, -15, -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15, + -2, -7, 1, -7, 1, 7, -4, -10, 15, -4, -14, -3, -22, 4, -3, -18, -4, 0, 2, -15}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_shift_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_shift_data.h new file mode 100644 index 00000000..121fc1ca --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/output_shift_data.h @@ -0,0 +1,7 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int32_t depthwise_int4_generic_5_output_shift[20] = {-27, -28, -29, -26, -27, -27, -27, -26, -26, -29, + -27, -28, -26, -27, -27, -26, -26, -29, -27, -27}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/test_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/test_data.h new file mode 100644 index 00000000..7de543ed --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/test_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#include "biases_data.h" +#include "config_data.h" +#include "input_data.h" +#include "output_mult_data.h" +#include "output_ref_data.h" +#include "output_shift_data.h" +#include "weights_data.h" diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/weights_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/weights_data.h new file mode 100644 index 00000000..3fa68208 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_5/weights_data.h @@ -0,0 +1,18 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int8_t depthwise_int4_generic_5_weights[250] = { + -59, -48, 52, 10, -97, -35, -87, 0, -108, 63, -58, 94, 101, -51, -23, 32, -20, -59, 2, -21, -64, + 66, 36, -94, 42, -92, -9, 79, 95, 42, -49, -22, 111, -87, 38, -62, -20, -66, 11, -19, -26, 75, + 67, -37, 12, 107, 109, -4, -106, 4, 35, 64, -17, 92, 54, -61, 9, 94, -92, 84, 43, -46, 27, + 95, -47, -10, -108, 9, 11, -34, 80, -31, -53, 61, 97, 15, -6, -106, -87, -79, -28, 49, 34, 109, + 33, 0, -42, 47, 75, -83, 109, -83, -30, -106, -112, -96, 32, 64, 16, 63, 80, -84, -49, -86, -14, + -67, 106, -11, 100, 21, 32, 52, 15, 9, -3, 27, -97, 89, 0, -62, -99, 28, 69, -70, 12, -2, + 84, 75, 14, 32, 12, -22, -13, -3, -94, -58, -2, -98, 12, 75, -48, -6, -89, 2, 6, 10, -26, + 96, -98, -43, 77, -5, -34, -54, 95, 57, 10, 9, 0, 31, -28, -14, -51, 15, -111, -109, -55, -90, + -28, -76, -37, -111, 18, 42, 4, -96, 6, 62, -51, 2, 32, 113, -60, 91, -68, -26, -91, -60, 28, + 93, 20, -35, 64, -6, 16, -38, -17, 59, -90, -19, 35, -76, 80, 53, 109, 94, -75, -106, 15, 77, + 28, 79, 3, -100, 47, 109, 43, -106, -96, -37, 60, 3, -83, 67, 42, 58, 80, -31, -90, -69, -64, + -29, -36, -59, 85, 12, -75, -23, 89, -67, 96, 78, -111, 31, 63, 51, 10, -20, 79, -34}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/biases_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/biases_data.h new file mode 100644 index 00000000..7711cc2c --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/biases_data.h @@ -0,0 +1,17 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int32_t depthwise_int4_generic_6_biases[12] = {1917617024, + 1587747584, + -128584216, + 108614224, + -136052432, + 2047927040, + -13180282, + 1485387776, + 62589904, + 1990100992, + 1641220096, + 721666816}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/config_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/config_data.h new file mode 100644 index 00000000..ad4c76e7 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/config_data.h @@ -0,0 +1,25 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#define DEPTHWISE_INT4_GENERIC_6_OUT_CH 12 +#define DEPTHWISE_INT4_GENERIC_6_IN_CH 4 +#define DEPTHWISE_INT4_GENERIC_6_INPUT_W 21 +#define DEPTHWISE_INT4_GENERIC_6_INPUT_H 21 +#define DEPTHWISE_INT4_GENERIC_6_DST_SIZE 3876 +#define DEPTHWISE_INT4_GENERIC_6_INPUT_SIZE 1764 +#define DEPTHWISE_INT4_GENERIC_6_OUT_ACTIVATION_MIN -127 +#define DEPTHWISE_INT4_GENERIC_6_OUT_ACTIVATION_MAX 125 +#define DEPTHWISE_INT4_GENERIC_6_INPUT_BATCHES 1 +#define DEPTHWISE_INT4_GENERIC_6_FILTER_X 3 +#define DEPTHWISE_INT4_GENERIC_6_FILTER_Y 3 +#define DEPTHWISE_INT4_GENERIC_6_STRIDE_X 1 +#define DEPTHWISE_INT4_GENERIC_6_STRIDE_Y 1 +#define DEPTHWISE_INT4_GENERIC_6_PAD_X 0 +#define DEPTHWISE_INT4_GENERIC_6_PAD_Y 0 +#define DEPTHWISE_INT4_GENERIC_6_OUTPUT_W 19 +#define DEPTHWISE_INT4_GENERIC_6_OUTPUT_H 17 +#define DEPTHWISE_INT4_GENERIC_6_CH_MULT 3 +#define DEPTHWISE_INT4_GENERIC_6_INPUT_OFFSET 128 +#define DEPTHWISE_INT4_GENERIC_6_OUTPUT_OFFSET -2 +#define DEPTHWISE_INT4_GENERIC_6_DILATION_X 1 +#define DEPTHWISE_INT4_GENERIC_6_DILATION_Y 2 diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/input_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/input_data.h new file mode 100644 index 00000000..1a8926e0 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/input_data.h @@ -0,0 +1,99 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int8_t depthwise_int4_generic_6_input[1764] = { + 42, -80, 75, -12, 101, 117, 98, 25, -127, 17, 76, 124, 31, 16, 86, 119, 96, 79, 123, + -53, -14, -97, 89, 111, 74, 82, 23, -46, -7, -87, -47, -104, -4, -7, -102, -101, -122, 31, + -48, 3, 102, 126, 114, 115, -128, 109, -22, -49, 116, -8, 117, -109, -105, -126, -44, -60, 85, + 80, -40, 58, 12, -12, 78, -75, 100, 108, 2, -57, -14, -49, 82, -35, 98, 55, -92, 93, + 4, 81, 82, -7, 66, 70, -89, 39, -48, -16, 17, -25, -21, 125, -54, -83, -43, -122, -120, + 73, 119, -118, 115, 51, -25, 47, -50, 13, -34, 82, 75, 89, 105, -37, -36, -77, -99, 85, + 8, -4, 76, -59, -53, 34, -10, -19, 82, -6, 31, -44, 22, -6, -18, 114, -85, -75, 58, + -52, 67, 41, 16, -121, 50, -14, 99, 65, 47, 53, 13, -32, 98, -75, -69, -53, 59, 114, + 1, -116, 46, -111, 57, 59, 29, 115, 79, 118, -108, 107, 123, 50, -40, 18, -13, 107, -120, + 35, 124, 76, -21, -126, 27, -7, 109, -41, 41, -1, 73, -8, 44, -91, 24, -38, 29, 110, + -51, 13, 77, 10, -74, -78, 104, -65, 12, 14, -57, -72, -103, 101, 0, -48, -2, 16, 32, + 96, -49, 6, 48, 68, 107, 2, -96, 30, -25, -2, -62, 61, -17, 92, 11, -95, 53, -17, + -26, 109, 44, -84, 120, -94, 71, -12, 107, 121, -83, -115, -46, 79, -36, 102, 73, -30, 31, + 73, -64, 27, 58, 39, -47, -17, 42, -65, 85, -4, 47, -92, -13, -99, -27, 17, -28, -76, + 103, 39, -117, -5, -65, -49, -80, 96, -57, -122, -80, 114, -45, -126, -23, -26, 106, 80, -97, + 94, 110, -47, -101, -39, 98, -9, -128, 36, -19, -48, 82, -4, 53, 98, 49, -76, -73, 90, + -111, 42, 9, -118, -99, 42, -58, 59, 117, -29, -101, -21, 55, -82, 117, 118, -107, 84, -47, + -100, -41, 13, -88, -14, -33, 84, -110, 88, -32, -126, -20, -124, 29, 93, 108, -34, 6, 47, + -112, 0, -69, -114, -32, -108, -24, 12, -11, -120, -94, 26, -33, 1, 112, -45, 82, 2, -29, + -27, -83, -56, -7, -39, 74, 8, -46, -125, -34, 122, 103, -10, -26, 79, 122, 53, 19, 38, + -9, 92, -30, 68, 25, 46, 121, -57, 94, 111, -3, 29, 77, 94, 76, 88, -1, -80, -79, + -40, 66, 115, -61, 60, -117, -100, -43, -102, 28, 85, 76, 120, 123, 106, -122, 110, -10, 108, + 54, -37, -123, 87, 54, 108, -5, -65, 114, -61, 63, 107, -21, -50, -79, 41, -88, -51, -81, + 75, -98, -4, -59, -43, -31, 77, -46, 24, -91, -57, -74, 35, -7, -4, -6, 17, -110, -5, + 22, -98, 20, -42, -27, -65, -106, -86, -51, 60, -61, 111, 126, 122, -108, -75, 79, 36, -42, + 58, -123, -28, 22, 101, -12, 57, 19, 71, -25, -125, -46, 102, 36, 79, -44, -108, -30, 59, + -82, -42, 4, 107, -21, -19, -72, -94, -125, 56, 64, 15, -81, -43, 13, 104, 95, -52, -127, + 64, -15, 69, 23, -76, 19, 72, 7, 20, 74, -56, 7, -20, 73, -103, -26, -92, -19, 89, + -109, -20, 23, 118, 75, 59, -117, 29, -74, -99, 88, -96, 69, 24, 94, -86, 41, 104, 75, + 117, 106, 59, -126, -81, 4, -10, -18, -36, 110, -74, -60, 77, -118, -83, -65, -99, -125, -64, + -70, 104, 64, 105, 58, 76, 84, 82, 89, 116, -14, -115, 26, -81, -117, 49, 94, -1, -50, + 66, 122, 40, -28, -23, -63, -60, 100, -83, 113, -86, -102, -27, 70, -71, 126, -72, 49, -62, + 47, -47, 29, -107, -88, -19, -98, -101, -1, -91, -115, -81, 97, 14, 76, 43, 96, 54, 45, + -111, 23, 57, 17, -120, -77, -122, -58, 112, -101, 93, -32, 121, -83, -126, 105, 84, 86, 38, + -34, -96, -84, 65, -35, -3, 21, -116, -79, -23, 98, -97, 12, 64, -12, -107, -107, 63, -46, + -55, -112, -32, -54, -66, -93, 83, -128, -41, 103, 67, -96, -85, 75, 56, -61, -103, 95, -91, + 97, -68, 37, -109, 83, 125, 67, 113, 5, -60, -92, -105, 109, 71, 49, 42, 72, -115, -81, + 89, -90, 36, -21, 87, -58, -103, -103, 3, -108, -47, 37, -37, 13, -15, -68, -1, -63, 73, + -123, 27, 103, -77, 20, -39, -10, 117, -74, -16, -32, -105, 55, -96, 66, 23, -108, -122, -120, + -107, -39, -118, -17, 86, -27, -86, 83, 104, 74, 5, -45, -60, -26, -53, 76, -79, -124, 18, + -50, -13, 12, -82, 40, -128, 30, 120, 58, 85, 8, 121, 20, -75, 20, 15, -42, 82, -23, + -128, 120, -51, 78, 49, -120, 85, 58, -85, 20, 109, -122, -111, 22, 8, -36, 17, 20, 51, + -69, -12, -94, -111, 86, -73, 66, -76, 15, 7, 32, 114, -45, -128, -50, 78, -112, 23, 70, + 125, -57, -119, -120, -78, -75, 111, -94, -66, 60, -56, 68, -48, 82, 47, 31, -26, 8, 69, + -59, -105, -30, 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68, -24, 122, -66, 39, -30, -53, -34, 58, + -83, -119, 22, 70, 23, 56, -118, -34, 70, 29, -54, 82, -21, 93, 105, -39, 118, -84, -7, + 56, 90, -117, 126, 64, 84, 32, -10, 45, -26, -101, 66, -113, -85, -51, 91, -102, -10, 83, + -92, -17, -65, 56, -50, 89, -100, 66, -107, -70, -126, 43, -60, -101, -80, -97, -108, -60, 34, + -107, 50, -104, -59, 97, 107, 23, 123, 33, -66, 18, -109, -48, -27, -31, -101}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_mult_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_mult_data.h new file mode 100644 index 00000000..031d0156 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_mult_data.h @@ -0,0 +1,17 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int32_t depthwise_int4_generic_6_output_mult[12] = {1582448540, + 1554101905, + 1384423161, + 1359201599, + 1081353837, + 1423857437, + 1108504232, + 1444426162, + 1152362335, + 1509171647, + 1203548770, + 1675657914}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_ref_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_ref_data.h new file mode 100644 index 00000000..f1f53e00 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_ref_data.h @@ -0,0 +1,136 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int8_t depthwise_int4_generic_6_output_ref[3876] = { + 9, 7, -3, -1, -3, 18, -2, 5, -1, 3, 12, 2, 9, 7, -3, -1, -3, 18, -2, 5, -1, 3, 12, 2, 9, 7, -3, -1, -3, 18, + -2, 5, -1, 3, 12, 2, 9, 7, -3, -1, -3, 18, -2, 5, -1, 3, 12, 2, 9, 7, -3, -1, -3, 18, -2, 5, -1, 3, 12, 2, + 9, 7, -3, -1, -3, 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a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_shift_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_shift_data.h new file mode 100644 index 00000000..705f1795 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/output_shift_data.h @@ -0,0 +1,6 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int32_t depthwise_int4_generic_6_output_shift[12] = {-27, -27, -26, -26, -26, -26, -26, -27, -26, -28, -26, -27}; diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/test_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/test_data.h new file mode 100644 index 00000000..7de543ed --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/test_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#include "biases_data.h" +#include "config_data.h" +#include "input_data.h" +#include "output_mult_data.h" +#include "output_ref_data.h" +#include "output_shift_data.h" +#include "weights_data.h" diff --git a/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/weights_data.h b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/weights_data.h new file mode 100644 index 00000000..3e216628 --- /dev/null +++ b/Tests/UnitTest/TestCases/TestData/depthwise_int4_generic_6/weights_data.h @@ -0,0 +1,9 @@ +// Generated by test_settings.py using tensorflow version 2.15.0 (Keras version 2.15.0). +// Interpreter from tensorflow version 2.15.0 and revision v2.15.0-rc1-8-g6887368d6d4. +#pragma once +#include + +const int8_t depthwise_int4_generic_6_weights[54] = { + -70, -30, -34, -70, 110, -107, 64, -67, 108, -32, -54, -21, -58, 32, -112, 28, -63, 95, + 20, -21, 29, -62, 48, -55, 50, 85, 62, -50, -5, -69, 62, 12, -108, 32, -93, 54, + 33, -95, 11, 4, -36, 70, 0, -90, -63, 82, 111, -11, -16, 69, -18, 0, -37, -45}; diff --git a/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/Unity/unity_test_arm_depthwise_conv_s4.c b/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/Unity/unity_test_arm_depthwise_conv_s4.c index c695cfa0..6872a06f 100644 --- a/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/Unity/unity_test_arm_depthwise_conv_s4.c +++ b/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/Unity/unity_test_arm_depthwise_conv_s4.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2010-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -48,3 +48,5 @@ void test_depthwise_int4_generic_arm_depthwise_conv_s4(void) { depthwise_int4_ge void test_depthwise_int4_generic_2_arm_depthwise_conv_s4(void) { depthwise_int4_generic_2_arm_depthwise_conv_s4(); } void test_depthwise_int4_generic_3_arm_depthwise_conv_s4(void) { depthwise_int4_generic_3_arm_depthwise_conv_s4(); } void test_depthwise_int4_generic_4_arm_depthwise_conv_s4(void) { depthwise_int4_generic_4_arm_depthwise_conv_s4(); } +void test_depthwise_int4_generic_5_arm_depthwise_conv_s4(void) { depthwise_int4_generic_5_arm_depthwise_conv_s4(); } +void test_depthwise_int4_generic_6_arm_depthwise_conv_s4(void) { depthwise_int4_generic_6_arm_depthwise_conv_s4(); } diff --git a/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/test_arm_depthwise_conv_s4.c b/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/test_arm_depthwise_conv_s4.c index 09303214..7ca8ace6 100644 --- a/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/test_arm_depthwise_conv_s4.c +++ b/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4/test_arm_depthwise_conv_s4.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -24,6 +24,8 @@ #include "../TestData/depthwise_int4_generic_2/test_data.h" #include "../TestData/depthwise_int4_generic_3/test_data.h" #include "../TestData/depthwise_int4_generic_4/test_data.h" +#include "../TestData/depthwise_int4_generic_5/test_data.h" +#include "../TestData/depthwise_int4_generic_6/test_data.h" #include "../Utils/utils.h" #include "../Utils/validate.h" @@ -70,8 +72,8 @@ void depthwise_int4_generic_arm_depthwise_conv_s4(void) quant_params.multiplier = (int32_t *)depthwise_int4_generic_output_mult; quant_params.shift = (int32_t *)depthwise_int4_generic_output_shift; - ctx.size = arm_depthwise_conv_s4_opt_get_buffer_size(&input_dims, &filter_dims); - TEST_ASSERT_TRUE(ctx.size > 0); + ctx.size = arm_depthwise_conv_wrapper_s4_get_buffer_size(&dw_conv_params, &input_dims, &filter_dims, &output_dims); + TEST_ASSERT_TRUE(ctx.size == 0); ctx.buf = malloc(ctx.size); @@ -163,8 +165,8 @@ void depthwise_int4_generic_2_arm_depthwise_conv_s4(void) quant_params.multiplier = (int32_t *)depthwise_int4_generic_2_output_mult; quant_params.shift = (int32_t *)depthwise_int4_generic_2_output_shift; - ctx.size = arm_depthwise_conv_s4_opt_get_buffer_size(&input_dims, &filter_dims); - TEST_ASSERT_TRUE(ctx.size > 0); + ctx.size = arm_depthwise_conv_wrapper_s4_get_buffer_size(&dw_conv_params, &input_dims, &filter_dims, &output_dims); + TEST_ASSERT_TRUE(ctx.size == 0); ctx.buf = malloc(ctx.size); @@ -256,8 +258,8 @@ void depthwise_int4_generic_3_arm_depthwise_conv_s4(void) quant_params.multiplier = (int32_t *)depthwise_int4_generic_3_output_mult; quant_params.shift = (int32_t *)depthwise_int4_generic_3_output_shift; - ctx.size = arm_depthwise_conv_s4_opt_get_buffer_size(&input_dims, &filter_dims); - TEST_ASSERT_TRUE(ctx.size > 0); + ctx.size = arm_depthwise_conv_wrapper_s4_get_buffer_size(&dw_conv_params, &input_dims, &filter_dims, &output_dims); + TEST_ASSERT_TRUE(ctx.size == 0); ctx.buf = malloc(ctx.size); @@ -349,8 +351,8 @@ void depthwise_int4_generic_4_arm_depthwise_conv_s4(void) quant_params.multiplier = (int32_t *)depthwise_int4_generic_4_output_mult; quant_params.shift = (int32_t *)depthwise_int4_generic_4_output_shift; - ctx.size = arm_depthwise_conv_s4_opt_get_buffer_size(&input_dims, &filter_dims); - TEST_ASSERT_TRUE(ctx.size > 0); + ctx.size = arm_depthwise_conv_wrapper_s4_get_buffer_size(&dw_conv_params, &input_dims, &filter_dims, &output_dims); + TEST_ASSERT_TRUE(ctx.size == 0); ctx.buf = malloc(ctx.size); @@ -398,3 +400,189 @@ void depthwise_int4_generic_4_arm_depthwise_conv_s4(void) TEST_ASSERT_TRUE(validate(output, depthwise_int4_generic_4_output_ref, DEPTHWISE_INT4_GENERIC_4_DST_SIZE)); memset(output, 0, DEPTHWISE_INT4_GENERIC_4_DST_SIZE); } + +void depthwise_int4_generic_5_arm_depthwise_conv_s4(void) +{ + const arm_cmsis_nn_status expected = ARM_CMSIS_NN_SUCCESS; + int8_t output[DEPTHWISE_INT4_GENERIC_5_DST_SIZE] = {0}; + + cmsis_nn_context ctx; + cmsis_nn_dw_conv_params dw_conv_params; + cmsis_nn_per_channel_quant_params quant_params; + cmsis_nn_dims input_dims; + cmsis_nn_dims filter_dims; + cmsis_nn_dims bias_dims; + cmsis_nn_dims output_dims; + + const int32_t *bias_data = depthwise_int4_generic_5_biases; + const int8_t *kernel_data = depthwise_int4_generic_5_weights; + const int8_t *input_data = depthwise_int4_generic_5_input; + + input_dims.n = DEPTHWISE_INT4_GENERIC_5_INPUT_BATCHES; + input_dims.w = DEPTHWISE_INT4_GENERIC_5_INPUT_W; + input_dims.h = DEPTHWISE_INT4_GENERIC_5_INPUT_H; + input_dims.c = DEPTHWISE_INT4_GENERIC_5_IN_CH; + filter_dims.w = DEPTHWISE_INT4_GENERIC_5_FILTER_X; + filter_dims.h = DEPTHWISE_INT4_GENERIC_5_FILTER_Y; + output_dims.w = DEPTHWISE_INT4_GENERIC_5_OUTPUT_W; + output_dims.h = DEPTHWISE_INT4_GENERIC_5_OUTPUT_H; + output_dims.c = DEPTHWISE_INT4_GENERIC_5_OUT_CH; + + dw_conv_params.padding.w = DEPTHWISE_INT4_GENERIC_5_PAD_X; + dw_conv_params.padding.h = DEPTHWISE_INT4_GENERIC_5_PAD_Y; + dw_conv_params.stride.w = DEPTHWISE_INT4_GENERIC_5_STRIDE_X; + dw_conv_params.stride.h = DEPTHWISE_INT4_GENERIC_5_STRIDE_Y; + dw_conv_params.dilation.w = DEPTHWISE_INT4_GENERIC_5_DILATION_X; + dw_conv_params.dilation.h = DEPTHWISE_INT4_GENERIC_5_DILATION_Y; + + dw_conv_params.ch_mult = DEPTHWISE_INT4_GENERIC_5_CH_MULT; + + dw_conv_params.input_offset = DEPTHWISE_INT4_GENERIC_5_INPUT_OFFSET; + dw_conv_params.output_offset = DEPTHWISE_INT4_GENERIC_5_OUTPUT_OFFSET; + dw_conv_params.activation.min = DEPTHWISE_INT4_GENERIC_5_OUT_ACTIVATION_MIN; + dw_conv_params.activation.max = DEPTHWISE_INT4_GENERIC_5_OUT_ACTIVATION_MAX; + quant_params.multiplier = (int32_t *)depthwise_int4_generic_5_output_mult; + quant_params.shift = (int32_t *)depthwise_int4_generic_5_output_shift; + + ctx.size = arm_depthwise_conv_wrapper_s4_get_buffer_size(&dw_conv_params, &input_dims, &filter_dims, &output_dims); + TEST_ASSERT_TRUE(ctx.size == 0); + + ctx.buf = malloc(ctx.size); + + arm_cmsis_nn_status result = arm_depthwise_conv_s4(&ctx, + &dw_conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + + if (ctx.buf) + { + // The caller is responsible to clear the scratch buffers for security reasons if applicable. + memset(ctx.buf, 0, ctx.size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(expected, result); + TEST_ASSERT_TRUE(validate(output, depthwise_int4_generic_5_output_ref, DEPTHWISE_INT4_GENERIC_5_DST_SIZE)); + memset(output, 0, DEPTHWISE_INT4_GENERIC_5_DST_SIZE); + + ctx.buf = malloc(ctx.size); + result = arm_depthwise_conv_wrapper_s4(&ctx, + &dw_conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + if (ctx.buf) + { + // The caller is responsible to clear the scratch buffers for security reasons if applicable. + memset(ctx.buf, 0, ctx.size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(expected, result); + TEST_ASSERT_TRUE(validate(output, depthwise_int4_generic_5_output_ref, DEPTHWISE_INT4_GENERIC_5_DST_SIZE)); + memset(output, 0, DEPTHWISE_INT4_GENERIC_5_DST_SIZE); +} + +void depthwise_int4_generic_6_arm_depthwise_conv_s4(void) +{ + const arm_cmsis_nn_status expected = ARM_CMSIS_NN_SUCCESS; + int8_t output[DEPTHWISE_INT4_GENERIC_6_DST_SIZE] = {0}; + + cmsis_nn_context ctx; + cmsis_nn_dw_conv_params dw_conv_params; + cmsis_nn_per_channel_quant_params quant_params; + cmsis_nn_dims input_dims; + cmsis_nn_dims filter_dims; + cmsis_nn_dims bias_dims; + cmsis_nn_dims output_dims; + + const int32_t *bias_data = depthwise_int4_generic_6_biases; + const int8_t *kernel_data = depthwise_int4_generic_6_weights; + const int8_t *input_data = depthwise_int4_generic_6_input; + + input_dims.n = DEPTHWISE_INT4_GENERIC_6_INPUT_BATCHES; + input_dims.w = DEPTHWISE_INT4_GENERIC_6_INPUT_W; + input_dims.h = DEPTHWISE_INT4_GENERIC_6_INPUT_H; + input_dims.c = DEPTHWISE_INT4_GENERIC_6_IN_CH; + filter_dims.w = DEPTHWISE_INT4_GENERIC_6_FILTER_X; + filter_dims.h = DEPTHWISE_INT4_GENERIC_6_FILTER_Y; + output_dims.w = DEPTHWISE_INT4_GENERIC_6_OUTPUT_W; + output_dims.h = DEPTHWISE_INT4_GENERIC_6_OUTPUT_H; + output_dims.c = DEPTHWISE_INT4_GENERIC_6_OUT_CH; + + dw_conv_params.padding.w = DEPTHWISE_INT4_GENERIC_6_PAD_X; + dw_conv_params.padding.h = DEPTHWISE_INT4_GENERIC_6_PAD_Y; + dw_conv_params.stride.w = DEPTHWISE_INT4_GENERIC_6_STRIDE_X; + dw_conv_params.stride.h = DEPTHWISE_INT4_GENERIC_6_STRIDE_Y; + dw_conv_params.dilation.w = DEPTHWISE_INT4_GENERIC_6_DILATION_X; + dw_conv_params.dilation.h = DEPTHWISE_INT4_GENERIC_6_DILATION_Y; + + dw_conv_params.ch_mult = DEPTHWISE_INT4_GENERIC_6_CH_MULT; + + dw_conv_params.input_offset = DEPTHWISE_INT4_GENERIC_6_INPUT_OFFSET; + dw_conv_params.output_offset = DEPTHWISE_INT4_GENERIC_6_OUTPUT_OFFSET; + dw_conv_params.activation.min = DEPTHWISE_INT4_GENERIC_6_OUT_ACTIVATION_MIN; + dw_conv_params.activation.max = DEPTHWISE_INT4_GENERIC_6_OUT_ACTIVATION_MAX; + quant_params.multiplier = (int32_t *)depthwise_int4_generic_6_output_mult; + quant_params.shift = (int32_t *)depthwise_int4_generic_6_output_shift; + + ctx.size = arm_depthwise_conv_wrapper_s4_get_buffer_size(&dw_conv_params, &input_dims, &filter_dims, &output_dims); + TEST_ASSERT_TRUE(ctx.size == 0); + + ctx.buf = malloc(ctx.size); + + arm_cmsis_nn_status result = arm_depthwise_conv_s4(&ctx, + &dw_conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + + if (ctx.buf) + { + // The caller is responsible to clear the scratch buffers for security reasons if applicable. + memset(ctx.buf, 0, ctx.size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(expected, result); + TEST_ASSERT_TRUE(validate(output, depthwise_int4_generic_6_output_ref, DEPTHWISE_INT4_GENERIC_6_DST_SIZE)); + memset(output, 0, DEPTHWISE_INT4_GENERIC_6_DST_SIZE); + + ctx.buf = malloc(ctx.size); + result = arm_depthwise_conv_wrapper_s4(&ctx, + &dw_conv_params, + &quant_params, + &input_dims, + input_data, + &filter_dims, + kernel_data, + &bias_dims, + bias_data, + &output_dims, + output); + if (ctx.buf) + { + // The caller is responsible to clear the scratch buffers for security reasons if applicable. + memset(ctx.buf, 0, ctx.size); + free(ctx.buf); + } + TEST_ASSERT_EQUAL(expected, result); + TEST_ASSERT_TRUE(validate(output, depthwise_int4_generic_6_output_ref, DEPTHWISE_INT4_GENERIC_6_DST_SIZE)); + memset(output, 0, DEPTHWISE_INT4_GENERIC_6_DST_SIZE); +} \ No newline at end of file diff --git a/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4_opt/test_arm_depthwise_conv_s4_opt.c b/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4_opt/test_arm_depthwise_conv_s4_opt.c index c5a88461..e60391b0 100644 --- a/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4_opt/test_arm_depthwise_conv_s4_opt.c +++ b/Tests/UnitTest/TestCases/test_arm_depthwise_conv_s4_opt/test_arm_depthwise_conv_s4_opt.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its affiliates + * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates * * SPDX-License-Identifier: Apache-2.0 * @@ -119,6 +119,7 @@ void depthwise_int4_1_arm_depthwise_conv_s4_opt(void) TEST_ASSERT_TRUE(validate(output, depthwise_int4_1_output_ref, DEPTHWISE_INT4_1_DST_SIZE)); memset(output, 0, DEPTHWISE_INT4_1_DST_SIZE); + ctx.size = 0; ctx.buf = malloc(ctx.size); result = arm_depthwise_conv_s4(&ctx, &dw_conv_params, @@ -234,6 +235,7 @@ void depthwise_int4_2_arm_depthwise_conv_s4_opt(void) TEST_ASSERT_TRUE(validate(output, depthwise_int4_2_output_ref, DEPTHWISE_INT4_2_DST_SIZE)); memset(output, 0, DEPTHWISE_INT4_2_DST_SIZE); + ctx.size = 0; ctx.buf = malloc(ctx.size); result = arm_depthwise_conv_s4(&ctx, &dw_conv_params, @@ -350,6 +352,7 @@ void depthwise_int4_3_arm_depthwise_conv_s4_opt(void) TEST_ASSERT_TRUE(validate(output, depthwise_int4_3_output_ref, DEPTHWISE_INT4_3_DST_SIZE)); memset(output, 0, DEPTHWISE_INT4_3_DST_SIZE); + ctx.size = 0; ctx.buf = malloc(ctx.size); result = arm_depthwise_conv_s4(&ctx, &dw_conv_params, @@ -465,6 +468,7 @@ void depthwise_int4_4_arm_depthwise_conv_s4_opt(void) TEST_ASSERT_TRUE(validate(output, depthwise_int4_4_output_ref, DEPTHWISE_INT4_4_DST_SIZE)); memset(output, 0, DEPTHWISE_INT4_4_DST_SIZE); + ctx.size = 0; ctx.buf = malloc(ctx.size); result = arm_depthwise_conv_s4(&ctx, &dw_conv_params, diff --git a/Tests/UnitTest/conv_settings.py b/Tests/UnitTest/conv_settings.py index f81d5c92..6848b531 100644 --- a/Tests/UnitTest/conv_settings.py +++ b/Tests/UnitTest/conv_settings.py @@ -98,9 +98,9 @@ def __init__(self, self.filter_ch = in_ch // groups if in_ch % groups != 0: - raise RuntimeError("ERROR: Number of input channels must be an even multiple of groups") + raise RuntimeError("ERROR: Input channels {} must be an even multiple of groups {}".format(in_ch, groups)) if out_ch % groups != 0: - raise RuntimeError("ERROR: Number of output channels must be an even multiple of groups") + raise RuntimeError("ERROR: Output channels {} must be an even multiple of groups {}".format(out_ch, groups)) if self.int4_weights: if self.test_type == 'conv': @@ -146,6 +146,20 @@ def generate_quantize_per_channel_multiplier(self): return per_channel_multiplier, per_channel_shift + def generate_int4_scale(self, scale, shift, input_scale): + self.output_scale = scale + self.output_zp = shift + self.input_scale = input_scale + self.scaling_factors = np.random.uniform(0.001, 0.01, [self.output_ch]).tolist() + per_channel_multiplier, per_channel_shift = self.generate_quantize_per_channel_multiplier() + + while any((x > 31 or x < -31) for x in per_channel_shift): + self.output_scale = self.output_scale / 10 + per_channel_multiplier, per_channel_shift = self.generate_quantize_per_channel_multiplier() + + return self.output_scale, self.output_zp + + # TODO def quantize_float_data(self, data=None, quantization_bit_range=8, quantization_type="affine", tf_tensor=False): if data is not None: if tf_tensor: @@ -215,8 +229,7 @@ def generate_data(self, input_data=None, weights=None, biases=None) -> None: bias_scale = [64751.269531] * self.output_ch bias_zp = [0] * self.output_ch if self.generate_bias: - output_scale = 4684910.0 - output_zp = -2 + output_scale, output_zp = self.generate_int4_scale(4684910.0, -2, input_scale) else: output_scale = 0.525255 output_zp = 2 diff --git a/Tests/UnitTest/generate_test_data.py b/Tests/UnitTest/generate_test_data.py index b77feb1c..0c56d5ad 100755 --- a/Tests/UnitTest/generate_test_data.py +++ b/Tests/UnitTest/generate_test_data.py @@ -2032,6 +2032,52 @@ def load_testdata_sets(regenerate_input, regenerate_weights, regenerate_biases, generate_bias=True, interpreter=interpreter, int4_weights=True) + dataset = 'depthwise_int4_generic_5' + testdata_sets[dataset] = ConvSettings(dataset, + type_of_test, + regenerate_weights, + regenerate_input, + regenerate_biases, + schema_file, + in_ch=20, + out_ch=20, + x_in=21, + y_in=21, + w_x=5, + w_y=5, + stride_x=1, + stride_y=2, + pad=False, + out_activation_min=-127, + out_activation_max=125, + dilation_x=2, + dilation_y=2, + generate_bias=True, + interpreter=interpreter, + int4_weights=True) + dataset = 'depthwise_int4_generic_6' + testdata_sets[dataset] = ConvSettings(dataset, + type_of_test, + regenerate_weights, + regenerate_input, + regenerate_biases, + schema_file, + in_ch=4, + out_ch=12, + x_in=21, + y_in=21, + w_x=3, + w_y=3, + stride_x=1, + stride_y=1, + pad=False, + out_activation_min=-127, + out_activation_max=125, + dilation_x=1, + dilation_y=2, + generate_bias=True, + interpreter=interpreter, + int4_weights=True) type_of_test = 'fully_connected' dataset = 'fully_connected'