[bazel] Update the binary/test rules for building ROMs

azure-pipelines.yml

@@ -351,9 +351,12 @@ jobs:
   - bash: |
       . util/build_consts.sh
       mkdir -p "$BIN_DIR/sw/device/lib/testing/test_rom"
-      cp $(ci/scripts/target-location.sh //sw/device/lib/testing/test_rom:test_rom_fpga_cw305_vmem) \
+      cp $(ci/scripts/target-location.sh \
+          //sw/device/lib/testing/test_rom:test_rom_fpga_cw305 \
+          --features=-rv32_bitmanip \
+          --copt=-DOT_IS_ENGLISH_BREAKFAST_REDUCED_SUPPORT_FOR_INTERNAL_USE_ONLY_) \
         "$BIN_DIR/sw/device/lib/testing/test_rom"
-    displayName: Copy test_rom_fpga_cw305_vmem to $BIN_DIR
+    displayName: Copy test_rom_fpga_cw305 to $BIN_DIR
   - template: ci/upload-artifacts-template.yml
     parameters:
       includePatterns:

hw/dv/tools/dvsim/sim.mk

@@ -122,14 +122,15 @@ ifneq (${sw_images},)
 				--ui_event_filters=-info \
 				--noshow_progress \
 				--output=label_kind | cut -f1 -d' '); \
-			if [[ $${kind} == "opentitan_test" ]]; then \
+			if [[ $${kind} == "opentitan_test" || \
+					$${bazel_label} == "//sw/device/lib/testing/test_rom:test_rom_sim_dv" ]]; then \
 				for artifact in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} \
 					$${bazel_label} \
 					--ui_event_filters=-info \
 					--noshow_progress \
 					--output=starlark \
 					`# An opentitan_test rule has all of its needed files in its runfiles.` \
-					--starlark:expr='"\n".join([f.path for f in target.default_runfiles.files.to_list()])'); do \
+					--starlark:expr='"\n".join([f.path for f in target.data_runfiles.files.to_list()])'); do \
 						cp -f $${artifact} $${run_dir}/$$(basename $${artifact}); \
 						if [[ $$artifact == *.bin && \
 							-f "$$(echo $${artifact} | cut -d. -f 1).elf" ]]; then \

hw/top_earlgrey/BUILD

@@ -9,7 +9,9 @@ load(
     "//rules/opentitan:defs.bzl",
     "DEFAULT_TEST_FAILURE_MSG",
     "DEFAULT_TEST_SUCCESS_MSG",
+    "fpga_cw305",
     "fpga_cw310",
+    "fpga_cw340",
     "sim_dv",
     "sim_verilator",
 )
@@ -47,6 +49,7 @@ fpga_cw310(
     exec_env = "fpga_cw310",
     lib = "//sw/device/lib/arch:fpga_cw310",
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+    rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
     test_cmd = "testing-not-supported",
 )
 
@@ -88,6 +91,67 @@ fpga_cw310(
     rsa_key = {"//sw/device/silicon_creator/rom/keys/fake/rsa:test_private_key_0": "test_key_0"},
 )
 
+###########################################################################
+# FPGA CW305 Environments
+#
+# TODO(opentitan#19493): Determine whether the `fpga_cw310` infrastructure
+# should become a more generic `fpga_chipwhisperer` infrastruture able to
+# handle multiple CW-type boards.
+###########################################################################
+fpga_cw305(
+    name = "fpga_cw305",
+    design = "earlgrey",
+    exec_env = "fpga_cw305",
+    lib = "//sw/device/lib/arch:fpga_cw305",
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+    rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    test_cmd = "testing-not-supported",
+)
+
+###########################################################################
+# FPGA CW340 Environments
+#
+# TODO(opentitan#19493): Determine whether the `fpga_cw310` infrastructure
+# should become a more generic `fpga_chipwhisperer` infrastruture able to
+# handle multiple CW-type boards.
+###########################################################################
+fpga_cw340(
+    name = "fpga_cw340",
+    design = "earlgrey",
+    exec_env = "fpga_cw340",
+    lib = "//sw/device/lib/arch:fpga_cw340",
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+    rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    test_cmd = "testing-not-supported",
+)
+
+fpga_cw340(
+    name = "fpga_cw340_test_rom",
+    testonly = True,
+    args = [
+        "--rcfile=",
+        "--logging=info",
+        "--interface={interface}",
+    ] + select({
+        "@//ci:lowrisc_fpga_cw340": ["--uarts=/dev/ttyACM_CW340_1,/dev/ttyACM_CW340_0"],
+        "//conditions:default": [],
+    }),
+    base = ":fpga_cw340",
+    bitstream = "//hw/bitstream:test_rom",
+    exec_env = "fpga_cw340_test_rom",
+    param = {
+        "interface": "cw340",
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+    },
+    test_cmd = """
+        --exec="fpga load-bitstream {bitstream}"
+        --exec="bootstrap --clear-uart=true {firmware}"
+        --exec="console --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+        no-op
+    """,
+)
+
 ###########################################################################
 # Sim Verilator Environments
 #
@@ -101,6 +165,7 @@ sim_verilator(
     lib = "//sw/device/lib/arch:sim_verilator",
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
+    rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
     test_cmd = "testing-not-supported",
 )
 
@@ -126,7 +191,7 @@ sim_verilator(
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
-    rom = "//sw/device/lib/testing/test_rom:test_rom_sim_verilator_scr_vmem",
+    rom = "//sw/device/lib/testing/test_rom:test_rom",
     test_cmd = """
         --exec="console --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
         no-op
@@ -143,9 +208,15 @@ sim_dv(
     name = "sim_dv_base",
     design = "earlgrey",
     exec_env = "sim_dv",
+    extract_sw_logs = "//util/device_sw_utils:extract_sw_logs_db",
+    flash_scramble_tool = "//util/design:gen-flash-img",
     lib = "//sw/device/lib/arch:sim_dv",
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
+    otp_data_perm = "//hw/ip/otp_ctrl/data:data_perm",
+    otp_mmap = "//hw/ip/otp_ctrl/data:otp_ctrl_mmap.hjson",
+    otp_seed = "//hw/ip/otp_ctrl/data:otp_seed",
+    rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
 )
 
 sim_dv(
@@ -159,16 +230,8 @@ sim_dv(
         "//hw/top_earlgrey/dv:chip_sim_cfg.hjson",
     ],
     exec_env = "sim_dv",
-    extract_sw_logs = "//util/device_sw_utils:extract_sw_logs_db",
-    flash_scramble_tool = "//util/design:gen-flash-img",
-    lib = "//sw/device/lib/arch:sim_dv",
-    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
-    otp = "//hw/ip/otp_ctrl/data:img_rma",
-    otp_data_perm = "//hw/ip/otp_ctrl/data:data_perm",
-    otp_mmap = "//hw/ip/otp_ctrl/data:otp_ctrl_mmap.hjson",
-    otp_seed = "//hw/ip/otp_ctrl/data:otp_seed",
     param = {
         "dvsim_config": "$(location //hw/top_earlgrey/dv:chip_sim_cfg.hjson)",
     },
-    rom = "//sw/device/lib/testing/test_rom:test_rom_sim_dv_scr_vmem",
+    rom = "//sw/device/lib/testing/test_rom:test_rom",
 )

rules/opentitan/cc.bzl

@@ -166,11 +166,12 @@ def _build_binary(ctx, exec_env, name, deps):
     Returns:
       (dict, dict): A dict of output artifacts and a dict of signing artifacts.
     """
+    linker_script = get_fallback(ctx, "attr.linker_script", exec_env)
     elf, mapfile = ot_binary(
         ctx,
         name = name,
         deps = deps,
-        linker_script = get_fallback(ctx, "attr.linker_script", exec_env),
+        linker_script = linker_script,
     )
     binary = obj_transform(
         ctx,
@@ -218,19 +219,21 @@ def _opentitan_binary(ctx):
     for exec_env in ctx.attr.exec_env:
         exec_env = exec_env[ExecEnvInfo]
         name = _binary_name(ctx, exec_env)
-        deps = [exec_env.lib] + ctx.attr.deps
+        deps = ctx.attr.deps + [exec_env.lib]
         provides, signed = _build_binary(ctx, exec_env, name, deps)
-        providers.append(exec_env.create_provider(
-            ctx,
-            exec_env,
-            **provides
-        ))
+        providers.append(exec_env.provider(**provides))
         default_info.append(provides["default"])
 
         # FIXME(cfrantz): logs are a special case and get added into
         # the DefaultInfo provider.
         if "logs" in provides:
             default_info.extend(provides["logs"])
+
+        # FIXME(cfrantz): Special case: The englishbreakfast verilator model
+        # requires a non-scrambled ROM image.
+        if provides.get("rom32"):
+            default_info.append(provides["rom32"])
+
         groups.update(_as_group_info(exec_env.exec_env, signed))
         groups.update(_as_group_info(exec_env.exec_env, provides))
 
@@ -270,6 +273,11 @@ common_binary_attrs = {
         doc = "Naming convention for binary artifacts.",
         default = "{name}_{exec_env}",
     ),
+    "kind": attr.string(
+        doc = "Binary kind: flash, ram or rom",
+        default = "flash",
+        values = ["flash", "ram", "rom"],
+    ),
     # FIXME(cfrantz): This should come from the ExecEnvInfo provider, but
     # I was unable to make that work.  See the comment in `exec_env.bzl`.
     "extract_sw_logs": attr.label(
@@ -278,6 +286,12 @@ common_binary_attrs = {
         executable = True,
         cfg = "exec",
     ),
+    "rom_scramble_tool": attr.label(
+        doc = "ROM scrambling tool.",
+        default = "//hw/ip/rom_ctrl/util:scramble_image",
+        executable = True,
+        cfg = "exec",
+    ),
     "_cleanup_script": attr.label(
         allow_single_file = True,
         default = "@//rules/scripts:expand_tabs.sh",
@@ -304,17 +318,13 @@ def _opentitan_test(ctx):
     # If the test is supplied exactly one file and no deps _and_ that file
     # is a provider for the current exec_env, then we assume that it's a
     # pre-built binary.
-    if len(ctx.attr.srcs) == 1 and len(ctx.attr.deps) == 0 and exec_env.get_provider(ctx.attr.srcs[0]):
-        p = exec_env.get_provider(ctx.attr.srcs[0])
+    if len(ctx.attr.srcs) == 1 and len(ctx.attr.deps) == 0 and exec_env.provider in ctx.attr.srcs[0]:
+        p = ctx.attr.srcs[0][exec_env.provider]
     else:
         name = _binary_name(ctx, exec_env)
-        deps = [exec_env.lib] + ctx.attr.deps
+        deps = ctx.attr.deps + [exec_env.lib]
         provides, signed = _build_binary(ctx, exec_env, name, deps)
-        p = exec_env.create_provider(
-            ctx,
-            exec_env,
-            **provides
-        )
+        p = exec_env.provider(**provides)
 
     executable, runfiles = exec_env.test_dispatch(ctx, exec_env, p)
     return DefaultInfo(
@@ -335,7 +345,7 @@ opentitan_test = rv_rule(
             cfg = "exec",
         ),
         "rom": attr.label(
-            allow_single_file = True,
+            allow_files = True,
             doc = "ROM image override for this test",
         ),
         "otp": attr.label(

rules/opentitan/defs.bzl

@@ -16,7 +16,9 @@ load(
 load(
     "@lowrisc_opentitan//rules/opentitan:fpga_cw310.bzl",
     _cw310_params = "cw310_params",
+    _fpga_cw305 = "fpga_cw305",
     _fpga_cw310 = "fpga_cw310",
+    _fpga_cw340 = "fpga_cw340",
 )
 load(
     "@lowrisc_opentitan//rules/opentitan:sim_verilator.bzl",
@@ -39,6 +41,8 @@ opentitan_transition = _opentitan_transition
 
 opentitan_binary = _opentitan_binary
 fpga_cw310 = _fpga_cw310
+fpga_cw305 = _fpga_cw305
+fpga_cw340 = _fpga_cw340
 cw310_params = _cw310_params
 
 sim_verilator = _sim_verilator
@@ -95,12 +99,14 @@ def _hacky_tags(env):
 def opentitan_test(
         name,
         srcs,
+        kind = "flash",
         deps = [],
         copts = [],
         defines = [],
         local_defines = [],
         includes = [],
         linkopts = [],
+        linker_script = None,
         exec_env = {},
         cw310 = _cw310_params(),
         dv = _dv_params(),
@@ -112,11 +118,13 @@ def opentitan_test(
       name: The base name of the test.  The name will be extended with the name
             of the execution environment.
       srcs: The source files (or a binary image) for this test.
+      kind: The kind of test (flash, ram, rom).
       deps: Dependecies for this test.
       copts: Compiler options for this test.
       defines: Compiler defines for this test.
       local_defines: Compiler defines for this test.
       includes: Additional compiler include dirs for this test.
+      linker_script: Linker script for this test.
       linkopts: Linker options for this test.
       exec_env: A dictionary of execution environments.  The keys are labels to
                 execution environments.  The values are the kwargs parameter names
@@ -145,11 +153,13 @@ def opentitan_test(
         _opentitan_test(
             name = test_name,
             srcs = srcs,
+            kind = kind,
             deps = deps,
             copts = copts,
             defines = defines,
             local_defines = local_defines,
             includes = includes,
+            linker_script = linker_script,
             linkopts = linkopts,
             exec_env = env,
             naming_convention = "{name}",

rules/opentitan/exec_env.bzl

@@ -11,7 +11,7 @@ _FIELDS = {
     "rsa_key": ("attr.rsa_key", False),
     "spx_key": ("attr.spx_key", False),
     "manifest": ("file.manifest", False),
-    "rom": ("file.rom", False),
+    "rom": ("attr.rom", False),
     "otp": ("file.otp", False),
     "bitstream": ("file.bitstream", False),
     "args": ("attr.args", False),
@@ -23,6 +23,7 @@ _FIELDS = {
     "otp_seed": ("attr.otp_seed", False),
     "otp_data_perm": ("attr.otp_data_perm", False),
     "flash_scramble_tool": ("attr.flash_scramble_tool", False),
+    "rom_scramble_config": ("file.rom_scramble_config", False),
     "_opentitantool": ("executable._opentitantool", True),
 }
 
@@ -124,7 +125,7 @@ def exec_env_common_attrs(**kwargs):
         ),
         "rom": attr.label(
             default = kwargs.get("rom"),
-            allow_single_file = True,
+            allow_files = True,
             doc = "ROM image to use in this environment",
         ),
         "otp": attr.label(
@@ -177,6 +178,17 @@ def exec_env_common_attrs(**kwargs):
             executable = True,
             cfg = "exec",
         ),
+        "rom_scramble_tool": attr.label(
+            doc = "ROM scrambling tool.",
+            default = "//hw/ip/rom_ctrl/util:scramble_image",
+            executable = True,
+            cfg = "exec",
+        ),
+        "rom_scramble_config": attr.label(
+            default = kwargs.get("rom_scramble_config", None),
+            doc = "ROM scrambling config for this environment",
+            allow_single_file = True,
+        ),
         "_opentitantool": attr.label(
             default = "//sw/host/opentitantool:opentitantool",
             executable = True,