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[chip-test] chip_sw_entropy_src_validation #20147

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2 of 10 tasks
vogelpi opened this issue Oct 20, 2023 · 0 comments
Open
2 of 10 tasks

[chip-test] chip_sw_entropy_src_validation #20147

vogelpi opened this issue Oct 20, 2023 · 0 comments
Labels
Component:ChipLevelTest Used to filter the chip-level test backlog IP:entropy_src SiVal:BazelLinkNeeded SiVal:NewTest New test specific for SiVal

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@vogelpi
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vogelpi commented Oct 20, 2023

Test point name

https://github.com/lowRISC/opentitan/blob/master/hw/top_earlgrey/data/ip/chip_entropy_src_testplan.hjson#L165

Host side component

None

OpenTitanTool infrastructure implemented

None

Silicon Validation (SiVal)

Yes

Emulation Targets

  • None
  • CW310
  • Hyperdebug + CW310

Contact person

@vogelpi @andreaskurth

Checklist

Please fill out this checklist as items are completed. Link to PRs and issues as appropriate.

  • Check if existing test covers most or all of this testpoint (if so, either extend said test to cover all points, or skip the next 3 checkboxes)
  • Device-side (C) component developed
  • Bazel build rules developed
  • Host-side component developed
  • HJSON test plan updated with test name (so it shows up in the dashboard)
  • Test added to dvsim nightly regression (and passing at time of checking)
  • For SiVal test cases, test is running relevant FPGA or silicon regression
@vogelpi vogelpi added IP:entropy_src Component:ChipLevelTest Used to filter the chip-level test backlog SiVal:NewTest New test specific for SiVal labels Oct 20, 2023
@vogelpi vogelpi added this to the Earlgrey ES SV1 milestone Oct 20, 2023
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Labels
Component:ChipLevelTest Used to filter the chip-level test backlog IP:entropy_src SiVal:BazelLinkNeeded SiVal:NewTest New test specific for SiVal
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