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[chip-test] chip_sw_i2c_override #19837

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1 of 10 tasks
marnovandermaas opened this issue Oct 4, 2023 · 0 comments
Closed
1 of 10 tasks

[chip-test] chip_sw_i2c_override #19837

marnovandermaas opened this issue Oct 4, 2023 · 0 comments
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Component:ChipLevelTest Used to filter the chip-level test backlog IP:i2c SiVal:NewTest New test specific for SiVal

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@marnovandermaas
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Test point name

chip_sw_i2c_override

Host side component

Rust

OpenTitanTool infrastructure implemented

Yes

Silicon Validation (SiVal)

Yes

Emulation Targets

  • None
  • CW310
  • Hyperdebug + CW310

Contact person

marnovandermaas

Checklist

Please fill out this checklist as items are completed. Link to PRs and issues as appropriate.

  • Check if existing test covers most or all of this testpoint (if so, either extend said test to cover all points, or skip the next 3 checkboxes)
  • Device-side (C) component developed
  • Bazel build rules developed
  • Host-side component developed
  • HJSON test plan updated with test name (so it shows up in the dashboard)
  • Test added to dvsim nightly regression (and passing at time of checking)
  • For SiVal test cases, test is running relevant FPGA or silicon regression

Silicon validation effort estimate:

estimate 2

@marnovandermaas marnovandermaas added Component:ChipLevelTest Used to filter the chip-level test backlog IP:i2c SiVal:NewTest New test specific for SiVal labels Oct 4, 2023
@marnovandermaas marnovandermaas added this to the Earlgrey ES SV2 milestone Oct 10, 2023
@engdoreis engdoreis self-assigned this Nov 7, 2023
@jwnrt jwnrt changed the title [chip-test,sival] I2C override [chip-test] chip_sw_i2c_override Oct 28, 2024
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Labels
Component:ChipLevelTest Used to filter the chip-level test backlog IP:i2c SiVal:NewTest New test specific for SiVal
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