[spi_device] payload upload ignores dummy cycles

[weicaiyang]

@eunchan

Looks like payload upload ignores dummy cycles. We starts to upload payload when all addresses are collected regardless of the value of dummy_size, right?

Perhaps I can assume dummy cycle is 0 when it's not a read, right?

[eunchan]

Yes. It assumes no dummy cycle between the address and payload.
Still, I think supporting the dummy cycle is a good idea.

Let me change this ticket to Future Release Thanks!

[weicaiyang]

@eunchan Thanks for the confirmation

[andreaskurth]

Triaged for spi_device. Assigning to M2.5 with Priority:P2 Priority: medium for the moment. I think this is according to our current spec, but I'd like to mention this to the product team before we definitely defer this to Type:FutureRelease Not relevant to currently planned releases/milestones .

[a-will]

For what it's worth, for the type of device we are modeling, I believe writes are buffered in low-latency storage, then executed upon the completion of the SPI transaction. Dummy cycles are used for reads to accommodate the high-latency arrays where data originates.

Most likely, there is no use for dummy cycle support on writes. However, it doesn't hurt to ask the product team to be sure.

[hcallahan-lowrisc]

Checked as part of the product-team review process, believe that all relevant devices do not have opcodes that have dummy cycles for writes.
Hence, defer to FutureRelease.

[a-will]

Closing, since the set of SPI flash operations we support does not include dummy cycles for write commands.