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[dv/adc_ctrl] Moving assertions to RTL or interface for reusability #13540

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cindychip opened this issue Jul 7, 2022 · 4 comments
Open

[dv/adc_ctrl] Moving assertions to RTL or interface for reusability #13540

cindychip opened this issue Jul 7, 2022 · 4 comments
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Component:DV DV issue: testbench, test case, etc. IP:adc_ctrl Milestone:V3 Type:FutureRelease Not relevant to currently planned releases/milestones Type:Icebox Changes deferred to future milestones
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@cindychip
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Detailed discussion here:
#11744

@cindychip cindychip added this to the Project: M3 milestone Jul 7, 2022
@cindychip cindychip self-assigned this Jul 7, 2022
@cindychip cindychip added the Component:DV DV issue: testbench, test case, etc. label Jul 7, 2022
@andreaskurth
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Triaged for adc_ctrl. I think this is not necessary for M2.5, so I'm labeling it Type:Icebox Changes deferred to future milestones . @cindychip if you disagree, PLMK

@andreaskurth andreaskurth added Type:Icebox Changes deferred to future milestones Triaged labels Feb 24, 2023
@msfschaffner msfschaffner added the Earlgrey-PROD Candidate Temporary label to triage issues into Earlgrey-PROD Milestones label Oct 6, 2023
This was referenced Mar 8, 2024
@johngt
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johngt commented Jun 20, 2024

At this stage - moving assertions to RTL is not going to be done as an ECO so should be considered for future release.
@moidx / @vogelpi / @andreaskurth

@johngt johngt added Type:FutureRelease Not relevant to currently planned releases/milestones and removed Earlgrey-PROD Candidate Temporary label to triage issues into Earlgrey-PROD Milestones labels Jun 20, 2024
@johngt johngt modified the milestones: Earlgrey-PROD.M5, Backlog Jun 20, 2024
@matutem
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matutem commented Jun 20, 2024

Can someone clarify which assertions this refers to? There are some assertions for the adc_ctrl fsm that are written in a module at https://github.com/lowRISC/opentitan/blob/master/hw/ip/adc_ctrl/dv/sva/adc_ctrl_fsm_sva.sv, but could be moved to an interface, which is simple. Other assertions are in the tb.sv file, and I imagine these are the assertions relevant to this issue.

@vogelpi
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vogelpi commented Jun 25, 2024

I think it's probably both the assertions inside tb.sv as well as the ones inside adc_ctrl_fsm_sva.sv. But I seriously think we have more important things to do right now. Let's not bother about this now.

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Labels
Component:DV DV issue: testbench, test case, etc. IP:adc_ctrl Milestone:V3 Type:FutureRelease Not relevant to currently planned releases/milestones Type:Icebox Changes deferred to future milestones
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