[ipgen,clkmgr] Generate clkmgr files with ipgen

The legacy flow and files is preserved.
Add FUSESOC_IGNORE in hw/ip_templates/clkmgr: it can be
removed once the clkmgr change to ipgen is complete.

Part of #8440

Signed-off-by: Guillermo Maturana <[email protected]>

hw/ip_templates/clkmgr/FUSESOC_IGNORE

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+

hw/top_earlgrey/ip_autogen/clkmgr/BUILD

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+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "all_files",
+    srcs = glob(["**"]) + [
+        "//hw/ip/clkmgr/data:all_files",
+    ],
+)

hw/top_earlgrey/ip_autogen/clkmgr/FUSESOC_IGNORE

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+

hw/top_earlgrey/ip_autogen/clkmgr/README.md

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+# Clock Manager HWIP Technical Specification
+
+[`clkmgr`](https://reports.opentitan.org/hw/ip/clkmgr/dv/latest/report.html):
+![](https://dashboards.lowrisc.org/badges/dv/clkmgr/test.svg)
+![](https://dashboards.lowrisc.org/badges/dv/clkmgr/passing.svg)
+![](https://dashboards.lowrisc.org/badges/dv/clkmgr/functional.svg)
+![](https://dashboards.lowrisc.org/badges/dv/clkmgr/code.svg)
+
+# Overview
+
+This document specifies the functionality of the OpenTitan clock manager.
+
+## Features
+
+- Attribute based controls of OpenTitan clocks.
+- Minimal software clock controls to reduce risks in clock manipulation.
+- External clock switch support
+- Clock frequency /time-out measurement

hw/top_earlgrey/ip_autogen/clkmgr/clkmgr.core

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+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: lowrisc:opentitan:top_earlgrey_clkmgr:0.1
+description: "Top specific clock manager "
+virtual:
+  - lowrisc:ip_interfaces:clkmgr
+
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:ip:lc_ctrl_pkg
+      - lowrisc:ip_interfaces:pwrmgr_pkg
+      - lowrisc:ip:tlul
+      - lowrisc:prim:all
+      - lowrisc:prim:buf
+      - lowrisc:prim:clock_buf
+      - lowrisc:prim:clock_div
+      - lowrisc:prim:clock_gating
+      - lowrisc:prim:edge_detector
+      - lowrisc:prim:lc_sync
+      - lowrisc:prim:lc_sender
+      - lowrisc:prim:measure
+      - lowrisc:opentitan:top_earlgrey_clkmgr_pkg:0.1
+      - lowrisc:opentitan:top_earlgrey_clkmgr_reg:0.1
+    files:
+      - rtl/clkmgr.sv
+      - rtl/clkmgr_byp.sv
+      - rtl/clkmgr_clk_status.sv
+      - rtl/clkmgr_meas_chk.sv
+      - rtl/clkmgr_root_ctrl.sv
+      - rtl/clkmgr_trans.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+    files:
+    file_type: vlt
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+    files:
+      - lint/clkmgr.waiver
+    file_type: waiver
+
+parameters:
+  SYNTHESIS:
+    datatype: bool
+    paramtype: vlogdefine
+
+targets:
+  default: &default_target
+    filesets:
+      - tool_verilator  ? (files_verilator_waiver)
+      - tool_ascentlint ? (files_ascentlint_waiver)
+      - files_rtl
+    toplevel: clkmgr
+
+  lint:
+    <<: *default_target
+    default_tool: verilator
+    parameters:
+      - SYNTHESIS=true
+    tools:
+      verilator:
+        mode: lint-only
+        verilator_options:
+          - "-Wall"

hw/top_earlgrey/ip_autogen/clkmgr/clkmgr_pkg.core

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+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: lowrisc:opentitan:top_earlgrey_clkmgr_pkg:0.1
+description: "Top specific clock manager package"
+virtual:
+  - lowrisc:ip_interfaces:clkmgr_pkg
+
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:constants:top_pkg
+      - lowrisc:ip_interfaces:pwrmgr_pkg
+      - lowrisc:prim:mubi
+    files:
+      - rtl/clkmgr_pkg.sv
+    file_type: systemVerilogSource
+
+targets:
+  default: &default_target
+    filesets:
+      - files_rtl

hw/top_earlgrey/ip_autogen/clkmgr/clkmgr_reg.core

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+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: lowrisc:opentitan:top_earlgrey_clkmgr_reg:0.1
+description: "Clock manager registers"
+virtual:
+  - lowrisc:ip_interfaces:clkmgr_reg
+
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:tlul:headers
+    files:
+      - rtl/clkmgr_reg_pkg.sv
+      - rtl/clkmgr_reg_top.sv
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_rtl

hw/top_earlgrey/ip_autogen/clkmgr/data/BUILD

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+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:autogen.bzl", "autogen_hjson_header")
+
+package(default_visibility = ["//visibility:public"])
+
+autogen_hjson_header(
+    name = "clkmgr_regs",
+    srcs = [
+        "clkmgr.hjson",
+    ],
+)
+
+filegroup(
+    name = "all_files",
+    srcs = glob(["**"]),
+)