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[otp_ctrl,dv] fix parallel sequence test
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dai_wr has multiple csr access including backdoor access.
In parallel_lc_esc vseq, `wait_csr_no_outstanding` is not good enough
because it can terminate test thread while dai write operation is in progress.
Update `rand_wait_csr_no_outstanding` s.t wait for no outstanding dai write operation.

Signed-off-by: Jaedon Kim <[email protected]>
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jdonjdon committed Aug 14, 2023
1 parent b111f94 commit 44a6dc6
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Showing 2 changed files with 5 additions and 1 deletion.
5 changes: 4 additions & 1 deletion hw/ip/otp_ctrl/dv/env/seq_lib/otp_ctrl_base_vseq.sv
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ class otp_ctrl_base_vseq extends cip_base_vseq #(
// when LC error bit is set.
bit default_req_blocking = 1;
bit lc_prog_blocking = 1;

bit dai_wr_inprogress = 0;
uint32_t op_done_spinwait_timeout_ns = 20_000_000;

// Collect current lc_state and lc_cnt. This is used to create next lc_state and lc_cnt without
Expand Down Expand Up @@ -146,9 +146,11 @@ class otp_ctrl_base_vseq extends cip_base_vseq #(
bit [TL_DW-1:0] wdata0,
bit [TL_DW-1:0] wdata1 = 0);
bit [TL_DW-1:0] val;
dai_wr_inprogress = 1;
if (write_unused_addr) begin
if (used_dai_addrs.exists(addr[OTP_ADDR_WIDTH - 1 : 0])) begin
`uvm_info(`gfn, $sformatf("addr %0h is already written!", addr), UVM_MEDIUM)
dai_wr_inprogress = 0;
return;
end else begin
used_dai_addrs[addr] = 1;
Expand Down Expand Up @@ -177,6 +179,7 @@ class otp_ctrl_base_vseq extends cip_base_vseq #(
end
wait_dai_op_done();
rd_and_clear_intrs();
dai_wr_inprogress = 0;
endtask : dai_wr

// This task triggers an OTP readout sequence via the DAI interface
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@ class otp_ctrl_parallel_lc_esc_vseq extends otp_ctrl_dai_lock_vseq;
endcase

wait_no_outstanding_access();
wait (dai_wr_inprogress == 0);
endtask

virtual task set_lc_esc_and_check();
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