diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 53e0a581762d4a..6d94cfdc720919 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -803,7 +803,9 @@ void AArch64FrameLowering::allocateStackSpace(
     return;
   }
 
-// Emit a variable-length allocation probing loop.
+  // Emit a variable-length allocation probing loop.
+  // TODO: As an optimisation, the loop can be "unrolled" into a few parts,
+  // each of them guaranteed to adjust the stack by less than the probe size.
   Register TargetReg = findScratchNonCalleeSaveRegister(&MBB);
   assert(TargetReg != AArch64::NoRegister);
   // SUB Xd, SP, AllocSize
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-sve.ll b/llvm/test/CodeGen/AArch64/stack-probing-sve.ll
index f49755e709ae68..4dad104e66f20d 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-sve.ll
+++ b/llvm/test/CodeGen/AArch64/stack-probing-sve.ll
@@ -94,6 +94,8 @@ entry:
 ; As above, but with 17 SVE vectors of stack space. Now we need
 ; a probing loops since stack adjustment may be greater than
 ; the probe size (17 x 256 = 4354 bytes)
+; TODO: Allocating `k*16+r` SVE vectors can be unrolled into
+; emiting the `k + r` sequences of `addvl sp, sp, #-N; str xzr, [sp]`
 define void @sve_17_vector(ptr %out) #0 {
 ; CHECK-LABEL: sve_17_vector:
 ; CHECK:       // %bb.0: // %entry