firtool-1.68.0

What's Changed

• [ImportVerilog] Add assignment statements by @fabianschuiki in #6773
• [WireDFT] Remove WireDFT by @nandor in #6761
• [SV] Use a symbol in macro identifiers by @nandor in #6777
• [Sim] Emit a SYNTHESIS macro declaration if needed by @nandor in #6778
• [SV] Verify macro reference symbols by @nandor in #6780
• [FIRRTL] Handle reference ports when Classes dedup. by @mikeurbach in #6770
• LLVM bump by @prithayan in #6782
• [Seq] Allow presets for more types on firreg by @nandor in #6781
• [OM] Add C API and Python bindings for EvaluatorValue::Reference. by @mikeurbach in #6785
• Bump LLVM to 1e828f838cc0f15074f3dbbb04929c06ef0c9729. by @mikeurbach in #6784
• [FIRTOOL] Move LowerIntrinsic to preprocess by @uenoku in #6796

Full Changelog: firtool-1.67.0...firtool-1.68.0