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[LLHD] Add Sig2Reg pass for graph regions #7623

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Sep 25, 2024
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1 change: 1 addition & 0 deletions include/circt/Dialect/LLHD/Transforms/Passes.h
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ std::unique_ptr<OperationPass<hw::HWModuleOp>> createEarlyCodeMotionPass();

std::unique_ptr<OperationPass<hw::HWModuleOp>> createTemporalCodeMotionPass();

#define GEN_PASS_DECL_SIG2REG
#define GEN_PASS_DECL_DESEQUENTIALIZATION
#define GEN_PASS_REGISTRATION
#include "circt/Dialect/LLHD/Transforms/Passes.h.inc"
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4 changes: 4 additions & 0 deletions include/circt/Dialect/LLHD/Transforms/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -111,6 +111,10 @@ def EarlyCodeMotion : Pass<"llhd-early-code-motion", "hw::HWModuleOp"> {
let constructor = "circt::llhd::createEarlyCodeMotionPass()";
}

def Sig2Reg : Pass<"llhd-sig2reg", "hw::HWModuleOp"> {
let summary = "promote LLHD signals to SSA values";
}

def TemporalCodeMotion : Pass<"llhd-temporal-code-motion", "hw::HWModuleOp"> {
let summary = "move drive operations to the exit basic block in processes";
let description = [{
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1 change: 1 addition & 0 deletions lib/Dialect/LLHD/Transforms/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@ add_circt_dialect_library(CIRCTLLHDTransforms
FunctionEliminationPass.cpp
MemoryToBlockArgumentPass.cpp
ProcessLoweringPass.cpp
Sig2RegPass.cpp
TemporalCodeMotionPass.cpp
TemporalRegions.cpp

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114 changes: 114 additions & 0 deletions lib/Dialect/LLHD/Transforms/Sig2RegPass.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,114 @@
//===- Sig2RegPass.cpp - Implement the Sig2Reg Pass -----------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Implement Pass to promote LLHD signals to SSA values.
//
//===----------------------------------------------------------------------===//

#include "circt/Dialect/HW/HWOps.h"
#include "circt/Dialect/LLHD/IR/LLHDOps.h"
#include "circt/Dialect/LLHD/Transforms/Passes.h"
#include "llvm/Support/Debug.h"

#define DEBUG_TYPE "llhd-sig2reg"

namespace circt {
namespace llhd {
#define GEN_PASS_DEF_SIG2REG
#include "circt/Dialect/LLHD/Transforms/Passes.h.inc"
} // namespace llhd
} // namespace circt

using namespace mlir;
using namespace circt;

namespace {
struct Sig2RegPass : public circt::llhd::impl::Sig2RegBase<Sig2RegPass> {
void runOnOperation() override;
};
} // namespace

static LogicalResult promote(llhd::SignalOp sigOp) {
SmallVector<llhd::PrbOp> probes;
llhd::DrvOp driveOp;
for (auto *user : sigOp.getResult().getUsers()) {
if (user->getBlock() != sigOp->getBlock()) {
LLVM_DEBUG(
{ llvm::dbgs() << "Promotion failed: user in other block\n"; });
return failure();
}

if (auto prbOp = dyn_cast<llhd::PrbOp>(user)) {
probes.push_back(prbOp);
continue;
}

if (auto drvOp = dyn_cast<llhd::DrvOp>(user)) {
if (driveOp) {
LLVM_DEBUG({ llvm::dbgs() << "Promotion failed: multiple drivers\n"; });
return failure();
}

if (drvOp.getEnable()) {
LLVM_DEBUG(
{ llvm::dbgs() << "Promotion failed: conditional driver\n"; });
return failure();
}

driveOp = drvOp;
continue;
}

LLVM_DEBUG({
llvm::dbgs() << "Promotion failed: user that is not a probe or drive: "
<< *user << "\n";
});
return failure();
}

Value replacement;
if (driveOp) {
auto timeOp = driveOp.getTime().getDefiningOp<llhd::ConstantTimeOp>();
if (!timeOp)
return failure();

OpBuilder builder(driveOp);
if (timeOp.getValue().getTime() == 0 && timeOp.getValue().getDelta() == 0)
replacement = driveOp.getValue();
else
replacement = builder.create<llhd::DelayOp>(
driveOp.getLoc(), driveOp.getValue(), timeOp.getValue());
} else {
replacement = sigOp.getInit();
}

for (auto prb : probes) {
prb.getResult().replaceAllUsesWith(replacement);
prb.erase();
}

if (driveOp)
driveOp.erase();

return success();
}

void Sig2RegPass::runOnOperation() {
hw::HWModuleOp moduleOp = getOperation();

for (auto sigOp :
llvm::make_early_inc_range(moduleOp.getOps<llhd::SignalOp>())) {
LLVM_DEBUG(
{ llvm::dbgs() << "\nAttempting to promote " << sigOp << "\n"; });
if (failed(promote(sigOp)))
continue;

LLVM_DEBUG({ llvm::dbgs() << "Successfully promoted!\n"; });
sigOp.erase();
}
}
57 changes: 57 additions & 0 deletions test/Dialect/LLHD/Transforms/sig2reg.mlir
Original file line number Diff line number Diff line change
@@ -0,0 +1,57 @@
// RUN: circt-opt --llhd-sig2reg %s | FileCheck %s

func.func @getTime() -> !llhd.time {
%time = llhd.constant_time <1ns, 0d, 0e>
return %time : !llhd.time
}

hw.module @basic(in %init : i32, in %cond : i1, in %in0 : i32, in %in1 : i32, out prb1 : i32, out prb2 : i32, out prb3 : i32, out prb4 : i32, out prb5 : i32, out prb6 : i32, out prb7 : i32) {
%opaque_time = func.call @getTime() : () -> !llhd.time
%epsilon = llhd.constant_time <0ns, 0d, 1e>
%delta = llhd.constant_time <0ns, 1d, 0e>

// Promoted without delay op
%sig1 = llhd.sig %init : i32
// Promoted with delay op
%sig2 = llhd.sig %init : i32
// Not promoted because time is opaque, can support if the delay op takes a
// time value instead of attribute
%sig3 = llhd.sig %init : i32
// Promoted to %init because no drive present
%sig4 = llhd.sig %init : i32
// Not promoted because of drive condition
%sig5 = llhd.sig %init : i32
// Not promoted because a user is in a nested region
%sig6 = llhd.sig %init : i32
// Not promoted because of multiple drivers
%sig7 = llhd.sig %init : i32

llhd.drv %sig1, %in0 after %epsilon : !hw.inout<i32>
// CHECK: [[DELAY:%.+]] = llhd.delay %in0 by <0ns, 1d, 0e> : i32
llhd.drv %sig2, %in0 after %delta : !hw.inout<i32>
llhd.drv %sig3, %in0 after %opaque_time : !hw.inout<i32>

llhd.drv %sig5, %in0 after %epsilon if %cond : !hw.inout<i32>

scf.if %cond {
llhd.drv %sig6, %in0 after %epsilon : !hw.inout<i32>
}

llhd.drv %sig7, %in0 after %epsilon : !hw.inout<i32>
llhd.drv %sig7, %in1 after %delta : !hw.inout<i32>

%prb1 = llhd.prb %sig1 : !hw.inout<i32>
%prb2 = llhd.prb %sig2 : !hw.inout<i32>
// CHECK: [[PRB3:%.+]] = llhd.prb %sig3
%prb3 = llhd.prb %sig3 : !hw.inout<i32>
%prb4 = llhd.prb %sig4 : !hw.inout<i32>
// CHECK: [[PRB5:%.+]] = llhd.prb %sig5
%prb5 = llhd.prb %sig5 : !hw.inout<i32>
// CHECK: [[PRB6:%.+]] = llhd.prb %sig6
%prb6 = llhd.prb %sig6 : !hw.inout<i32>
// CHECK: [[PRB7:%.+]] = llhd.prb %sig7
%prb7 = llhd.prb %sig7 : !hw.inout<i32>

// CHECK: hw.output %in0, [[DELAY]], [[PRB3]], %init, [[PRB5]], [[PRB6]], [[PRB7]] :
hw.output %prb1, %prb2, %prb3, %prb4, %prb5, %prb6, %prb7 : i32, i32, i32, i32, i32, i32, i32
}
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