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[Seq] Allow presets for more types on firreg #6781
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Generally looks fine. Can you add tests that check behavior of registers that have 64-but widths (either scalars or aggregates)?
How should this work for aggregates that are larger than 64-bit?
if (hw::type_isa<seq::ClockType>(ty)) { | ||
width = 1; | ||
} else { | ||
int64_t maybeWidth = hw::getBitWidth(ty); |
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Does this work for 64-bit unsigned types?
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Why wouldn't it?
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The issue I was concerned about is that this was casting an unsigned type returned by hw::getBitWidth
to a signed type. However, hw::getBitWidth
returns an int64_t
so there is no problem. If this was an issue, then this would have to be an absolutely enormous constant...
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Generally looks good.
There seem to be some errors in the checking logic and in the location of error messages. Please fix those before landing.
if (hw::type_isa<seq::ClockType>(ty)) { | ||
width = 1; | ||
} else { | ||
int64_t maybeWidth = hw::getBitWidth(ty); |
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Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The issue I was concerned about is that this was casting an unsigned type returned by hw::getBitWidth
to a signed type. However, hw::getBitWidth
returns an int64_t
so there is no problem. If this was an issue, then this would have to be an absolutely enormous constant...
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