From 3c34a5bf99d46a00f6db5b3c23e9a3b78587a3a4 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 18 Feb 2024 01:02:46 +0000 Subject: [PATCH 01/25] kernel: nvmem: correctly assign fwnode to MMC block device Use device_set_node to make sure OF node gets assigned on block devices to be used as NVMEM providers. While block partitions were already working fine as NVMEM providers, bare block devices such as mmcblk0boot1 will not work without this change. Fixes: fc153aa8d9 ("kernel: import pending patches adding support for NVMEM on UBI and MMC") Signed-off-by: Daniel Golle --- .../950-0111-MMC-added-alternative-MMC-driver.patch | 6 +++--- .../450-14-mmc-block-set-fwnode-of-disk-devices.patch | 5 +++-- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch index 693ed2b6d1e30c..a89940dacb6f77 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch @@ -266,7 +266,7 @@ Signed-off-by: Phil Elwell static inline int mmc_blk_part_switch(struct mmc_card *card, unsigned int part_type); static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, -@@ -3049,6 +3056,8 @@ static int mmc_blk_probe(struct mmc_card +@@ -3050,6 +3057,8 @@ static int mmc_blk_probe(struct mmc_card { struct mmc_blk_data *md; int ret = 0; @@ -275,7 +275,7 @@ Signed-off-by: Phil Elwell /* * Check that the card supports the command class(es) we need. -@@ -3056,7 +3065,16 @@ static int mmc_blk_probe(struct mmc_card +@@ -3057,7 +3066,16 @@ static int mmc_blk_probe(struct mmc_card if (!(card->csd.cmdclass & CCC_BLOCK_READ)) return -ENODEV; @@ -293,7 +293,7 @@ Signed-off-by: Phil Elwell card->complete_wq = alloc_workqueue("mmc_complete", WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); -@@ -3071,6 +3089,17 @@ static int mmc_blk_probe(struct mmc_card +@@ -3072,6 +3090,17 @@ static int mmc_blk_probe(struct mmc_card goto out_free; } diff --git a/target/linux/generic/pending-6.1/450-14-mmc-block-set-fwnode-of-disk-devices.patch b/target/linux/generic/pending-6.1/450-14-mmc-block-set-fwnode-of-disk-devices.patch index d033abb70de434..a9e53f115530e5 100644 --- a/target/linux/generic/pending-6.1/450-14-mmc-block-set-fwnode-of-disk-devices.patch +++ b/target/linux/generic/pending-6.1/450-14-mmc-block-set-fwnode-of-disk-devices.patch @@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle struct mmc_blk_data *md; int devidx, ret; char cap_str[10]; -@@ -2580,6 +2582,12 @@ static struct mmc_blk_data *mmc_blk_allo +@@ -2580,6 +2582,13 @@ static struct mmc_blk_data *mmc_blk_allo blk_queue_write_cache(md->queue.queue, cache_enabled, fua_enabled); @@ -31,7 +31,8 @@ Signed-off-by: Daniel Golle + fwnode = device_get_named_child_node(subname ? md->parent->parent : + md->parent, + subname ? subname : "block"); -+ ddev->fwnode = fwnode; ++ if (fwnode) ++ device_set_node(ddev, fwnode); + string_get_size((u64)size, 512, STRING_UNITS_2, cap_str, sizeof(cap_str)); From bf205854128cc791e5805ed20ef3bd0bb53c339a Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sat, 17 Feb 2024 22:14:01 +0000 Subject: [PATCH 02/25] mediatek: filogic: convert GL.iNet MT-6000 to NVMEM-on-MMC Now that we can reference MMC partitions in device tree, use that to get rid of Wi-Fi EEPROM and MAC address setup in userspace. Signed-off-by: Daniel Golle --- .../mediatek/dts/mt7986a-glinet-gl-mt6000.dts | 45 +++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 5 --- .../etc/hotplug.d/firmware/11-mt76-caldata | 1 - 3 files changed, 45 insertions(+), 6 deletions(-) diff --git a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts index 26996e7b4a5ab2..fd0e1a69157ed0 100644 --- a/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts +++ b/target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts @@ -13,6 +13,7 @@ aliases { serial0 = &uart0; + label-mac-device = &gmac1; led-boot = &led_blue; led-failsafe = &led_blue; led-running = &led_white; @@ -84,6 +85,8 @@ compatible = "mediatek,eth-mac"; reg = <0>; phy-mode = "2500base-x"; + nvmem-cells = <&macaddr_factory_a 2>; + nvmem-cell-names = "mac-address"; fixed-link { speed = <2500>; @@ -95,6 +98,8 @@ gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; + nvmem-cells = <&macaddr_factory_a 0>; + nvmem-cell-names = "mac-address"; phy-mode = "2500base-x"; phy-handle = <&phy1>; }; @@ -285,6 +290,8 @@ }; &wifi { + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; pinctrl-names = "default"; pinctrl-0 = <&wf_2g_5g_pins>; status = "okay"; @@ -306,4 +313,42 @@ no-sd; no-sdio; status = "okay"; + + card@0 { + compatible = "mmc-card"; + reg = <0>; + + block { + compatible = "block-device"; + partitions { + block-partition-env { + partname = "u-boot-env"; + + nvmem-layout { + compatible = "u-boot,env-layout"; + }; + }; + + block-partition-factory { + partname = "factory"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr_factory_a: macaddr@a { + compatible = "mac-base"; + reg = <0xa 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + }; + }; + }; }; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 5542f1518afae2..caeeaaf22346f0 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -134,11 +134,6 @@ mediatek_setup_macs() wan_mac="$label_mac" lan_mac="$(macaddr_add $label_mac 1)" ;; - glinet,gl-mt6000) - label_mac=$(mmc_get_mac_binary factory 0x0a) - wan_mac=$label_mac - lan_mac=$(macaddr_add "$label_mac" 2) - ;; h3c,magic-nx30-pro) wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr) lan_mac=$(macaddr_add "$wan_mac" 1) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata index 22ab26608f8ab6..1ec648584d9829 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata @@ -72,7 +72,6 @@ case "$FIRMWARE" in CI_UBIPART="UBI_DEV" caldata_extract_ubi "Factory" 0x0 0x1000 ;; - glinet,gl-mt6000|\ jdcloud,re-cp-03) caldata_extract_mmc "factory" 0x0 0x1000 ;; From 7af3b202d4f8f324b7c1396e1a1f2ae9c516804a Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 18 Feb 2024 03:12:01 +0000 Subject: [PATCH 03/25] mediatek: mt7981: prevent system freezes on boot Import patch to make sure SGM_REG_SEL clock is always enabled as it seems that more registers than just SGMIISYS0 and SGMIISYS1 are depending on that clock being enabled. Signed-off-by: Daniel Golle --- ...981-topckgen-flag-SGM_REG_SEL-as-cri.patch | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 target/linux/mediatek/patches-6.1/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch diff --git a/target/linux/mediatek/patches-6.1/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch b/target/linux/mediatek/patches-6.1/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch new file mode 100644 index 00000000000000..8820d57f01fe35 --- /dev/null +++ b/target/linux/mediatek/patches-6.1/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch @@ -0,0 +1,30 @@ +From fc157139e6b7f8dfb6430ac7191ba754027705e8 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Sun, 18 Feb 2024 01:59:59 +0000 +Subject: [PATCH] clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical + +Without the SGM_REG_SEL clock enabled the system freezes if trying to +access registers used by MT7981 clock drivers itself. +Mark SGM_REG_SEL as critical to make sure it is always enabled to +prevent freezes on boot depending on probe order. + +Fixes: 813c3b53b55ba ("clk: mediatek: add MT7981 clock support") +Signed-off-by: Daniel Golle +--- + drivers/clk/mediatek/clk-mt7981-topckgen.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/clk/mediatek/clk-mt7981-topckgen.c ++++ b/drivers/clk/mediatek/clk-mt7981-topckgen.c +@@ -359,8 +359,9 @@ static const struct mtk_mux top_muxes[] + MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_325M_SEL, "sgm_325m_sel", + sgm_325m_parents, 0x050, 0x054, 0x058, 8, 1, 15, + 0x1C0, 21), +- MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_REG_SEL, "sgm_reg_sel", sgm_reg_parents, +- 0x050, 0x054, 0x058, 16, 1, 23, 0x1C0, 22), ++ MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_REG_SEL, "sgm_reg_sel", sgm_reg_parents, ++ 0x050, 0x054, 0x058, 16, 1, 23, 0x1C0, 22, ++ CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), + MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP97B_SEL, "eip97b_sel", eip97b_parents, + 0x050, 0x054, 0x058, 24, 3, 31, 0x1C0, 23), + /* CLK_CFG_6 */ From 6077fa2f614d14dff331b11c0f8d0ec145324695 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 18 Feb 2024 03:13:23 +0000 Subject: [PATCH 04/25] mediatek: mt7981: remove inaccurate compatible strings Remove more inaccurate compatible strings from various clock controllers of the MT7981 SoC. Signed-off-by: Daniel Golle --- .../files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi index c763b4ebb3f57e..acd40194b77802 100644 --- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi +++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi @@ -235,7 +235,7 @@ }; apmixedsys: apmixedsys@1001E000 { - compatible = "mediatek,mt7981-apmixedsys", "mediatek,mt7986-apmixedsys", "syscon"; + compatible = "mediatek,mt7981-apmixedsys", "syscon"; reg = <0 0x1001E000 0 0x1000>; #clock-cells = <1>; }; @@ -567,14 +567,14 @@ }; sgmiisys0: syscon@10060000 { - compatible = "mediatek,mt7981-sgmiisys_0", "mediatek,mt7986-sgmiisys_0", "syscon"; + compatible = "mediatek,mt7981-sgmiisys_0", "syscon"; reg = <0 0x10060000 0 0x1000>; mediatek,pnswap; #clock-cells = <1>; }; sgmiisys1: syscon@10070000 { - compatible = "mediatek,mt7981-sgmiisys_1", "mediatek,mt7986-sgmiisys_1", "syscon"; + compatible = "mediatek,mt7981-sgmiisys_1", "syscon"; reg = <0 0x10070000 0 0x1000>; #clock-cells = <1>; }; From 49ed52b862c9f3e0dc1c1024ccd4db3bc9795122 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sat, 17 Feb 2024 22:22:28 +0000 Subject: [PATCH 05/25] mediatek: filogic: convert GL.iNet MT-2500 to use NVMEM-on-MMC Use nvmem-layout in device tree instead of extracting MAC addresses in userspace. Signed-off-by: Daniel Golle --- .../mediatek/dts/mt7981b-glinet-gl-mt2500.dts | 54 +++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 5 -- 2 files changed, 54 insertions(+), 5 deletions(-) diff --git a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts index 068dd0f236e28a..03cfe4c825bc29 100644 --- a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts +++ b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts @@ -103,6 +103,8 @@ gmac0: mac@0 { compatible = "mediatek,eth-mac"; + nvmem-cells = <&macaddr_boot1_a 0>; + nvmem-cell-names = "mac-address"; reg = <0>; phy-mode = "2500base-x"; @@ -111,6 +113,8 @@ gmac1: mac@1 { compatible = "mediatek,eth-mac"; + nvmem-cells = <&macaddr_boot1_a 1>; + nvmem-cell-names = "mac-address"; reg = <1>; phy-mode = "gmii"; phy-handle = <&int_gbe_phy>; @@ -148,4 +152,54 @@ vmmc-supply = <®_3p3v>; cap-mmc-highspeed; non-removable; + + card@0 { + compatible = "mmc-card"; + reg = <0>; + + block { + compatible = "block-device"; + + partitions { + block-partition-u-boot-env { + partname = "u-boot-env"; + nvmem-layout { + compatible = "u-boot,env-layout"; + }; + }; + }; + }; + + boot1 { + compatible = "block-device"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_boot1_a: macaddr@a { + compatible = "mac-base"; + reg = <0xa 0x6>; + #nvmem-cell-cells = <1>; + }; + + ddns_boot1_10@10 { + reg = <0x10 0x10>; + }; + + sn_bak_boot1_20@20 { + reg = <0x20 0x10>; + }; + + sn_boot1_20@30 { + reg = <0x30 0x10>; + }; + + country_code_boot1_88@88 { + reg = <0x88 0x10>; + }; + }; + }; + }; }; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index caeeaaf22346f0..683282b87cef14 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -129,11 +129,6 @@ mediatek_setup_macs() ;; esac ;; - glinet,gl-mt2500) - label_mac="$(get_mac_binary "/dev/mmcblk0boot1" 0xA)" - wan_mac="$label_mac" - lan_mac="$(macaddr_add $label_mac 1)" - ;; h3c,magic-nx30-pro) wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr) lan_mac=$(macaddr_add "$wan_mac" 1) From 6da308f4de61676da448dda5690d45956d35b602 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= Date: Sat, 17 Feb 2024 15:03:40 +0100 Subject: [PATCH 06/25] realtek: fix Netgear GS110TPP OEM install MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Recent OEM firmware versions test the version number embedded in the uimage "name" header field. The exact restricton is unknown, but "7.0.8.4" seems to be the lowest number accepted on a GS110TPPv1 which already has that version or higher. A "9.9.9.9" version is accepted as valid by the GS110TPPv1 OEM firmware, and considered both unique enough to identify an OpenWrt image and moderately future proof against OEM version bumps. This change is also boot tested on a GS108Tv3 with "BOOT Loader Version 1.0.0.2 (2018-08-31 17:05:26 UTC)" to verify that it doesn't break boot on older hardware. Link: https://forum.openwrt.org/t/72510/58 Signed-off-by: Bjørn Mork --- target/linux/realtek/image/rtl838x.mk | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk index 60249ff2fdb422..19a40f1f61ba38 100644 --- a/target/linux/realtek/image/rtl838x.mk +++ b/target/linux/realtek/image/rtl838x.mk @@ -168,6 +168,7 @@ define Device/netgear_nge SOC := rtl8380 IMAGE_SIZE := 14848k UIMAGE_MAGIC := 0x4e474520 + UIMAGE_NAME := 9.9.9.9 DEVICE_VENDOR := NETGEAR endef From 6b904fa95b50c1259954b2bff31fafe83290f182 Mon Sep 17 00:00:00 2001 From: Seo Suchan Date: Sun, 18 Feb 2024 08:58:54 +0900 Subject: [PATCH 07/25] ca-certificates: update to version 20240203 Update Mozilla certificate authority bundle to version 2.64 Signed-off-by: Seo Suchan --- package/system/ca-certificates/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/package/system/ca-certificates/Makefile b/package/system/ca-certificates/Makefile index ec588cc65b6c6b..06418cebfa6d27 100644 --- a/package/system/ca-certificates/Makefile +++ b/package/system/ca-certificates/Makefile @@ -7,13 +7,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ca-certificates -PKG_VERSION:=20230311 +PKG_VERSION:=20240203 PKG_RELEASE:=1 PKG_MAINTAINER:= PKG_SOURCE:=$(PKG_NAME)_$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@DEBIAN/pool/main/c/ca-certificates -PKG_HASH:=83de934afa186e279d1ed08ea0d73f5cf43a6fbfb5f00874b6db3711c64576f3 +PKG_HASH:=3286d3fc42c4d11b7086711a85f865b44065ce05cf1fb5376b2abed07622a9c6 PKG_INSTALL:=1 include $(INCLUDE_DIR)/package.mk From 75f713fcc26a5a82312d57636667130bc93ad3ff Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Sat, 17 Feb 2024 17:55:43 +0100 Subject: [PATCH 08/25] mvebu: switch to kernel 6.1 After a few months of testing it's time to move to 6.1 by default. Signed-off-by: Stefan Kalscheuer --- target/linux/mvebu/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/mvebu/Makefile b/target/linux/mvebu/Makefile index 9f5d374abd9702..316bf1dfa001c1 100644 --- a/target/linux/mvebu/Makefile +++ b/target/linux/mvebu/Makefile @@ -9,8 +9,7 @@ BOARDNAME:=Marvell EBU Armada FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part legacy-sdcard targz SUBTARGETS:=cortexa9 cortexa53 cortexa72 -KERNEL_PATCHVER:=5.15 -KERNEL_TESTING_PATCHVER:=6.1 +KERNEL_PATCHVER:=6.1 include $(INCLUDE_DIR)/target.mk From df95595b452670a7350e424fc521822a37e4cfb4 Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Sat, 17 Feb 2024 17:59:08 +0100 Subject: [PATCH 09/25] mvebu: drop kernel 5.15 config and patches With default now being at 6.1 we can remove all 5.15 components. Signed-off-by: Stefan Kalscheuer --- target/linux/mvebu/config-5.15 | 435 ------- target/linux/mvebu/cortexa53/config-5.15 | 83 -- target/linux/mvebu/cortexa72/config-5.15 | 98 -- target/linux/mvebu/cortexa9/config-5.15 | 7 - ...mnia-configure-LED-0-pin-function-to.patch | 38 - .../100-aardvark-workaround-PCIe.patch | 81 -- ...ris-omnia-enable-LED-controller-node.patch | 48 - ...set-linkstation-poweroff-add-ls220de.patch | 15 - ...Mangle-bootloader-s-kernel-arguments.patch | 279 ----- ...-mvebu-armada-38x-enable-libata-leds.patch | 10 - .../patches-5.15/302-add_powertables.patch | 770 ------------ .../patches-5.15/304-revert_i2c_delay.patch | 15 - .../305-armada-385-rd-mtd-partitions.patch | 19 - .../306-ARM-mvebu-385-ap-Add-partitions.patch | 35 - ...-armada-xp-linksys-mamba-broken-idle.patch | 10 - .../308-armada-xp-linksys-mamba-wan.patch | 11 - .../patches-5.15/309-linksys-status-led.patch | 50 - .../310-linksys-use-eth0-as-cpu-port.patch | 25 - .../311-adjust-compatible-for-linksys.patch | 68 -- ...da388-clearfog-emmc-on-clearfog-base.patch | 87 -- .../313-helios4-dts-status-led-alias.patch | 28 - ...vell-enable-heartbeat-LED-by-default.patch | 22 - ...rmada-xp-linksys-mamba-resize-kernel.patch | 37 - ...316-armada-370-dts-fix-crypto-engine.patch | 29 - ...armada-370-synology-ds213j-mtd-parts.patch | 134 --- .../patches-5.15/400-find_active_root.patch | 60 - .../700-mvneta-tx-queue-workaround.patch | 38 - ...ethernet-marvell-mvnetaMQPrioOffload.patch | 66 -- ...xt-ethernet-marvell-mvnetaMQPrioFlag.patch | 30 - ...t-ethernet-marvell-mvnetaMQPrioQueue.patch | 97 -- ...hernet-marvell-mvnetaMQPrioTCOffload.patch | 182 --- ...mvebu-a3700-comphy-Reset-COMPHY-regi.patch | 50 - ...dicate-failure-to-enter-deeper-sleep.patch | 40 - ...-pci-mvebu-time-out-reset-on-link-up.patch | 60 - ...IEI-vendor-prefix-and-IEI-WT61P803-P.patch | 218 ---- ...a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch | 1034 ----------------- ...d-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch | 501 -------- ...d-the-IEI-WT61P803-PUZZLE-LED-driver.patch | 207 ---- ...I-Add-iei-wt61p803-puzzle-driver-sys.patch | 82 -- ...mon-Add-iei-wt61p803-puzzle-hwmon-dr.patch | 74 -- ...an-entry-for-the-IEI-WT61P803-PUZZLE.patch | 41 - ...rs-leds-wt61p803-puzzle-improvements.patch | 271 ----- ...ivers-leds-wt61p803-puzzle-mcu-retry.patch | 63 - 43 files changed, 5548 deletions(-) delete mode 100644 target/linux/mvebu/config-5.15 delete mode 100644 target/linux/mvebu/cortexa53/config-5.15 delete mode 100644 target/linux/mvebu/cortexa72/config-5.15 delete mode 100644 target/linux/mvebu/cortexa9/config-5.15 delete mode 100644 target/linux/mvebu/patches-5.15/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch delete mode 100644 target/linux/mvebu/patches-5.15/100-aardvark-workaround-PCIe.patch delete mode 100644 target/linux/mvebu/patches-5.15/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch delete mode 100644 target/linux/mvebu/patches-5.15/105-power-reset-linkstation-poweroff-add-ls220de.patch delete mode 100644 target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch delete mode 100644 target/linux/mvebu/patches-5.15/301-mvebu-armada-38x-enable-libata-leds.patch delete mode 100644 target/linux/mvebu/patches-5.15/302-add_powertables.patch delete mode 100644 target/linux/mvebu/patches-5.15/304-revert_i2c_delay.patch delete mode 100644 target/linux/mvebu/patches-5.15/305-armada-385-rd-mtd-partitions.patch delete mode 100644 target/linux/mvebu/patches-5.15/306-ARM-mvebu-385-ap-Add-partitions.patch delete mode 100644 target/linux/mvebu/patches-5.15/307-armada-xp-linksys-mamba-broken-idle.patch delete mode 100644 target/linux/mvebu/patches-5.15/308-armada-xp-linksys-mamba-wan.patch delete mode 100644 target/linux/mvebu/patches-5.15/309-linksys-status-led.patch delete mode 100644 target/linux/mvebu/patches-5.15/310-linksys-use-eth0-as-cpu-port.patch delete mode 100644 target/linux/mvebu/patches-5.15/311-adjust-compatible-for-linksys.patch delete mode 100644 target/linux/mvebu/patches-5.15/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch delete mode 100644 target/linux/mvebu/patches-5.15/313-helios4-dts-status-led-alias.patch delete mode 100644 target/linux/mvebu/patches-5.15/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch delete mode 100644 target/linux/mvebu/patches-5.15/315-armada-xp-linksys-mamba-resize-kernel.patch delete mode 100644 target/linux/mvebu/patches-5.15/316-armada-370-dts-fix-crypto-engine.patch delete mode 100644 target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch delete mode 100644 target/linux/mvebu/patches-5.15/400-find_active_root.patch delete mode 100644 target/linux/mvebu/patches-5.15/700-mvneta-tx-queue-workaround.patch delete mode 100644 target/linux/mvebu/patches-5.15/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch delete mode 100644 target/linux/mvebu/patches-5.15/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch delete mode 100644 target/linux/mvebu/patches-5.15/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch delete mode 100644 target/linux/mvebu/patches-5.15/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch delete mode 100644 target/linux/mvebu/patches-5.15/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch delete mode 100644 target/linux/mvebu/patches-5.15/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch delete mode 100644 target/linux/mvebu/patches-5.15/801-pci-mvebu-time-out-reset-on-link-up.patch delete mode 100644 target/linux/mvebu/patches-5.15/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch delete mode 100644 target/linux/mvebu/patches-5.15/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch delete mode 100644 target/linux/mvebu/patches-5.15/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch delete mode 100644 target/linux/mvebu/patches-5.15/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch delete mode 100644 target/linux/mvebu/patches-5.15/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch delete mode 100644 target/linux/mvebu/patches-5.15/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch delete mode 100644 target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch delete mode 100644 target/linux/mvebu/patches-5.15/910-drivers-leds-wt61p803-puzzle-improvements.patch delete mode 100644 target/linux/mvebu/patches-5.15/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch diff --git a/target/linux/mvebu/config-5.15 b/target/linux/mvebu/config-5.15 deleted file mode 100644 index 0811ee6d4ce082..00000000000000 --- a/target/linux/mvebu/config-5.15 +++ /dev/null @@ -1,435 +0,0 @@ -CONFIG_AHCI_MVEBU=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MVEBU=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARMADA_370_CLK=y -CONFIG_ARMADA_370_XP_IRQ=y -CONFIG_ARMADA_370_XP_TIMER=y -# CONFIG_ARMADA_37XX_WATCHDOG is not set -CONFIG_ARMADA_38X_CLK=y -CONFIG_ARMADA_THERMAL=y -CONFIG_ARMADA_XP_CLK=y -CONFIG_ARM_APPENDED_DTB=y -# CONFIG_ARM_ARMADA_37XX_CPUFREQ is not set -# CONFIG_ARM_ARMADA_8K_CPUFREQ is not set -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GLOBAL_TIMER=y -CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1 -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_MVEBU_V7_CPUIDLE=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_ATA_LEDS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NVME=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BOUNCE=y -# CONFIG_CACHE_FEROCEON_L2 is not set -CONFIG_CACHE_L2X0=y -CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PJ4B=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_MARVELL=y -CONFIG_CRYPTO_DEV_MARVELL_CESA=y -CONFIG_CRYPTO_ESSIV=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256_ARM=y -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_ALIGN_RODATA=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_MVEBU_UART0=y -# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set -# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set -CONFIG_DEBUG_UART_8250=y -CONFIG_DEBUG_UART_8250_SHIFT=2 -CONFIG_DEBUG_UART_PHYS=0xd0012000 -CONFIG_DEBUG_UART_VIRT=0xfec12000 -CONFIG_DEBUG_UNCOMPRESS=y -CONFIG_DEBUG_USER=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_REMAP=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXT4_FS=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_VDSO_32=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_MVEBU=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_SMP=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HWBM=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MV64XXX=y -# CONFIG_I2C_PXA is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_IWMMXT is not set -CONFIG_JBD2=y -CONFIG_KMAP_LOCAL=y -CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PCA963X=y -CONFIG_LEDS_TLC591XX=y -CONFIG_LEDS_TRIGGER_DISK=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MACH_ARMADA_370=y -# CONFIG_MACH_ARMADA_375 is not set -CONFIG_MACH_ARMADA_38X=y -# CONFIG_MACH_ARMADA_39X is not set -CONFIG_MACH_ARMADA_XP=y -# CONFIG_MACH_DOVE is not set -CONFIG_MACH_MVEBU_ANY=y -CONFIG_MACH_MVEBU_V7=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MANGLE_BOOTARGS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MDIO_I2C=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_MVSDIO=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_PXAV3=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_NAND_MARVELL=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_MVEBU_CLK_COMMON=y -CONFIG_MVEBU_CLK_COREDIV=y -CONFIG_MVEBU_CLK_CPU=y -CONFIG_MVEBU_DEVBUS=y -CONFIG_MVEBU_MBUS=y -CONFIG_MVMDIO=y -CONFIG_MVNETA=y -CONFIG_MVNETA_BM=y -CONFIG_MVNETA_BM_ENABLE=y -# CONFIG_MVPP2 is not set -CONFIG_MV_XOR=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_DSA_COMMON=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_NVME_CORE=y -# CONFIG_NVME_HWMON is not set -# CONFIG_NVME_MULTIPATH is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_ORION_WATCHDOG=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PAGE_POOL=y -CONFIG_PCI=y -CONFIG_PCI_BRIDGE_EMUL=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_MVEBU=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -# CONFIG_PHY_MVEBU_A3700_COMPHY is not set -# CONFIG_PHY_MVEBU_A3700_UTMI is not set -# CONFIG_PHY_MVEBU_A38X_COMPHY is not set -# CONFIG_PHY_MVEBU_CP110_COMPHY is not set -# CONFIG_PHY_MVEBU_CP110_UTMI is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_ARMADA_370=y -CONFIG_PINCTRL_ARMADA_38X=y -CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_MVEBU=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PJ4B_ERRATA_4742=y -CONFIG_PL310_ERRATA_753970=y -CONFIG_PLAT_ORION=y -CONFIG_PM_OPP=y -CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_GPIO=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_ARMADA38X=y -# CONFIG_RTC_DRV_MV is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_SATA_HOST=y -CONFIG_SATA_MV=y -CONFIG_SATA_PMP=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -CONFIG_SENSORS_PWM_FAN=y -CONFIG_SENSORS_TMP421=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_MVEBU_CONSOLE=y -CONFIG_SERIAL_MVEBU_UART=y -CONFIG_SFP=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BUS=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -# CONFIG_SPI_ARMADA_3700 is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_ORION=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_ORION=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_LEDS_TRIGGER_USBPORT=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MVEBU=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/mvebu/cortexa53/config-5.15 b/target/linux/mvebu/cortexa53/config-5.15 deleted file mode 100644 index 27d410f68b915f..00000000000000 --- a/target/linux/mvebu/cortexa53/config-5.15 +++ /dev/null @@ -1,83 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARMADA_37XX_CLK=y -CONFIG_ARMADA_37XX_RWTM_MBOX=y -CONFIG_ARMADA_37XX_WATCHDOG=y -CONFIG_ARMADA_AP806_SYSCON=y -CONFIG_ARMADA_AP_CP_HELPER=y -CONFIG_ARMADA_CP110_SYSCON=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -CONFIG_ARM_ARMADA_37XX_CPUFREQ=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_MHU_V2 is not set -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_ARM_PSCI_FW=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_PINCONF=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MFD_SYSCON=y -CONFIG_MMC_SDHCI_XENON=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MVEBU_GICP=y -CONFIG_MVEBU_ICU=y -CONFIG_MVEBU_ODMI=y -CONFIG_MVEBU_PIC=y -CONFIG_MVEBU_SEI=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI_AARDVARK=y -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_MVEBU_A3700_COMPHY=y -CONFIG_PHY_MVEBU_A3700_UTMI=y -CONFIG_PINCTRL_ARMADA_37XX=y -CONFIG_PINCTRL_ARMADA_AP806=y -CONFIG_PINCTRL_ARMADA_CP110=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_REGULATOR_GPIO=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPI_ARMADA_3700=y -CONFIG_SWIOTLB=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TURRIS_MOX_RWTM=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa72/config-5.15 b/target/linux/mvebu/cortexa72/config-5.15 deleted file mode 100644 index 978208f1cb5a2a..00000000000000 --- a/target/linux/mvebu/cortexa72/config-5.15 +++ /dev/null @@ -1,98 +0,0 @@ -CONFIG_64BIT=y -CONFIG_AQUANTIA_PHY=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_STACKWALK=y -CONFIG_ARCH_WANTS_NO_INSTR=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_1742098=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_TAGGED_ADDR_ABI is not set -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARMADA_37XX_CLK=y -CONFIG_ARMADA_AP806_SYSCON=y -CONFIG_ARMADA_AP_CPU_CLK=y -CONFIG_ARMADA_AP_CP_HELPER=y -CONFIG_ARMADA_CP110_SYSCON=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -CONFIG_ARM_ARMADA_8K_CPUFREQ=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -# CONFIG_ARM_PL172_MPMC is not set -CONFIG_ARM_PSCI_FW=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_PINCONF=y -CONFIG_HW_RANDOM_OMAP=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_LEDS_IEI_WT61P803_PUZZLE=y -CONFIG_LEDS_IS31FL319X=y -CONFIG_MARVELL_10G_PHY=y -CONFIG_MFD_CORE=y -CONFIG_MFD_IEI_WT61P803_PUZZLE=y -CONFIG_MFD_SYSCON=y -CONFIG_MMC_SDHCI_XENON=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MVEBU_GICP=y -CONFIG_MVEBU_ICU=y -CONFIG_MVEBU_ODMI=y -CONFIG_MVEBU_PIC=y -CONFIG_MVEBU_SEI=y -CONFIG_MVPP2=y -CONFIG_MV_XOR_V2=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_PARTITION_PERCPU=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_ARMADA_8K=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -# CONFIG_PCI_AARDVARK is not set -CONFIG_PGTABLE_LEVELS=3 -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_MVEBU_CP110_COMPHY=y -CONFIG_PHY_MVEBU_CP110_UTMI=y -CONFIG_PINCTRL_ARMADA_37XX=y -CONFIG_PINCTRL_ARMADA_AP806=y -CONFIG_PINCTRL_ARMADA_CP110=y -CONFIG_POWER_SUPPLY=y -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RAS=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_REGULATOR_GPIO=y -# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set -CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON=y -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SWIOTLB=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa9/config-5.15 b/target/linux/mvebu/cortexa9/config-5.15 deleted file mode 100644 index 266596d6384e96..00000000000000 --- a/target/linux/mvebu/cortexa9/config-5.15 +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_LED_TRIGGER_PHY=y -CONFIG_MTD_SPLIT_SEIL_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_VIRT_CONCAT=y -CONFIG_PHY_MVEBU_A38X_COMPHY=y -CONFIG_POWER_RESET_QNAP=y -CONFIG_RTC_DRV_MV=y diff --git a/target/linux/mvebu/patches-5.15/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch b/target/linux/mvebu/patches-5.15/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch deleted file mode 100644 index 67beb0654162a0..00000000000000 --- a/target/linux/mvebu/patches-5.15/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 81c0004a6433ff90fa6129418802c3c367e453c2 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Mon, 4 Jul 2022 13:36:21 +0200 -Subject: [PATCH 1/5] ARM: dts: turris-omnia: configure LED[0] pin function to - link/activity -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The marvell PHY driver changes the LED[0] pin function to "On - 1000 -Mbps Link, Off - Else". - -Turris Omnia expects that the function is "On - Link, Blink - Activity, -Off - No link". - -Use the `marvell,reg-init` DT property to change the function. - -In the future, once netdev trigger will support HW offloading, we will -be able to have this configured via the combination of PHY driver and -leds-turris-omnia driver. - -Signed-off-by: Marek Behún ---- - arch/arm/boot/dts/armada-385-turris-omnia.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/armada-385-turris-omnia.dts -+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts -@@ -396,7 +396,8 @@ - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; -- marvell,reg-init = <3 18 0 0x4985>; -+ marvell,reg-init = <3 18 0 0x4985>, -+ <3 16 0xfff0 0x0001>; - - /* irq is connected to &pcawan pin 7 */ - }; diff --git a/target/linux/mvebu/patches-5.15/100-aardvark-workaround-PCIe.patch b/target/linux/mvebu/patches-5.15/100-aardvark-workaround-PCIe.patch deleted file mode 100644 index 975eadb80e2746..00000000000000 --- a/target/linux/mvebu/patches-5.15/100-aardvark-workaround-PCIe.patch +++ /dev/null @@ -1,81 +0,0 @@ -Subject: [PATCH v2] PCI: aardvark: Implement workaround for PCIe Completion Timeout -Date: Tue, 2 Aug 2022 14:38:16 +0200 -Message-Id: <20220802123816.21817-1-pali@kernel.org> -X-Mailer: git-send-email 2.20.1 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit -Precedence: bulk -List-ID: -X-Mailing-List: linux-pci@vger.kernel.org - -Marvell Armada 3700 Functional Errata, Guidelines, and Restrictions -document describes in erratum 3.12 PCIe Completion Timeout (Ref #: 251), -that PCIe IP does not support a strong-ordered model for inbound posted vs. -outbound completion. - -As a workaround for this erratum, DIS_ORD_CHK flag in Debug Mux Control -register must be set. It disables the ordering check in the core between -Completions and Posted requests received from the link. - -Marvell also suggests to do full memory barrier at the beginning of -aardvark summary interrupt handler before calling interrupt handlers of -endpoint drivers in order to minimize the risk for the race condition -documented in the Erratum between the DMA done status reading and the -completion of writing to the host memory. - -More details about this issue and suggested workarounds are in discussion: -https://lore.kernel.org/linux-pci/BN9PR18MB425154FE5019DCAF2028A1D5DB8D9@BN9PR18MB4251.namprd18.prod.outlook.com/t/#u - -It was reported that enabling this workaround fixes instability issues and -"Unhandled fault" errors when using 60 GHz WiFi 802.11ad card with Qualcomm -QCA6335 chip under significant load which were caused by interrupt status -stuck in the outbound CMPLT queue traced back to this erratum. - -This workaround fixes also kernel panic triggered after some minutes of -usage 5 GHz WiFi 802.11ax card with Mediatek MT7915 chip: - - Internal error: synchronous external abort: 96000210 [#1] SMP - Kernel panic - not syncing: Fatal exception in interrupt - -Signed-off-by: Thomas Petazzoni -Signed-off-by: Pali Rohár -Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") -Cc: stable@vger.kernel.org ---- - drivers/pci/controller/pci-aardvark.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -210,6 +210,8 @@ enum { - }; - - #define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) -+#define DEBUG_MUX_CTRL_REG (LMI_BASE_ADDR + 0x208) -+#define DIS_ORD_CHK BIT(30) - - /* PCIe core controller registers */ - #define CTRL_CORE_BASE_ADDR 0x18000 -@@ -558,6 +560,11 @@ static void advk_pcie_setup_hw(struct ad - PCIE_CORE_CTRL2_TD_ENABLE; - advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); - -+ /* Disable ordering checks, workaround for erratum 3.12 "PCIe completion timeout" */ -+ reg = advk_readl(pcie, DEBUG_MUX_CTRL_REG); -+ reg |= DIS_ORD_CHK; -+ advk_writel(pcie, reg, DEBUG_MUX_CTRL_REG); -+ - /* Set lane X1 */ - reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); - reg &= ~LANE_CNT_MSK; -@@ -1580,6 +1587,9 @@ static irqreturn_t advk_pcie_irq_handler - struct advk_pcie *pcie = arg; - u32 status; - -+ /* Full memory barrier (ARM dsb sy), workaround for erratum 3.12 "PCIe completion timeout" */ -+ mb(); -+ - status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); - if (!(status & PCIE_IRQ_CORE_INT)) - return IRQ_NONE; diff --git a/target/linux/mvebu/patches-5.15/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch b/target/linux/mvebu/patches-5.15/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch deleted file mode 100644 index ecfb43553f517c..00000000000000 --- a/target/linux/mvebu/patches-5.15/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch +++ /dev/null @@ -1,48 +0,0 @@ -From fed7cef5e4f2df8c6a79bebf5da1fdd3783ff6f3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Mon, 4 Jul 2022 13:36:22 +0200 -Subject: [PATCH] ARM: dts: turris-omnia: enable LED controller node -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The LED controller node is disabled because the leds-turris-omnia driver -does not support setting the LED blinking to be controlled by the MCU. - -The patches for that have now been sent [1], so let's enable the node. - -[1] https://lore.kernel.org/linux-leds/20220704105955.15474-1-kabel@kernel.org/T/ - -Signed-off-by: Marek Behún ---- - arch/arm/boot/dts/armada-385-turris-omnia.dts | 7 ++----- - 1 file changed, 2 insertions(+), 5 deletions(-) - ---- a/arch/arm/boot/dts/armada-385-turris-omnia.dts -+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts -@@ -194,15 +194,13 @@ - reg = <0x2b>; - #address-cells = <1>; - #size-cells = <0>; -+ status = "okay"; - - /* - * LEDs are controlled by MCU (STM32F0) at - * address 0x2b. - * -- * The driver does not support HW control mode -- * for the LEDs yet. Disable the LEDs for now. -- * -- * Also LED functions are not stable yet: -+ * LED functions are not stable yet: - * - there are 3 LEDs connected via MCU to PCIe - * ports. One of these ports supports mSATA. - * There is no mSATA nor PCIe function. -@@ -213,7 +211,6 @@ - * B. Again there is no such function defined. - * For now we use LED_FUNCTION_INDICATOR - */ -- status = "disabled"; - - multi-led@0 { - reg = <0x0>; diff --git a/target/linux/mvebu/patches-5.15/105-power-reset-linkstation-poweroff-add-ls220de.patch b/target/linux/mvebu/patches-5.15/105-power-reset-linkstation-poweroff-add-ls220de.patch deleted file mode 100644 index 32238612344b57..00000000000000 --- a/target/linux/mvebu/patches-5.15/105-power-reset-linkstation-poweroff-add-ls220de.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/drivers/power/reset/linkstation-poweroff.c -+++ b/drivers/power/reset/linkstation-poweroff.c -@@ -142,6 +142,12 @@ static void linkstation_poweroff(void) - } - - static const struct of_device_id ls_poweroff_of_match[] = { -+ { .compatible = "buffalo,ls220d", -+ .data = &linkstation_power_off_cfg, -+ }, -+ { .compatible = "buffalo,ls220de", -+ .data = &linkstation_power_off_cfg, -+ }, - { .compatible = "buffalo,ls421d", - .data = &linkstation_power_off_cfg, - }, diff --git a/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch deleted file mode 100644 index bedeea4784c4fe..00000000000000 --- a/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001 -From: Adrian Panella -Date: Thu, 9 Mar 2017 09:37:17 +0100 -Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments - -The command-line arguments provided by the boot loader will be -appended to a new device tree property: bootloader-args. -If there is a property "append-rootblock" in DT under /chosen -and a root= option in bootloaders command line it will be parsed -and added to DT bootargs with the form: XX. -Only command line ATAG will be processed, the rest of the ATAGs -sent by bootloader will be ignored. -This is usefull in dual boot systems, to get the current root partition -without afecting the rest of the system. - -Signed-off-by: Adrian Panella - -This patch has been modified to be mvebu specific. The original patch -did not pass the bootloader cmdline on if no append-rootblock stanza -was found, resulting in blank cmdline and failure to boot. - -Signed-off-by: Michael Gray ---- - arch/arm/Kconfig | 11 ++++ - arch/arm/boot/compressed/atags_to_fdt.c | 85 ++++++++++++++++++++++++- - init/main.c | 16 +++++ - 3 files changed, 111 insertions(+), 1 deletion(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1728,6 +1728,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN - The command-line arguments provided by the boot loader will be - appended to the the device tree bootargs property. - -+config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE -+ bool "Append rootblock parsing bootloader's kernel arguments" -+ help -+ The command-line arguments provided by the boot loader will be -+ appended to a new device tree property: bootloader-args. -+ If there is a property "append-rootblock" in DT under /chosen -+ and a root= option in bootloaders command line it will be parsed -+ and added to DT bootargs with the form: XX. -+ Only command line ATAG will be processed, the rest of the ATAGs -+ sent by bootloader will be ignored. -+ - endchoice - - config CMDLINE ---- a/arch/arm/boot/compressed/atags_to_fdt.c -+++ b/arch/arm/boot/compressed/atags_to_fdt.c -@@ -5,6 +5,8 @@ - - #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) - #define do_extend_cmdline 1 -+#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+#define do_extend_cmdline 1 - #else - #define do_extend_cmdline 0 - #endif -@@ -20,6 +22,7 @@ static int node_offset(void *fdt, const - return offset; - } - -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE - static int setprop(void *fdt, const char *node_path, const char *property, - void *val_array, int size) - { -@@ -28,6 +31,7 @@ static int setprop(void *fdt, const char - return offset; - return fdt_setprop(fdt, offset, property, val_array, size); - } -+#endif - - static int setprop_string(void *fdt, const char *node_path, - const char *property, const char *string) -@@ -38,6 +42,7 @@ static int setprop_string(void *fdt, con - return fdt_setprop_string(fdt, offset, property, string); - } - -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE - static int setprop_cell(void *fdt, const char *node_path, - const char *property, uint32_t val) - { -@@ -46,6 +51,7 @@ static int setprop_cell(void *fdt, const - return offset; - return fdt_setprop_cell(fdt, offset, property, val); - } -+#endif - - static const void *getprop(const void *fdt, const char *node_path, - const char *property, int *len) -@@ -58,6 +64,7 @@ static const void *getprop(const void *f - return fdt_getprop(fdt, offset, property, len); - } - -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE - static uint32_t get_cell_size(const void *fdt) - { - int len; -@@ -69,6 +76,74 @@ static uint32_t get_cell_size(const void - return cell_size; - } - -+#endif -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ -+static char *append_rootblock(char *dest, const char *str, int len, void *fdt) -+{ -+ const char *ptr, *end; -+ const char *root="root="; -+ int i, l; -+ const char *rootblock; -+ -+ //ARM doesn't have __HAVE_ARCH_STRSTR, so search manually -+ ptr = str - 1; -+ -+ do { -+ //first find an 'r' at the begining or after a space -+ do { -+ ptr++; -+ ptr = strchr(ptr, 'r'); -+ if (!ptr) -+ goto no_append; -+ -+ } while (ptr != str && *(ptr-1) != ' '); -+ -+ //then check for the rest -+ for(i = 1; i <= 4; i++) -+ if(*(ptr+i) != *(root+i)) break; -+ -+ } while (i != 5); -+ -+ end = strchr(ptr, ' '); -+ end = end ? (end - 1) : (strchr(ptr, 0) - 1); -+ -+ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX ) -+ for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++); -+ ptr = end + 1; -+ -+ /* if append-rootblock property is set use it to append to command line */ -+ rootblock = getprop(fdt, "/chosen", "append-rootblock", &l); -+ if (rootblock == NULL) -+ goto no_append; -+ -+ if (*dest != ' ') { -+ *dest = ' '; -+ dest++; -+ len++; -+ } -+ -+ if (len + l + i <= COMMAND_LINE_SIZE) { -+ memcpy(dest, rootblock, l); -+ dest += l - 1; -+ memcpy(dest, ptr, i); -+ dest += i; -+ } -+ -+ return dest; -+ -+no_append: -+ len = strlen(str); -+ if (len + 1 < COMMAND_LINE_SIZE) { -+ memcpy(dest, str, len); -+ dest += len; -+ } -+ -+ return dest; -+} -+#endif -+ - static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) - { - char cmdline[COMMAND_LINE_SIZE]; -@@ -88,18 +163,28 @@ static void merge_fdt_bootargs(void *fdt - - /* and append the ATAG_CMDLINE */ - if (fdt_cmdline) { -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ //save original bootloader args -+ //and append ubi.mtd with root partition number to current cmdline -+ setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline); -+ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt); -+ -+#else - len = strlen(fdt_cmdline); - if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { - *ptr++ = ' '; - memcpy(ptr, fdt_cmdline, len); - ptr += len; - } -+#endif - } - *ptr = '\0'; - - setprop_string(fdt, "/chosen", "bootargs", cmdline); - } - -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE - static void hex_str(char *out, uint32_t value) - { - uint32_t digit; -@@ -117,6 +202,7 @@ static void hex_str(char *out, uint32_t - } - *out = '\0'; - } -+#endif - - /* - * Convert and fold provided ATAGs into the provided FDT. -@@ -131,9 +217,11 @@ int atags_to_fdt(void *atag_list, void * - struct tag *atag = atag_list; - /* In the case of 64 bits memory size, need to reserve 2 cells for - * address and size for each bank */ -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE - __be32 mem_reg_property[2 * 2 * NR_BANKS]; -- int memcount = 0; -- int ret, memsize; -+ int memsize, memcount = 0; -+#endif -+ int ret; - - /* make sure we've got an aligned pointer */ - if ((u32)atag_list & 0x3) -@@ -168,7 +256,9 @@ int atags_to_fdt(void *atag_list, void * - else - setprop_string(fdt, "/chosen", "bootargs", - atag->u.cmdline.cmdline); -- } else if (atag->hdr.tag == ATAG_MEM) { -+ } -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE -+ else if (atag->hdr.tag == ATAG_MEM) { - if (memcount >= sizeof(mem_reg_property)/4) - continue; - if (!atag->u.mem.size) -@@ -212,6 +302,10 @@ int atags_to_fdt(void *atag_list, void * - setprop(fdt, "/memory", "reg", mem_reg_property, - 4 * memcount * memsize); - } -+#else -+ -+ } -+#endif - - return fdt_pack(fdt); - } ---- a/init/main.c -+++ b/init/main.c -@@ -112,6 +112,10 @@ - - #include - -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+#include -+#endif -+ - static int kernel_init(void *); - - extern void init_IRQ(void); -@@ -992,6 +996,18 @@ asmlinkage __visible void __init __no_sa - page_alloc_init(); - - pr_notice("Kernel command line: %s\n", saved_command_line); -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ //Show bootloader's original command line for reference -+ if(of_chosen) { -+ const char *prop = of_get_property(of_chosen, "bootloader-args", NULL); -+ if(prop) -+ pr_notice("Bootloader command line (ignored): %s\n", prop); -+ else -+ pr_notice("Bootloader command line not present\n"); -+ } -+#endif -+ - /* parameters may set static keys */ - jump_label_init(); - parse_early_param(); diff --git a/target/linux/mvebu/patches-5.15/301-mvebu-armada-38x-enable-libata-leds.patch b/target/linux/mvebu/patches-5.15/301-mvebu-armada-38x-enable-libata-leds.patch deleted file mode 100644 index 615caac24f4b19..00000000000000 --- a/target/linux/mvebu/patches-5.15/301-mvebu-armada-38x-enable-libata-leds.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/mach-mvebu/Kconfig -+++ b/arch/arm/mach-mvebu/Kconfig -@@ -67,6 +67,7 @@ config MACH_ARMADA_38X - select HAVE_ARM_TWD if SMP - select MACH_MVEBU_V7 - select PINCTRL_ARMADA_38X -+ select ARCH_WANT_LIBATA_LEDS - help - Say 'Y' here if you want your kernel to support boards based - on the Marvell Armada 380/385 SoC with device tree. diff --git a/target/linux/mvebu/patches-5.15/302-add_powertables.patch b/target/linux/mvebu/patches-5.15/302-add_powertables.patch deleted file mode 100644 index 93ad5de2cc40b1..00000000000000 --- a/target/linux/mvebu/patches-5.15/302-add_powertables.patch +++ /dev/null @@ -1,770 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -214,11 +214,19 @@ - &pcie1 { - /* Marvell 88W8864, 5GHz-only */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,2ghz = <0>; -+ }; - }; - - &pcie2 { - /* Marvell 88W8864, 2GHz-only */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,5ghz = <0>; -+ }; - }; - - &pinctrl { ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -142,3 +142,205 @@ - }; - }; - }; -+ -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>; -+ CA = -+ <36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ CN = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>; -+ ETSI = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>; -+ FCC = -+ <36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ }; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>; -+ CN = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -142,3 +142,205 @@ - }; - }; - }; -+ -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts -@@ -142,3 +142,205 @@ - }; - }; - }; -+ -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+}; ---- a/arch/arm/boot/dts/armada-385-linksys-rango.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts -@@ -157,6 +157,18 @@ - }; - }; - -+&pcie1 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ }; -+}; -+ -+&pcie2 { -+ mwlwifi { -+ marvell,chainmask = <4 4>; -+ }; -+}; -+ - &sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&sdhci_pins>; ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -225,12 +225,100 @@ - pcie@2,0 { - /* Port 0, Lane 1 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; -+ -+ ETSI = -+ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; - }; - - /* Second mini-PCIe port */ - pcie@3,0 { - /* Port 0, Lane 3 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; -+ -+ ETSI = -+ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; -+ }; -+ }; - }; - }; - diff --git a/target/linux/mvebu/patches-5.15/304-revert_i2c_delay.patch b/target/linux/mvebu/patches-5.15/304-revert_i2c_delay.patch deleted file mode 100644 index 930c0f94942b6b..00000000000000 --- a/target/linux/mvebu/patches-5.15/304-revert_i2c_delay.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp.dtsi -+++ b/arch/arm/boot/dts/armada-xp.dtsi -@@ -237,12 +237,10 @@ - }; - - &i2c0 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11000 0x100>; - }; - - &i2c1 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11100 0x100>; - }; - diff --git a/target/linux/mvebu/patches-5.15/305-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-5.15/305-armada-385-rd-mtd-partitions.patch deleted file mode 100644 index 31bd53b1f3be82..00000000000000 --- a/target/linux/mvebu/patches-5.15/305-armada-385-rd-mtd-partitions.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-rd.dts -+++ b/arch/arm/boot/dts/armada-388-rd.dts -@@ -103,6 +103,16 @@ - compatible = "st,m25p128", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0 0x400000>; -+ }; -+ -+ partition@1 { -+ label = "firmware"; -+ reg = <0x400000 0xc00000>; -+ }; - }; - }; - diff --git a/target/linux/mvebu/patches-5.15/306-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-5.15/306-ARM-mvebu-385-ap-Add-partitions.patch deleted file mode 100644 index 2057e31c7e9759..00000000000000 --- a/target/linux/mvebu/patches-5.15/306-ARM-mvebu-385-ap-Add-partitions.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Tue, 13 Jan 2015 11:14:09 +0100 -Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions - -Signed-off-by: Maxime Ripard ---- - arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/armada-385-db-ap.dts -+++ b/arch/arm/boot/dts/armada-385-db-ap.dts -@@ -218,19 +218,19 @@ - #size-cells = <1>; - - partition@0 { -- label = "U-Boot"; -+ label = "u-boot"; - reg = <0x00000000 0x00800000>; - read-only; - }; - - partition@800000 { -- label = "uImage"; -+ label = "kernel"; - reg = <0x00800000 0x00400000>; - read-only; - }; - - partition@c00000 { -- label = "Root"; -+ label = "ubi"; - reg = <0x00c00000 0x3f400000>; - }; - }; diff --git a/target/linux/mvebu/patches-5.15/307-armada-xp-linksys-mamba-broken-idle.patch b/target/linux/mvebu/patches-5.15/307-armada-xp-linksys-mamba-broken-idle.patch deleted file mode 100644 index 16112d53fc99c7..00000000000000 --- a/target/linux/mvebu/patches-5.15/307-armada-xp-linksys-mamba-broken-idle.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -485,3 +485,7 @@ - }; - }; - }; -+ -+&coherencyfab { -+ broken-idle; -+}; diff --git a/target/linux/mvebu/patches-5.15/308-armada-xp-linksys-mamba-wan.patch b/target/linux/mvebu/patches-5.15/308-armada-xp-linksys-mamba-wan.patch deleted file mode 100644 index 4315abc7d22ade..00000000000000 --- a/target/linux/mvebu/patches-5.15/308-armada-xp-linksys-mamba-wan.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -387,7 +387,7 @@ - - port@4 { - reg = <4>; -- label = "internet"; -+ label = "wan"; - }; - - port@5 { diff --git a/target/linux/mvebu/patches-5.15/309-linksys-status-led.patch b/target/linux/mvebu/patches-5.15/309-linksys-status-led.patch deleted file mode 100644 index e5e83572c9e242..00000000000000 --- a/target/linux/mvebu/patches-5.15/309-linksys-status-led.patch +++ /dev/null @@ -1,50 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -14,6 +14,13 @@ - compatible = "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - -+ aliases { -+ led-boot = &led_power; -+ led-failsafe = &led_power; -+ led-running = &led_power; -+ led-upgrade = &led_power; -+ }; -+ - chosen { - stdout-path = "serial0:115200n8"; - }; -@@ -71,7 +78,7 @@ - pinctrl-0 = <&gpio_leds_pins>; - pinctrl-names = "default"; - -- power { -+ led_power: power { - gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -26,6 +26,13 @@ - compatible = "linksys,mamba", "marvell,armadaxp-mv78230", - "marvell,armadaxp", "marvell,armada-370-xp"; - -+ aliases { -+ led-boot = &led_power; -+ led-failsafe = &led_power; -+ led-running = &led_power; -+ led-upgrade = &led_power; -+ }; -+ - chosen { - bootargs = "console=ttyS0,115200"; - stdout-path = &uart0; -@@ -197,7 +204,7 @@ - pinctrl-0 = <&power_led_pin>; - pinctrl-names = "default"; - -- power { -+ led_power: power { - label = "mamba:white:power"; - gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; - default-state = "on"; diff --git a/target/linux/mvebu/patches-5.15/310-linksys-use-eth0-as-cpu-port.patch b/target/linux/mvebu/patches-5.15/310-linksys-use-eth0-as-cpu-port.patch deleted file mode 100644 index 84d49a004b85b3..00000000000000 --- a/target/linux/mvebu/patches-5.15/310-linksys-use-eth0-as-cpu-port.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -116,7 +116,7 @@ - }; - - ð2 { -- status = "okay"; -+ status = "disabled"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <2>; -@@ -200,10 +200,10 @@ - label = "wan"; - }; - -- port@5 { -- reg = <5>; -+ port@6 { -+ reg = <6>; - label = "cpu"; -- ethernet = <ð2>; -+ ethernet = <ð0>; - - fixed-link { - speed = <1000>; diff --git a/target/linux/mvebu/patches-5.15/311-adjust-compatible-for-linksys.patch b/target/linux/mvebu/patches-5.15/311-adjust-compatible-for-linksys.patch deleted file mode 100644 index a5d3e6381064e5..00000000000000 --- a/target/linux/mvebu/patches-5.15/311-adjust-compatible-for-linksys.patch +++ /dev/null @@ -1,68 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys-rango.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts -@@ -12,8 +12,8 @@ - - / { - model = "Linksys WRT3200ACM"; -- compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", -- "marvell,armada380"; -+ compatible = "linksys,wrt3200acm", "linksys,rango", "linksys,armada385", -+ "marvell,armada385", "marvell,armada380"; - }; - - &expander0 { ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -22,9 +22,10 @@ - #include "armada-xp-mv78230.dtsi" - - / { -- model = "Linksys WRT1900AC"; -- compatible = "linksys,mamba", "marvell,armadaxp-mv78230", -- "marvell,armadaxp", "marvell,armada-370-xp"; -+ model = "Linksys WRT1900AC v1"; -+ compatible = "linksys,wrt1900ac-v1", "linksys,mamba", -+ "marvell,armadaxp-mv78230", "marvell,armadaxp", -+ "marvell,armada-370-xp"; - - aliases { - led-boot = &led_power; ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -9,8 +9,9 @@ - #include "armada-385-linksys.dtsi" - - / { -- model = "Linksys WRT1900ACv2"; -- compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385", -+ model = "Linksys WRT1900AC v2"; -+ compatible = "linksys,wrt1900ac-v2", "linksys,cobra", -+ "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - }; - ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -10,8 +10,8 @@ - - / { - model = "Linksys WRT1200AC"; -- compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385", -- "marvell,armada380"; -+ compatible = "linksys,wrt1200ac", "linksys,caiman", "linksys,armada385", -+ "marvell,armada385", "marvell,armada380"; - }; - - &expander0 { ---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts -@@ -10,7 +10,8 @@ - - / { - model = "Linksys WRT1900ACS"; -- compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", -+ compatible = "linksys,wrt1900acs", "linksys,shelby", -+ "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - }; - diff --git a/target/linux/mvebu/patches-5.15/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch b/target/linux/mvebu/patches-5.15/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch deleted file mode 100644 index dd2bef7f6321e5..00000000000000 --- a/target/linux/mvebu/patches-5.15/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 8137da20701c776ad3481115305a5e8e410871ba Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 29 Nov 2016 10:15:45 +0000 -Subject: ARM: dts: armada388-clearfog: emmc on clearfog base - -Signed-off-by: Russell King ---- - arch/arm/boot/dts/armada-388-clearfog-base.dts | 1 + - .../dts/armada-38x-solidrun-microsom-emmc.dtsi | 62 ++++++++++++++++++++++ - 2 files changed, 63 insertions(+) - create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi - ---- a/arch/arm/boot/dts/armada-388-clearfog-base.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts -@@ -7,6 +7,7 @@ - - /dts-v1/; - #include "armada-388-clearfog.dtsi" -+#include "armada-38x-solidrun-microsom-emmc.dtsi" - - / { - model = "SolidRun Clearfog Base A1"; ---- /dev/null -+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi -@@ -0,0 +1,62 @@ -+/* -+ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+/ { -+ soc { -+ internal-regs { -+ sdhci@d8000 { -+ bus-width = <4>; -+ no-1-8-v; -+ non-removable; -+ pinctrl-0 = <µsom_sdhci_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ wp-inverted; -+ }; -+ }; -+ }; -+}; diff --git a/target/linux/mvebu/patches-5.15/313-helios4-dts-status-led-alias.patch b/target/linux/mvebu/patches-5.15/313-helios4-dts-status-led-alias.patch deleted file mode 100644 index 607f436297126d..00000000000000 --- a/target/linux/mvebu/patches-5.15/313-helios4-dts-status-led-alias.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-helios4.dts -+++ b/arch/arm/boot/dts/armada-388-helios4.dts -@@ -15,6 +15,13 @@ - model = "Helios4"; - compatible = "kobol,helios4", "marvell,armada388", - "marvell,armada385", "marvell,armada380"; -+ -+ aliases { -+ led-boot = &led_status; -+ led-failsafe = &led_status; -+ led-running = &led_status; -+ led-upgrade = &led_status; -+ }; - - memory { - device_type = "memory"; -@@ -73,10 +80,9 @@ - pinctrl-names = "default"; - pinctrl-0 = <&helios_system_led_pins>; - -- status-led { -+ led_status: status-led { - label = "helios4:green:status"; - gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; -- linux,default-trigger = "heartbeat"; - default-state = "on"; - }; - diff --git a/target/linux/mvebu/patches-5.15/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch b/target/linux/mvebu/patches-5.15/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch deleted file mode 100644 index 7221e04de1ddc7..00000000000000 --- a/target/linux/mvebu/patches-5.15/314-arm64-dts-marvell-enable-heartbeat-LED-by-default.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Tomasz Maciej Nowak -Date: Fri, 7 Jul 2023 19:06:05 +0200 -Subject: [PATCH] arm64: dts: marvell: enable heartbeat LED by default - -Some boards could be placed in an enclosure, so enable LED18 by default, -since that'll be the only visible indicator that the board is operating. - -Signed-off-by: Tomasz Maciej Nowak ---- - arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts -+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts -@@ -25,6 +25,7 @@ - function = LED_FUNCTION_HEARTBEAT; - color = ; - linux,default-trigger = "heartbeat"; -+ default-state = "on"; - }; - }; - }; diff --git a/target/linux/mvebu/patches-5.15/315-armada-xp-linksys-mamba-resize-kernel.patch b/target/linux/mvebu/patches-5.15/315-armada-xp-linksys-mamba-resize-kernel.patch deleted file mode 100644 index f1fddceff4b093..00000000000000 --- a/target/linux/mvebu/patches-5.15/315-armada-xp-linksys-mamba-resize-kernel.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 258233f00bcd013050efee00c5d9128ef8cd62dd Mon Sep 17 00:00:00 2001 -From: Tad -Date: Fri, 5 Feb 2021 22:32:11 -0500 -Subject: [PATCH] ARM: dts: armada-xp-linksys-mamba: Increase kernel - partition to 4MB - -Signed-off-by: Tad Davanzo ---- - arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -456,9 +456,9 @@ - reg = <0xa00000 0x2800000>; /* 40MB */ - }; - -- partition@d00000 { -+ partition@e00000 { - label = "rootfs1"; -- reg = <0xd00000 0x2500000>; /* 37MB */ -+ reg = <0xe00000 0x2400000>; /* 36MB */ - }; - - /* kernel2 overlaps with rootfs2 by design */ -@@ -467,9 +467,9 @@ - reg = <0x3200000 0x2800000>; /* 40MB */ - }; - -- partition@3500000 { -+ partition@3600000 { - label = "rootfs2"; -- reg = <0x3500000 0x2500000>; /* 37MB */ -+ reg = <0x3600000 0x2400000>; /* 36MB */ - }; - - /* diff --git a/target/linux/mvebu/patches-5.15/316-armada-370-dts-fix-crypto-engine.patch b/target/linux/mvebu/patches-5.15/316-armada-370-dts-fix-crypto-engine.patch deleted file mode 100644 index 19378870ef7400..00000000000000 --- a/target/linux/mvebu/patches-5.15/316-armada-370-dts-fix-crypto-engine.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/arch/arm/boot/dts/armada-370.dtsi -+++ b/arch/arm/boot/dts/armada-370.dtsi -@@ -234,7 +234,7 @@ - clocks = <&gateclk 23>; - clock-names = "cesa0"; - marvell,crypto-srams = <&crypto_sram>; -- marvell,crypto-sram-size = <0x7e0>; -+ marvell,crypto-sram-size = <0x800>; - }; - }; - -@@ -255,12 +255,17 @@ - * cpuidle workaround. - */ - idle-sram@0 { -+ status = "disabled"; - reg = <0x0 0x20>; - }; - }; - }; - }; - -+&coherencyfab { -+ broken-idle; -+}; -+ - /* - * Default UART pinctrl setting without RTS/CTS, can be overwritten on - * board level if a different configuration is used. diff --git a/target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch b/target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch deleted file mode 100644 index 280fc5957e49ce..00000000000000 --- a/target/linux/mvebu/patches-5.15/320-arm-dts-armada-370-synology-ds213j-mtd-parts.patch +++ /dev/null @@ -1,134 +0,0 @@ ---- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts -+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts -@@ -31,6 +31,7 @@ - - chosen { - stdout-path = "serial0:115200n8"; -+ append-rootblock = "nullparameter="; /* override the bootloader args */ - }; - - memory@0 { -@@ -94,6 +95,8 @@ - status = "okay"; - phy = <&phy1>; - phy-mode = "sgmii"; -+ nvmem-cells = <&macaddr_vendor_0>; -+ nvmem-cell-names = "mac-address"; - }; - - sata@a0000 { -@@ -175,6 +178,24 @@ - gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>; - }; - }; -+ -+ virtual_flash { -+ compatible = "mtd-concat"; -+ -+ devices = <&mtd_kernel &mtd_gap &mtd_gap2>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ compatible = "openwrt,uimage", "denx,uimage"; -+ label = "firmware"; -+ reg = <0x0 0x0>; -+ }; -+ }; -+ }; - }; - - &mdio { -@@ -265,48 +286,52 @@ - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <20000000>; - -- /* -- * Warning! -- * -- * Synology u-boot uses its compiled-in environment -- * and it seems Synology did not care to change u-boot -- * default configuration in order to allow saving a -- * modified environment at a sensible location. So, -- * if you do a 'saveenv' under u-boot, your modified -- * environment will be saved at 1MB after the start -- * of the flash, i.e. in the middle of the uImage. -- * For that reason, it is strongly advised not to -- * change the default environment, unless you know -- * what you are doing. -- */ -- partition@0 { /* u-boot */ -- label = "RedBoot"; -- reg = <0x00000000 0x000c0000>; /* 768KB */ -- }; -+ partitions { -+ compatible = "fixed-partitions"; - -- partition@c0000 { /* uImage */ -- label = "zImage"; -- reg = <0x000c0000 0x002d0000>; /* 2880KB */ -- }; -+ partition@0 { /* u-boot */ -+ label = "u-boot"; -+ reg = <0x00000000 0x000c0000>; /* 768KB */ -+ read-only; -+ }; - -- partition@390000 { /* uInitramfs */ -- label = "rd.gz"; -- reg = <0x00390000 0x00440000>; /* 4250KB */ -- }; -+ mtd_gap: partition@c0000 { /* gap */ -+ label = "gap"; -+ reg = <0x000c0000 0x00040000>; /* 256KB */ -+ }; - -- partition@7d0000 { /* MAC address and serial number */ -- label = "vendor"; -- reg = <0x007d0000 0x00010000>; /* 64KB */ -- }; -+ partition@100000 { /* u-boot-env */ -+ label = "u-boot-env"; -+ reg = <0x00100000 0x00010000>; /* 64KB */ -+ }; - -- partition@7e0000 { -- label = "RedBoot config"; -- reg = <0x007e0000 0x00010000>; /* 64KB */ -- }; -+ mtd_kernel: partition@110000 { -+ label = "kernel"; -+ reg = <0x00110000 0x006c0000>; /* 6912KB */ -+ }; - -- partition@7f0000 { -- label = "FIS directory"; -- reg = <0x007f0000 0x00010000>; /* 64KB */ -+ partition@7d0000 { /* MAC address and serial number */ -+ reg = <0x007d0000 0x00010000>; /* 64KB */ -+ label = "vendor"; -+ read-only; -+ -+ compatible = "nvmem-cells"; -+ -+ nvmem-layout { -+ compatible = "fixed-layout"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ macaddr_vendor_0: macaddr@0 { -+ reg = <0x0 0x6>; -+ }; -+ }; -+ }; -+ -+ mtd_gap2: partition@7e0000 { -+ label = "gap2"; -+ reg = <0x007e0000 0x00020000>; /* 128KB */ -+ }; - }; - }; - }; diff --git a/target/linux/mvebu/patches-5.15/400-find_active_root.patch b/target/linux/mvebu/patches-5.15/400-find_active_root.patch deleted file mode 100644 index 5582d20c6828d2..00000000000000 --- a/target/linux/mvebu/patches-5.15/400-find_active_root.patch +++ /dev/null @@ -1,60 +0,0 @@ -The WRT1900AC among other Linksys routers uses a dual-firmware layout. -Dynamically rename the active partition to "ubi". - -Signed-off-by: Imre Kaloz - ---- a/drivers/mtd/parsers/ofpart_core.c -+++ b/drivers/mtd/parsers/ofpart_core.c -@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d - return of_get_property(pp, "compatible", NULL); - } - -+static int mangled_rootblock; -+ - static int parse_fixed_partitions(struct mtd_info *master, - const struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -@@ -48,6 +50,7 @@ static int parse_fixed_partitions(struct - struct device_node *mtd_node; - struct device_node *ofpart_node; - const char *partname; -+ const char *owrtpart = "ubi"; - struct device_node *pp; - int nr_parts, i, ret = 0; - bool dedicated = true; -@@ -133,9 +136,13 @@ static int parse_fixed_partitions(struct - parts[i].size = of_read_number(reg + a_cells, s_cells); - parts[i].of_node = pp; - -- partname = of_get_property(pp, "label", &len); -- if (!partname) -- partname = of_get_property(pp, "name", &len); -+ if (mangled_rootblock && (i == mangled_rootblock)) { -+ partname = owrtpart; -+ } else { -+ partname = of_get_property(pp, "label", &len); -+ if (!partname) -+ partname = of_get_property(pp, "name", &len); -+ } - parts[i].name = partname; - - if (of_get_property(pp, "read-only", &len)) -@@ -252,6 +259,18 @@ static int __init ofpart_parser_init(voi - return 0; - } - -+static int __init active_root(char *str) -+{ -+ get_option(&str, &mangled_rootblock); -+ -+ if (!mangled_rootblock) -+ return 1; -+ -+ return 1; -+} -+ -+__setup("mangled_rootblock=", active_root); -+ - static void __exit ofpart_parser_exit(void) - { - deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/mvebu/patches-5.15/700-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-5.15/700-mvneta-tx-queue-workaround.patch deleted file mode 100644 index 32e8ef4b7d8727..00000000000000 --- a/target/linux/mvebu/patches-5.15/700-mvneta-tx-queue-workaround.patch +++ /dev/null @@ -1,38 +0,0 @@ -The hardware queue scheduling is apparently configured with fixed -priorities, which creates a nasty fairness issue where traffic from one -CPU can starve traffic from all other CPUs. - -Work around this issue by forcing all tx packets to go through one CPU, -until this issue is fixed properly. - -Signed-off-by: Felix Fietkau ---- ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -5006,6 +5006,16 @@ static int mvneta_setup_tc(struct net_de - } - } - -+#ifndef CONFIG_ARM64 -+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb, -+ struct net_device *sb_dev) -+{ -+ /* XXX: hardware queue scheduling is broken, -+ * use only one queue until it is fixed */ -+ return 0; -+} -+#endif -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -5016,6 +5026,9 @@ static const struct net_device_ops mvnet - .ndo_fix_features = mvneta_fix_features, - .ndo_get_stats64 = mvneta_get_stats64, - .ndo_eth_ioctl = mvneta_ioctl, -+#ifndef CONFIG_ARM64 -+ .ndo_select_queue = mvneta_select_queue, -+#endif - .ndo_bpf = mvneta_xdp, - .ndo_xdp_xmit = mvneta_xdp_xmit, - .ndo_setup_tc = mvneta_setup_tc, diff --git a/target/linux/mvebu/patches-5.15/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch b/target/linux/mvebu/patches-5.15/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch deleted file mode 100644 index 019b9528c360e5..00000000000000 --- a/target/linux/mvebu/patches-5.15/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 75fa71e3acadbb4ab5eda18505277eb9a1f69b23 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:53 +0100 -Subject: net: mvneta: Use struct tc_mqprio_qopt_offload for MQPrio - configuration - -The struct tc_mqprio_qopt_offload is a container for struct tc_mqprio_qopt, -that allows passing extra parameters, such as traffic shaping. This commit -converts the current mqprio code to that new struct. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 17 ++++++++++------- - 1 file changed, 10 insertions(+), 7 deletions(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -38,6 +38,7 @@ - #include - #include - #include -+#include - #include - - /* Registers */ -@@ -4966,14 +4967,14 @@ static void mvneta_setup_rx_prio_map(str - } - - static int mvneta_setup_mqprio(struct net_device *dev, -- struct tc_mqprio_qopt *qopt) -+ struct tc_mqprio_qopt_offload *mqprio) - { - struct mvneta_port *pp = netdev_priv(dev); - u8 num_tc; - int i; - -- qopt->hw = TC_MQPRIO_HW_OFFLOAD_TCS; -- num_tc = qopt->num_tc; -+ mqprio->qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS; -+ num_tc = mqprio->qopt.num_tc; - - if (num_tc > rxq_number) - return -EINVAL; -@@ -4984,13 +4985,15 @@ static int mvneta_setup_mqprio(struct ne - return 0; - } - -- memcpy(pp->prio_tc_map, qopt->prio_tc_map, sizeof(pp->prio_tc_map)); -+ memcpy(pp->prio_tc_map, mqprio->qopt.prio_tc_map, -+ sizeof(pp->prio_tc_map)); - - mvneta_setup_rx_prio_map(pp); - -- netdev_set_num_tc(dev, qopt->num_tc); -- for (i = 0; i < qopt->num_tc; i++) -- netdev_set_tc_queue(dev, i, qopt->count[i], qopt->offset[i]); -+ netdev_set_num_tc(dev, mqprio->qopt.num_tc); -+ for (i = 0; i < mqprio->qopt.num_tc; i++) -+ netdev_set_tc_queue(dev, i, mqprio->qopt.count[i], -+ mqprio->qopt.offset[i]); - - return 0; - } diff --git a/target/linux/mvebu/patches-5.15/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch b/target/linux/mvebu/patches-5.15/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch deleted file mode 100644 index c878a288439216..00000000000000 --- a/target/linux/mvebu/patches-5.15/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch +++ /dev/null @@ -1,30 +0,0 @@ -From e7ca75fe6662f78bfeb0112671c812e4c7b8e214 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:54 +0100 -Subject: net: mvneta: Don't force-set the offloading flag - -The qopt->hw flag is set by the TC code according to the offloading mode -asked by user. Don't force-set it in the driver, but instead read it to -make sure we do what's asked. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -4973,7 +4973,9 @@ static int mvneta_setup_mqprio(struct ne - u8 num_tc; - int i; - -- mqprio->qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS; -+ if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) -+ return 0; -+ - num_tc = mqprio->qopt.num_tc; - - if (num_tc > rxq_number) diff --git a/target/linux/mvebu/patches-5.15/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch b/target/linux/mvebu/patches-5.15/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch deleted file mode 100644 index 546a8486ef0588..00000000000000 --- a/target/linux/mvebu/patches-5.15/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch +++ /dev/null @@ -1,97 +0,0 @@ -From e9f7099d0730341b24c057acbf545dd019581db6 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:55 +0100 -Subject: net: mvneta: Allow having more than one queue per TC - -The current mqprio implementation assumed that we are only using one -queue per TC. Use the offset and count parameters to allow using -multiple queues per TC. In that case, the controller will use a standard -round-robin algorithm to pick queues assigned to the same TC, with the -same priority. - -This only applies to VLAN priorities in ingress traffic, each TC -corresponding to a vlan priority. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 35 ++++++++++++++++++++--------------- - 1 file changed, 20 insertions(+), 15 deletions(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -498,7 +498,6 @@ struct mvneta_port { - u8 mcast_count[256]; - u16 tx_ring_size; - u16 rx_ring_size; -- u8 prio_tc_map[8]; - - phy_interface_t phy_interface; - struct device_node *dn; -@@ -4955,13 +4954,12 @@ static void mvneta_clear_rx_prio_map(str - mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, 0); - } - --static void mvneta_setup_rx_prio_map(struct mvneta_port *pp) -+static void mvneta_map_vlan_prio_to_rxq(struct mvneta_port *pp, u8 pri, u8 rxq) - { -- u32 val = 0; -- int i; -+ u32 val = mvreg_read(pp, MVNETA_VLAN_PRIO_TO_RXQ); - -- for (i = 0; i < rxq_number; i++) -- val |= MVNETA_VLAN_PRIO_RXQ_MAP(i, pp->prio_tc_map[i]); -+ val &= ~MVNETA_VLAN_PRIO_RXQ_MAP(pri, 0x7); -+ val |= MVNETA_VLAN_PRIO_RXQ_MAP(pri, rxq); - - mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val); - } -@@ -4970,8 +4968,8 @@ static int mvneta_setup_mqprio(struct ne - struct tc_mqprio_qopt_offload *mqprio) - { - struct mvneta_port *pp = netdev_priv(dev); -+ int rxq, tc; - u8 num_tc; -- int i; - - if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) - return 0; -@@ -4981,21 +4979,28 @@ static int mvneta_setup_mqprio(struct ne - if (num_tc > rxq_number) - return -EINVAL; - -+ mvneta_clear_rx_prio_map(pp); -+ - if (!num_tc) { -- mvneta_clear_rx_prio_map(pp); - netdev_reset_tc(dev); - return 0; - } - -- memcpy(pp->prio_tc_map, mqprio->qopt.prio_tc_map, -- sizeof(pp->prio_tc_map)); -+ netdev_set_num_tc(dev, mqprio->qopt.num_tc); - -- mvneta_setup_rx_prio_map(pp); -+ for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { -+ netdev_set_tc_queue(dev, tc, mqprio->qopt.count[tc], -+ mqprio->qopt.offset[tc]); -+ -+ for (rxq = mqprio->qopt.offset[tc]; -+ rxq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; -+ rxq++) { -+ if (rxq >= rxq_number) -+ return -EINVAL; - -- netdev_set_num_tc(dev, mqprio->qopt.num_tc); -- for (i = 0; i < mqprio->qopt.num_tc; i++) -- netdev_set_tc_queue(dev, i, mqprio->qopt.count[i], -- mqprio->qopt.offset[i]); -+ mvneta_map_vlan_prio_to_rxq(pp, tc, rxq); -+ } -+ } - - return 0; - } diff --git a/target/linux/mvebu/patches-5.15/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch b/target/linux/mvebu/patches-5.15/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch deleted file mode 100644 index 1d4a055a71938e..00000000000000 --- a/target/linux/mvebu/patches-5.15/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch +++ /dev/null @@ -1,182 +0,0 @@ -From 2551dc9e398c37a15e52122d385c29a8b06be45f Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:56 +0100 -Subject: net: mvneta: Add TC traffic shaping offload - -The mvneta controller is able to do some tocken-bucket per-queue traffic -shaping. This commit adds support for setting these using the TC mqprio -interface. - -The token-bucket parameters are customisable, but the current -implementation configures them to have a 10kbps resolution for the -rate limitation, since it allows to cover the whole range of max_rate -values from 10kbps to 5Gbps with 10kbps increments. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 120 +++++++++++++++++++++++++++++++++- - 1 file changed, 119 insertions(+), 1 deletion(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -248,12 +248,39 @@ - #define MVNETA_TXQ_SENT_DESC_MASK 0x3fff0000 - #define MVNETA_PORT_TX_RESET 0x3cf0 - #define MVNETA_PORT_TX_DMA_RESET BIT(0) -+#define MVNETA_TXQ_CMD1_REG 0x3e00 -+#define MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 BIT(3) -+#define MVNETA_TXQ_CMD1_BW_LIM_EN BIT(0) -+#define MVNETA_REFILL_NUM_CLK_REG 0x3e08 -+#define MVNETA_REFILL_MAX_NUM_CLK 0x0000ffff - #define MVNETA_TX_MTU 0x3e0c - #define MVNETA_TX_TOKEN_SIZE 0x3e14 - #define MVNETA_TX_TOKEN_SIZE_MAX 0xffffffff -+#define MVNETA_TXQ_BUCKET_REFILL_REG(q) (0x3e20 + ((q) << 2)) -+#define MVNETA_TXQ_BUCKET_REFILL_PERIOD_MASK 0x3ff00000 -+#define MVNETA_TXQ_BUCKET_REFILL_PERIOD_SHIFT 20 -+#define MVNETA_TXQ_BUCKET_REFILL_VALUE_MAX 0x0007ffff - #define MVNETA_TXQ_TOKEN_SIZE_REG(q) (0x3e40 + ((q) << 2)) - #define MVNETA_TXQ_TOKEN_SIZE_MAX 0x7fffffff - -+/* The values of the bucket refill base period and refill period are taken from -+ * the reference manual, and adds up to a base resolution of 10Kbps. This allows -+ * to cover all rate-limit values from 10Kbps up to 5Gbps -+ */ -+ -+/* Base period for the rate limit algorithm */ -+#define MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS 100 -+ -+/* Number of Base Period to wait between each bucket refill */ -+#define MVNETA_TXQ_BUCKET_REFILL_PERIOD 1000 -+ -+/* The base resolution for rate limiting, in bps. Any max_rate value should be -+ * a multiple of that value. -+ */ -+#define MVNETA_TXQ_RATE_LIMIT_RESOLUTION (NSEC_PER_SEC / \ -+ (MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS * \ -+ MVNETA_TXQ_BUCKET_REFILL_PERIOD)) -+ - #define MVNETA_LPI_CTRL_0 0x2cc0 - #define MVNETA_LPI_CTRL_1 0x2cc4 - #define MVNETA_LPI_REQUEST_ENABLE BIT(0) -@@ -4964,11 +4991,74 @@ static void mvneta_map_vlan_prio_to_rxq( - mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val); - } - -+static int mvneta_enable_per_queue_rate_limit(struct mvneta_port *pp) -+{ -+ unsigned long core_clk_rate; -+ u32 refill_cycles; -+ u32 val; -+ -+ core_clk_rate = clk_get_rate(pp->clk); -+ if (!core_clk_rate) -+ return -EINVAL; -+ -+ refill_cycles = MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS / -+ (NSEC_PER_SEC / core_clk_rate); -+ -+ if (refill_cycles > MVNETA_REFILL_MAX_NUM_CLK) -+ return -EINVAL; -+ -+ /* Enable bw limit algorithm version 3 */ -+ val = mvreg_read(pp, MVNETA_TXQ_CMD1_REG); -+ val &= ~(MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 | MVNETA_TXQ_CMD1_BW_LIM_EN); -+ mvreg_write(pp, MVNETA_TXQ_CMD1_REG, val); -+ -+ /* Set the base refill rate */ -+ mvreg_write(pp, MVNETA_REFILL_NUM_CLK_REG, refill_cycles); -+ -+ return 0; -+} -+ -+static void mvneta_disable_per_queue_rate_limit(struct mvneta_port *pp) -+{ -+ u32 val = mvreg_read(pp, MVNETA_TXQ_CMD1_REG); -+ -+ val |= (MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 | MVNETA_TXQ_CMD1_BW_LIM_EN); -+ mvreg_write(pp, MVNETA_TXQ_CMD1_REG, val); -+} -+ -+static int mvneta_setup_queue_rates(struct mvneta_port *pp, int queue, -+ u64 min_rate, u64 max_rate) -+{ -+ u32 refill_val, rem; -+ u32 val = 0; -+ -+ /* Convert to from Bps to bps */ -+ max_rate *= 8; -+ -+ if (min_rate) -+ return -EINVAL; -+ -+ refill_val = div_u64_rem(max_rate, MVNETA_TXQ_RATE_LIMIT_RESOLUTION, -+ &rem); -+ -+ if (rem || !refill_val || -+ refill_val > MVNETA_TXQ_BUCKET_REFILL_VALUE_MAX) -+ return -EINVAL; -+ -+ val = refill_val; -+ val |= (MVNETA_TXQ_BUCKET_REFILL_PERIOD << -+ MVNETA_TXQ_BUCKET_REFILL_PERIOD_SHIFT); -+ -+ mvreg_write(pp, MVNETA_TXQ_BUCKET_REFILL_REG(queue), val); -+ -+ return 0; -+} -+ - static int mvneta_setup_mqprio(struct net_device *dev, - struct tc_mqprio_qopt_offload *mqprio) - { - struct mvneta_port *pp = netdev_priv(dev); -- int rxq, tc; -+ int rxq, txq, tc, ret; - u8 num_tc; - - if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) -@@ -4982,6 +5072,7 @@ static int mvneta_setup_mqprio(struct ne - mvneta_clear_rx_prio_map(pp); - - if (!num_tc) { -+ mvneta_disable_per_queue_rate_limit(pp); - netdev_reset_tc(dev); - return 0; - } -@@ -5002,6 +5093,33 @@ static int mvneta_setup_mqprio(struct ne - } - } - -+ if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { -+ mvneta_disable_per_queue_rate_limit(pp); -+ return 0; -+ } -+ -+ if (mqprio->qopt.num_tc > txq_number) -+ return -EINVAL; -+ -+ ret = mvneta_enable_per_queue_rate_limit(pp); -+ if (ret) -+ return ret; -+ -+ for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { -+ for (txq = mqprio->qopt.offset[tc]; -+ txq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; -+ txq++) { -+ if (txq >= txq_number) -+ return -EINVAL; -+ -+ ret = mvneta_setup_queue_rates(pp, txq, -+ mqprio->min_rate[tc], -+ mqprio->max_rate[tc]); -+ if (ret) -+ return ret; -+ } -+ } -+ - return 0; - } - diff --git a/target/linux/mvebu/patches-5.15/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch b/target/linux/mvebu/patches-5.15/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch deleted file mode 100644 index a852dc1fc11f78..00000000000000 --- a/target/linux/mvebu/patches-5.15/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch +++ /dev/null @@ -1,50 +0,0 @@ -From b01d622d76134e9401970ffd3fbbb9a7051f976a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Pali=20Roh=C3=A1r?= -Date: Tue, 20 Sep 2022 14:11:54 +0200 -Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Reset COMPHY registers - before USB 3.0 power on -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Turris MOX board with older ARM Trusted Firmware version v1.5 is not able -to detect any USB 3.0 device connected to USB-A port on Mox-A module after -commit 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken -reset support"). On the other hand USB 2.0 devices connected to the same -USB-A port are working fine. - -It looks as if the older firmware configures COMPHY registers for USB 3.0 -somehow incompatibly for kernel driver. Experiments show that resetting -COMPHY registers via setting SFT_RST auto-clearing bit in COMPHY_SFT_RESET -register fixes this issue. - -Reset the COMPHY in mvebu_a3700_comphy_usb3_power_on() function as a first -step after selecting COMPHY lane and USB 3.0 function. With this change -Turris MOX board can successfully detect USB 3.0 devices again. - -Before the above mentioned commit this reset was implemented in PHY reset -method, so this is the reason why there was no issue with older firmware -version then. - -Fixes: 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset support") -Reported-by: Marek Behún -Signed-off-by: Pali Rohár -Tested-by: Shin'ichiro Kawasaki -Link: https://lore.kernel.org/r/20220920121154.30115-1-pali@kernel.org -Signed-off-by: Vinod Koul ---- - drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c -+++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c -@@ -826,6 +826,9 @@ mvebu_a3700_comphy_usb3_power_on(struct - if (ret) - return ret; - -+ /* COMPHY register reset (cleared automatically) */ -+ comphy_lane_reg_set(lane, COMPHY_SFT_RESET, SFT_RST, SFT_RST); -+ - /* - * 0. Set PHY OTG Control(0x5d034), bit 4, Power up OTG module The - * register belong to UTMI module, so it is set in UTMI phy driver. diff --git a/target/linux/mvebu/patches-5.15/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch b/target/linux/mvebu/patches-5.15/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch deleted file mode 100644 index 29f36be460d22a..00000000000000 --- a/target/linux/mvebu/patches-5.15/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch +++ /dev/null @@ -1,40 +0,0 @@ -From c28b2d367da8a471482e6a4aa8337ab6369a80c2 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 3 Oct 2015 09:13:05 +0100 -Subject: cpuidle: mvebu: indicate failure to enter deeper sleep states - -The cpuidle ->enter method expects the return value to be the sleep -state we entered. Returning negative numbers or other codes is not -permissible since coupled CPU idle was merged. - -At least some of the mvebu_v7_cpu_suspend() implementations return the -value from cpu_suspend(), which returns zero if the CPU vectors back -into the kernel via cpu_resume() (the success case), or the non-zero -return value of the suspend actor, or one (failure cases). - -We do not want to be returning the failure case value back to CPU idle -as that indicates that we successfully entered one of the deeper idle -states. Always return zero instead, indicating that we slept for the -shortest amount of time. - -Signed-off-by: Russell King ---- - drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/drivers/cpuidle/cpuidle-mvebu-v7.c -+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c -@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp - ret = mvebu_v7_cpu_suspend(deepidle); - cpu_pm_exit(); - -+ /* -+ * If we failed to enter the desired state, indicate that we -+ * slept lightly. -+ */ - if (ret) -- return ret; -+ return 0; - - return index; - } diff --git a/target/linux/mvebu/patches-5.15/801-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-5.15/801-pci-mvebu-time-out-reset-on-link-up.patch deleted file mode 100644 index dba12536993133..00000000000000 --- a/target/linux/mvebu/patches-5.15/801-pci-mvebu-time-out-reset-on-link-up.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 9 Jul 2016 10:58:16 +0100 -Subject: pci: mvebu: time out reset on link up - -If the port reports that the link is up while we are resetting, there's -little point in waiting for the full duration. - -Signed-off-by: Russell King ---- - drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++------ - 1 file changed, 14 insertions(+), 6 deletions(-) - ---- a/drivers/pci/controller/pci-mvebu.c -+++ b/drivers/pci/controller/pci-mvebu.c -@@ -1023,6 +1023,7 @@ static int mvebu_pcie_powerup(struct mve - - if (port->reset_gpio) { - u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; -+ unsigned int i; - - of_property_read_u32(port->dn, "reset-delay-us", - &reset_udelay); -@@ -1030,7 +1031,13 @@ static int mvebu_pcie_powerup(struct mve - udelay(100); - - gpiod_set_value_cansleep(port->reset_gpio, 0); -- msleep(reset_udelay / 1000); -+ for (i = 0; i < reset_udelay; i += 1000) { -+ if (mvebu_pcie_link_up(port)) -+ break; -+ msleep(1); -+ } -+ -+ printk("%s: reset completed in %dus\n", port->name, i); - } - - return 0; -@@ -1190,15 +1197,16 @@ static int mvebu_pcie_probe(struct platf - if (!child) - continue; - -- ret = mvebu_pcie_powerup(port); -- if (ret < 0) -- continue; -- - port->base = mvebu_pcie_map_registers(pdev, child, port); - if (IS_ERR(port->base)) { - dev_err(dev, "%s: cannot map registers\n", port->name); - port->base = NULL; -- mvebu_pcie_powerdown(port); -+ continue; -+ } -+ -+ ret = mvebu_pcie_powerup(port); -+ if (ret < 0) { -+ port->base = NULL; - continue; - } - diff --git a/target/linux/mvebu/patches-5.15/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch b/target/linux/mvebu/patches-5.15/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch deleted file mode 100644 index 3446086cadfed3..00000000000000 --- a/target/linux/mvebu/patches-5.15/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch +++ /dev/null @@ -1,218 +0,0 @@ -From aa4a0ccc41997f2da172165c92803abace43bd1c Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:32 +0000 -Subject: [PATCH 1/7] dt-bindings: Add IEI vendor prefix and IEI WT61P803 - PUZZLE driver bindings - -Add the IEI WT61P803 PUZZLE Device Tree bindings for MFD, HWMON and LED -drivers. A new vendor prefix is also added accordingly for -IEI Integration Corp. - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Cc: Luka Perkov -Cc: Robert Marko ---- - .../hwmon/iei,wt61p803-puzzle-hwmon.yaml | 53 ++++++++++++ - .../leds/iei,wt61p803-puzzle-leds.yaml | 39 +++++++++ - .../bindings/mfd/iei,wt61p803-puzzle.yaml | 82 +++++++++++++++++++ - .../devicetree/bindings/vendor-prefixes.yaml | 2 + - 4 files changed, 176 insertions(+) - create mode 100644 Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml - create mode 100644 Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml - create mode 100644 Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml - ---- /dev/null -+++ b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml -@@ -0,0 +1,53 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: IEI WT61P803 PUZZLE MCU HWMON module from IEI Integration Corp. -+ -+maintainers: -+ - Luka Kovacic -+ -+description: | -+ This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details -+ see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. -+ -+ The HWMON module is a sub-node of the MCU node in the Device Tree. -+ -+properties: -+ compatible: -+ const: iei,wt61p803-puzzle-hwmon -+ -+ "#address-cells": -+ const: 1 -+ -+ "#size-cells": -+ const: 0 -+ -+patternProperties: -+ "^fan-group@[0-1]$": -+ type: object -+ properties: -+ reg: -+ minimum: 0 -+ maximum: 1 -+ description: -+ Fan group ID -+ -+ cooling-levels: -+ minItems: 1 -+ maxItems: 255 -+ description: -+ Cooling levels for the fans (PWM value mapping) -+ description: | -+ Properties for each fan group. -+ required: -+ - reg -+ -+required: -+ - compatible -+ - "#address-cells" -+ - "#size-cells" -+ -+additionalProperties: false ---- /dev/null -+++ b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml -@@ -0,0 +1,39 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/leds/iei,wt61p803-puzzle-leds.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: IEI WT61P803 PUZZLE MCU LED module from IEI Integration Corp. -+ -+maintainers: -+ - Luka Kovacic -+ -+description: | -+ This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details -+ see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. -+ -+ The LED module is a sub-node of the MCU node in the Device Tree. -+ -+properties: -+ compatible: -+ const: iei,wt61p803-puzzle-leds -+ -+ "#address-cells": -+ const: 1 -+ -+ "#size-cells": -+ const: 0 -+ -+ led@0: -+ type: object -+ $ref: common.yaml -+ description: | -+ Properties for a single LED. -+ -+required: -+ - compatible -+ - "#address-cells" -+ - "#size-cells" -+ -+additionalProperties: false ---- /dev/null -+++ b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml -@@ -0,0 +1,82 @@ -+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/mfd/iei,wt61p803-puzzle.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: IEI WT61P803 PUZZLE MCU from IEI Integration Corp. -+ -+maintainers: -+ - Luka Kovacic -+ -+description: | -+ IEI WT61P803 PUZZLE MCU is embedded in some IEI Puzzle series boards. -+ It's used for controlling system power states, fans, LEDs and temperature -+ sensors. -+ -+ For Device Tree bindings of other sub-modules (HWMON, LEDs) refer to the -+ binding documents under the respective subsystem directories. -+ -+properties: -+ compatible: -+ const: iei,wt61p803-puzzle -+ -+ current-speed: -+ description: -+ Serial bus speed in bps -+ maxItems: 1 -+ -+ enable-beep: true -+ -+ hwmon: -+ $ref: /schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml -+ -+ leds: -+ $ref: /schemas/leds/iei,wt61p803-puzzle-leds.yaml -+ -+required: -+ - compatible -+ - current-speed -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ serial { -+ mcu { -+ compatible = "iei,wt61p803-puzzle"; -+ current-speed = <115200>; -+ enable-beep; -+ -+ leds { -+ compatible = "iei,wt61p803-puzzle-leds"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ led@0 { -+ reg = <0>; -+ function = LED_FUNCTION_POWER; -+ color = ; -+ }; -+ }; -+ -+ hwmon { -+ compatible = "iei,wt61p803-puzzle-hwmon"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ fan-group@0 { -+ #cooling-cells = <2>; -+ reg = <0x00>; -+ cooling-levels = <64 102 170 230 250>; -+ }; -+ -+ fan-group@1 { -+ #cooling-cells = <2>; -+ reg = <0x01>; -+ cooling-levels = <64 102 170 230 250>; -+ }; -+ }; -+ }; -+ }; ---- a/Documentation/devicetree/bindings/vendor-prefixes.yaml -+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml -@@ -519,6 +519,8 @@ patternProperties: - description: IC Plus Corp. - "^idt,.*": - description: Integrated Device Technologies, Inc. -+ "^iei,.*": -+ description: IEI Integration Corp. - "^ifi,.*": - description: Ingenieurburo Fur Ic-Technologie (I/F/I) - "^ilitek,.*": diff --git a/target/linux/mvebu/patches-5.15/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch b/target/linux/mvebu/patches-5.15/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch deleted file mode 100644 index 0e546b426edd0d..00000000000000 --- a/target/linux/mvebu/patches-5.15/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch +++ /dev/null @@ -1,1034 +0,0 @@ -From 692cfa85272dd12995b427c0a7a585ced5d54f32 Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:33 +0000 -Subject: [PATCH 2/7] drivers: mfd: Add a driver for IEI WT61P803 PUZZLE MCU - -Add a driver for the IEI WT61P803 PUZZLE microcontroller, used in some -IEI Puzzle series devices. The microcontroller controls system power, -temperature sensors, fans and LEDs. - -This driver implements the core functionality for device communication -over the system serial (serdev bus). It handles MCU messages and the -internal MCU properties. Some properties can be managed over sysfs. - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Cc: Luka Perkov -Cc: Robert Marko ---- - drivers/mfd/Kconfig | 8 + - drivers/mfd/Makefile | 1 + - drivers/mfd/iei-wt61p803-puzzle.c | 908 ++++++++++++++++++++++++ - include/linux/mfd/iei-wt61p803-puzzle.h | 66 ++ - 4 files changed, 983 insertions(+) - create mode 100644 drivers/mfd/iei-wt61p803-puzzle.c - create mode 100644 include/linux/mfd/iei-wt61p803-puzzle.h - ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -2189,6 +2189,15 @@ config SGI_MFD_IOC3 - If you have an SGI Origin, Octane, or a PCI IOC3 card, - then say Y. Otherwise say N. - -+config MFD_IEI_WT61P803_PUZZLE -+ tristate "IEI WT61P803 PUZZLE MCU driver" -+ depends on SERIAL_DEV_BUS -+ select MFD_CORE -+ help -+ IEI WT61P803 PUZZLE is a system power management microcontroller -+ used for fan control, temperature sensor reading, LED control -+ and system identification. -+ - config MFD_INTEL_M10_BMC - tristate "Intel MAX 10 Board Management Controller" - depends on SPI_MASTER ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -237,6 +237,7 @@ obj-$(CONFIG_MFD_DLN2) += dln2.o - obj-$(CONFIG_MFD_RT4831) += rt4831.o - obj-$(CONFIG_MFD_RT5033) += rt5033.o - obj-$(CONFIG_MFD_SKY81452) += sky81452.o -+obj-$(CONFIG_MFD_IEI_WT61P803_PUZZLE) += iei-wt61p803-puzzle.o - - intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o - obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o ---- /dev/null -+++ b/drivers/mfd/iei-wt61p803-puzzle.c -@@ -0,0 +1,908 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* IEI WT61P803 PUZZLE MCU Driver -+ * System management microcontroller for fan control, temperature sensor reading, -+ * LED control and system identification on IEI Puzzle series ARM-based appliances. -+ * -+ * Copyright (C) 2020 Sartura Ltd. -+ * Author: Luka Kovacic -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* start, payload and XOR checksum at end */ -+#define IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH (1 + 20 + 1) -+#define IEI_WT61P803_PUZZLE_RESP_BUF_SIZE 512 -+ -+#define IEI_WT61P803_PUZZLE_MAC_LENGTH 17 -+#define IEI_WT61P803_PUZZLE_SN_LENGTH 36 -+#define IEI_WT61P803_PUZZLE_VERSION_LENGTH 6 -+#define IEI_WT61P803_PUZZLE_BUILD_INFO_LENGTH 16 -+#define IEI_WT61P803_PUZZLE_PROTOCOL_VERSION_LENGTH 8 -+#define IEI_WT61P803_PUZZLE_NB_MAC 8 -+ -+/* Use HZ as a timeout value throughout the driver */ -+#define IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT HZ -+ -+enum iei_wt61p803_puzzle_attribute_type { -+ IEI_WT61P803_PUZZLE_VERSION, -+ IEI_WT61P803_PUZZLE_BUILD_INFO, -+ IEI_WT61P803_PUZZLE_BOOTLOADER_MODE, -+ IEI_WT61P803_PUZZLE_PROTOCOL_VERSION, -+ IEI_WT61P803_PUZZLE_SERIAL_NUMBER, -+ IEI_WT61P803_PUZZLE_MAC_ADDRESS, -+ IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS, -+ IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, -+ IEI_WT61P803_PUZZLE_POWER_STATUS, -+}; -+ -+struct iei_wt61p803_puzzle_device_attribute { -+ struct device_attribute dev_attr; -+ enum iei_wt61p803_puzzle_attribute_type type; -+ u8 index; -+}; -+ -+/** -+ * struct iei_wt61p803_puzzle_mcu_status - MCU flags state -+ * @ac_recovery_status_flag: AC Recovery Status Flag -+ * @power_loss_recovery: System recovery after power loss -+ * @power_status: System Power-on Method -+ */ -+struct iei_wt61p803_puzzle_mcu_status { -+ u8 ac_recovery_status_flag; -+ u8 power_loss_recovery; -+ u8 power_status; -+}; -+ -+/** -+ * struct iei_wt61p803_puzzle_reply - MCU reply -+ * @size: Size of the MCU reply -+ * @data: Full MCU reply buffer -+ * @state: Current state of the packet -+ * @received: Was the response fullfilled -+ */ -+struct iei_wt61p803_puzzle_reply { -+ size_t size; -+ unsigned char data[IEI_WT61P803_PUZZLE_RESP_BUF_SIZE]; -+ struct completion received; -+}; -+ -+/** -+ * struct iei_wt61p803_puzzle_mcu_version - MCU version status -+ * @version: Primary firmware version -+ * @build_info: Build date and time -+ * @bootloader_mode: Status of the MCU operation -+ * @protocol_version: MCU communication protocol version -+ * @serial_number: Device factory serial number -+ * @mac_address: Device factory MAC addresses -+ * -+ * Last element of arrays is reserved for '\0'. -+ */ -+struct iei_wt61p803_puzzle_mcu_version { -+ char version[IEI_WT61P803_PUZZLE_VERSION_LENGTH + 1]; -+ char build_info[IEI_WT61P803_PUZZLE_BUILD_INFO_LENGTH + 1]; -+ bool bootloader_mode; -+ char protocol_version[IEI_WT61P803_PUZZLE_PROTOCOL_VERSION_LENGTH + 1]; -+ char serial_number[IEI_WT61P803_PUZZLE_SN_LENGTH + 1]; -+ char mac_address[IEI_WT61P803_PUZZLE_NB_MAC][IEI_WT61P803_PUZZLE_MAC_LENGTH + 1]; -+}; -+ -+/** -+ * struct iei_wt61p803_puzzle - IEI WT61P803 PUZZLE MCU Driver -+ * @serdev: Pointer to underlying serdev device -+ * @dev: Pointer to underlying dev device -+ * @reply_lock: Reply mutex lock -+ * @reply: Pointer to the iei_wt61p803_puzzle_reply struct -+ * @version: MCU version related data -+ * @status: MCU status related data -+ * @response_buffer Command response buffer allocation -+ * @lock General member mutex lock -+ */ -+struct iei_wt61p803_puzzle { -+ struct serdev_device *serdev; -+ struct device *dev; -+ struct mutex reply_lock; /* lock to prevent multiple firmware calls */ -+ struct iei_wt61p803_puzzle_reply *reply; -+ struct iei_wt61p803_puzzle_mcu_version version; -+ struct iei_wt61p803_puzzle_mcu_status status; -+ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; -+ struct mutex lock; /* lock to protect response buffer */ -+}; -+ -+static unsigned char iei_wt61p803_puzzle_checksum(unsigned char *buf, size_t len) -+{ -+ unsigned char checksum = 0; -+ size_t i; -+ -+ for (i = 0; i < len; i++) -+ checksum ^= buf[i]; -+ return checksum; -+} -+ -+static int iei_wt61p803_puzzle_process_resp(struct iei_wt61p803_puzzle *mcu, -+ const unsigned char *raw_resp_data, size_t size) -+{ -+ unsigned char checksum; -+ -+ /* Check the incoming frame header */ -+ if (!(raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START || -+ raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER || -+ (raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM && -+ raw_resp_data[1] == IEI_WT61P803_PUZZLE_CMD_EEPROM_READ))) { -+ if (mcu->reply->size + size >= sizeof(mcu->reply->data)) -+ return -EIO; -+ -+ /* Append the frame to existing data */ -+ memcpy(mcu->reply->data + mcu->reply->size, raw_resp_data, size); -+ mcu->reply->size += size; -+ } else { -+ if (size >= sizeof(mcu->reply->data)) -+ return -EIO; -+ -+ /* Start processing a new frame */ -+ memcpy(mcu->reply->data, raw_resp_data, size); -+ mcu->reply->size = size; -+ } -+ -+ checksum = iei_wt61p803_puzzle_checksum(mcu->reply->data, mcu->reply->size - 1); -+ if (checksum != mcu->reply->data[mcu->reply->size - 1]) { -+ /* The checksum isn't matched yet, wait for new frames */ -+ return size; -+ } -+ -+ /* Received all the data */ -+ complete(&mcu->reply->received); -+ -+ return size; -+} -+ -+static int iei_wt61p803_puzzle_recv_buf(struct serdev_device *serdev, -+ const unsigned char *data, size_t size) -+{ -+ struct iei_wt61p803_puzzle *mcu = serdev_device_get_drvdata(serdev); -+ int ret; -+ -+ ret = iei_wt61p803_puzzle_process_resp(mcu, data, size); -+ /* Return the number of processed bytes if function returns error, -+ * discard the remaining incoming data, since the frame this data -+ * belongs to is broken anyway -+ */ -+ if (ret < 0) -+ return size; -+ -+ return ret; -+} -+ -+static const struct serdev_device_ops iei_wt61p803_puzzle_serdev_device_ops = { -+ .receive_buf = iei_wt61p803_puzzle_recv_buf, -+ .write_wakeup = serdev_device_write_wakeup, -+}; -+ -+/** -+ * iei_wt61p803_puzzle_write_command_watchdog() - Watchdog of the normal cmd -+ * @mcu: Pointer to the iei_wt61p803_puzzle core MFD struct -+ * @cmd: Pointer to the char array to send (size should be content + 1 (xor)) -+ * @size: Size of the cmd char array -+ * @reply_data: Pointer to the reply/response data array (should be allocated) -+ * @reply_size: Pointer to size_t (size of reply_data) -+ * @retry_count: Number of times to retry sending the command to the MCU -+ */ -+int iei_wt61p803_puzzle_write_command_watchdog(struct iei_wt61p803_puzzle *mcu, -+ unsigned char *cmd, size_t size, -+ unsigned char *reply_data, -+ size_t *reply_size, int retry_count) -+{ -+ struct device *dev = &mcu->serdev->dev; -+ int ret, i; -+ -+ for (i = 0; i < retry_count; i++) { -+ ret = iei_wt61p803_puzzle_write_command(mcu, cmd, size, -+ reply_data, reply_size); -+ if (ret != -ETIMEDOUT) -+ return ret; -+ } -+ -+ dev_err(dev, "Command response timed out. Retries: %d\n", retry_count); -+ -+ return -ETIMEDOUT; -+} -+EXPORT_SYMBOL_GPL(iei_wt61p803_puzzle_write_command_watchdog); -+ -+/** -+ * iei_wt61p803_puzzle_write_command() - Send a structured command to the MCU -+ * @mcu: Pointer to the iei_wt61p803_puzzle core MFD struct -+ * @cmd: Pointer to the char array to send (size should be content + 1 (xor)) -+ * @size: Size of the cmd char array -+ * @reply_data: Pointer to the reply/response data array (should be allocated) -+ * -+ * Sends a structured command to the MCU. -+ */ -+int iei_wt61p803_puzzle_write_command(struct iei_wt61p803_puzzle *mcu, -+ unsigned char *cmd, size_t size, -+ unsigned char *reply_data, -+ size_t *reply_size) -+{ -+ struct device *dev = &mcu->serdev->dev; -+ int ret; -+ -+ if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH) -+ return -EINVAL; -+ -+ mutex_lock(&mcu->reply_lock); -+ -+ cmd[size - 1] = iei_wt61p803_puzzle_checksum(cmd, size - 1); -+ -+ /* Initialize reply struct */ -+ reinit_completion(&mcu->reply->received); -+ mcu->reply->size = 0; -+ usleep_range(2000, 10000); -+ serdev_device_write_flush(mcu->serdev); -+ ret = serdev_device_write_buf(mcu->serdev, cmd, size); -+ if (ret < 0) -+ goto exit; -+ -+ serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); -+ ret = wait_for_completion_timeout(&mcu->reply->received, -+ IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); -+ if (ret == 0) { -+ dev_err(dev, "Command reply receive timeout\n"); -+ ret = -ETIMEDOUT; -+ goto exit; -+ } -+ -+ *reply_size = mcu->reply->size; -+ /* Copy the received data, as it will not be available after a new frame is received */ -+ memcpy(reply_data, mcu->reply->data, mcu->reply->size); -+ ret = 0; -+exit: -+ mutex_unlock(&mcu->reply_lock); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(iei_wt61p803_puzzle_write_command); -+ -+static int iei_wt61p803_puzzle_buzzer(struct iei_wt61p803_puzzle *mcu, bool long_beep) -+{ -+ unsigned char *resp_buf = mcu->response_buffer; -+ unsigned char buzzer_cmd[4] = {}; -+ size_t reply_size; -+ int ret; -+ -+ buzzer_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ buzzer_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_SINGLE; -+ buzzer_cmd[2] = long_beep ? '3' : '2'; /* Buzzer 1.5 / 0.5 second beep */ -+ -+ mutex_lock(&mcu->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu, buzzer_cmd, sizeof(buzzer_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto exit; -+ -+ if (reply_size != 3) { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && -+ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { -+ ret = -EPROTO; -+ goto exit; -+ } -+exit: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_get_version(struct iei_wt61p803_puzzle *mcu) -+{ -+ unsigned char version_cmd[3] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, -+ IEI_WT61P803_PUZZLE_CMD_OTHER_VERSION, -+ }; -+ unsigned char build_info_cmd[3] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, -+ IEI_WT61P803_PUZZLE_CMD_OTHER_BUILD, -+ }; -+ unsigned char bootloader_mode_cmd[3] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, -+ IEI_WT61P803_PUZZLE_CMD_OTHER_BOOTLOADER_MODE, -+ }; -+ unsigned char protocol_version_cmd[3] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, -+ IEI_WT61P803_PUZZLE_CMD_OTHER_PROTOCOL_VERSION, -+ }; -+ unsigned char *rb = mcu->response_buffer; -+ size_t reply_size; -+ int ret; -+ -+ mutex_lock(&mcu->lock); -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu, version_cmd, sizeof(version_cmd), -+ rb, &reply_size); -+ if (ret) -+ goto err; -+ if (reply_size < 7) { -+ ret = -EIO; -+ goto err; -+ } -+ sprintf(mcu->version.version, "v%c.%.3s", rb[2], &rb[3]); -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu, build_info_cmd, -+ sizeof(build_info_cmd), rb, -+ &reply_size); -+ if (ret) -+ goto err; -+ if (reply_size < 15) { -+ ret = -EIO; -+ goto err; -+ } -+ sprintf(mcu->version.build_info, "%c%c/%c%c/%.4s %c%c:%c%c", -+ rb[8], rb[9], rb[6], rb[7], &rb[2], rb[10], rb[11], -+ rb[12], rb[13]); -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu, bootloader_mode_cmd, -+ sizeof(bootloader_mode_cmd), rb, -+ &reply_size); -+ if (ret) -+ goto err; -+ if (reply_size < 4) { -+ ret = -EIO; -+ goto err; -+ } -+ if (rb[2] == IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_APPS) -+ mcu->version.bootloader_mode = false; -+ else if (rb[2] == IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_BOOTLOADER) -+ mcu->version.bootloader_mode = true; -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu, protocol_version_cmd, -+ sizeof(protocol_version_cmd), rb, -+ &reply_size); -+ if (ret) -+ goto err; -+ if (reply_size < 9) { -+ ret = -EIO; -+ goto err; -+ } -+ sprintf(mcu->version.protocol_version, "v%c.%c%c%c%c%c", -+ rb[7], rb[6], rb[5], rb[4], rb[3], rb[2]); -+err: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_get_mcu_status(struct iei_wt61p803_puzzle *mcu) -+{ -+ unsigned char mcu_status_cmd[5] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_START, -+ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER, -+ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS, -+ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS, -+ }; -+ unsigned char *resp_buf = mcu->response_buffer; -+ size_t reply_size; -+ int ret; -+ -+ mutex_lock(&mcu->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu, mcu_status_cmd, sizeof(mcu_status_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto exit; -+ if (reply_size < 20) { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ /* Response format: -+ * (IDX RESPONSE) -+ * 0 @ -+ * 1 O -+ * 2 S -+ * 3 S -+ * ... -+ * 5 AC Recovery Status Flag -+ * ... -+ * 10 Power Loss Recovery -+ * ... -+ * 19 Power Status (system power on method) -+ * 20 XOR checksum -+ */ -+ if (resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER && -+ resp_buf[2] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS && -+ resp_buf[3] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS) { -+ mcu->status.ac_recovery_status_flag = resp_buf[5]; -+ mcu->status.power_loss_recovery = resp_buf[10]; -+ mcu->status.power_status = resp_buf[19]; -+ } -+exit: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_get_serial_number(struct iei_wt61p803_puzzle *mcu) -+{ -+ unsigned char *resp_buf = mcu->response_buffer; -+ unsigned char serial_number_cmd[5] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, -+ IEI_WT61P803_PUZZLE_CMD_EEPROM_READ, -+ 0x00, /* EEPROM read address */ -+ 0x24, /* Data length */ -+ }; -+ size_t reply_size; -+ int ret; -+ -+ mutex_lock(&mcu->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu, serial_number_cmd, -+ sizeof(serial_number_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto err; -+ -+ if (reply_size < IEI_WT61P803_PUZZLE_SN_LENGTH + 4) { -+ ret = -EIO; -+ goto err; -+ } -+ -+ sprintf(mcu->version.serial_number, "%.*s", -+ IEI_WT61P803_PUZZLE_SN_LENGTH, resp_buf + 4); -+err: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_write_serial_number(struct iei_wt61p803_puzzle *mcu, -+ unsigned char serial_number[36]) -+{ -+ unsigned char *resp_buf = mcu->response_buffer; -+ unsigned char serial_number_header[4] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, -+ IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE, -+ 0x00, /* EEPROM write address */ -+ 0xC, /* Data length */ -+ }; -+ unsigned char serial_number_cmd[4 + 12 + 1]; /* header, serial number, XOR checksum */ -+ int ret, sn_counter; -+ size_t reply_size; -+ -+ /* The MCU can only handle 22 byte messages, send the S/N in 12 byte chunks */ -+ mutex_lock(&mcu->lock); -+ for (sn_counter = 0; sn_counter < 3; sn_counter++) { -+ serial_number_header[2] = 0x0 + 0xC * sn_counter; -+ -+ memcpy(serial_number_cmd, serial_number_header, sizeof(serial_number_header)); -+ memcpy(serial_number_cmd + sizeof(serial_number_header), -+ serial_number + 0xC * sn_counter, 0xC); -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu, serial_number_cmd, -+ sizeof(serial_number_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto err; -+ if (reply_size != 3) { -+ ret = -EIO; -+ goto err; -+ } -+ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && -+ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { -+ ret = -EPROTO; -+ goto err; -+ } -+ } -+ -+ sprintf(mcu->version.serial_number, "%.*s", -+ IEI_WT61P803_PUZZLE_SN_LENGTH, serial_number); -+err: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_get_mac_address(struct iei_wt61p803_puzzle *mcu, int index) -+{ -+ unsigned char *resp_buf = mcu->response_buffer; -+ unsigned char mac_address_cmd[5] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, -+ IEI_WT61P803_PUZZLE_CMD_EEPROM_READ, -+ 0x00, /* EEPROM read address */ -+ 0x11, /* Data length */ -+ }; -+ size_t reply_size; -+ int ret; -+ -+ mutex_lock(&mcu->lock); -+ mac_address_cmd[2] = 0x24 + 0x11 * index; -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu, mac_address_cmd, -+ sizeof(mac_address_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto err; -+ -+ if (reply_size < 22) { -+ ret = -EIO; -+ goto err; -+ } -+ -+ sprintf(mcu->version.mac_address[index], "%.*s", -+ IEI_WT61P803_PUZZLE_MAC_LENGTH, resp_buf + 4); -+err: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int -+iei_wt61p803_puzzle_write_mac_address(struct iei_wt61p803_puzzle *mcu, -+ unsigned char mac_address[IEI_WT61P803_PUZZLE_MAC_LENGTH], -+ int mac_address_idx) -+{ -+ unsigned char mac_address_cmd[4 + IEI_WT61P803_PUZZLE_MAC_LENGTH + 1]; -+ unsigned char *resp_buf = mcu->response_buffer; -+ unsigned char mac_address_header[4] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, -+ IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE, -+ 0x00, /* EEPROM write address */ -+ 0x11, /* Data length */ -+ }; -+ size_t reply_size; -+ int ret; -+ -+ if (mac_address_idx < 0 || mac_address_idx >= IEI_WT61P803_PUZZLE_NB_MAC) -+ return -EINVAL; -+ -+ mac_address_header[2] = 0x24 + 0x11 * mac_address_idx; -+ -+ /* Concat mac_address_header, mac_address to mac_address_cmd */ -+ memcpy(mac_address_cmd, mac_address_header, sizeof(mac_address_header)); -+ memcpy(mac_address_cmd + sizeof(mac_address_header), mac_address, -+ IEI_WT61P803_PUZZLE_MAC_LENGTH); -+ -+ mutex_lock(&mcu->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu, mac_address_cmd, -+ sizeof(mac_address_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto err; -+ if (reply_size != 3) { -+ ret = -EIO; -+ goto err; -+ } -+ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && -+ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { -+ ret = -EPROTO; -+ goto err; -+ } -+ -+ sprintf(mcu->version.mac_address[mac_address_idx], "%.*s", -+ IEI_WT61P803_PUZZLE_MAC_LENGTH, mac_address); -+err: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_write_power_loss_recovery(struct iei_wt61p803_puzzle *mcu, -+ int power_loss_recovery_action) -+{ -+ unsigned char *resp_buf = mcu->response_buffer; -+ unsigned char power_loss_recovery_cmd[5] = {}; -+ size_t reply_size; -+ int ret; -+ -+ if (power_loss_recovery_action < 0 || power_loss_recovery_action > 4) -+ return -EINVAL; -+ -+ power_loss_recovery_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ power_loss_recovery_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER; -+ power_loss_recovery_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS; -+ power_loss_recovery_cmd[3] = hex_asc[power_loss_recovery_action]; -+ -+ mutex_lock(&mcu->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu, power_loss_recovery_cmd, -+ sizeof(power_loss_recovery_cmd), -+ resp_buf, &reply_size); -+ if (ret) -+ goto exit; -+ mcu->status.power_loss_recovery = power_loss_recovery_action; -+exit: -+ mutex_unlock(&mcu->lock); -+ return ret; -+} -+ -+#define to_puzzle_dev_attr(_attr) \ -+ container_of(_attr, struct iei_wt61p803_puzzle_device_attribute, dev_attr) -+ -+static ssize_t show_output(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); -+ struct iei_wt61p803_puzzle_device_attribute *pattr = to_puzzle_dev_attr(attr); -+ int ret; -+ -+ switch (pattr->type) { -+ case IEI_WT61P803_PUZZLE_VERSION: -+ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.version); -+ case IEI_WT61P803_PUZZLE_BUILD_INFO: -+ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.build_info); -+ case IEI_WT61P803_PUZZLE_BOOTLOADER_MODE: -+ return scnprintf(buf, PAGE_SIZE, "%d\n", mcu->version.bootloader_mode); -+ case IEI_WT61P803_PUZZLE_PROTOCOL_VERSION: -+ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.protocol_version); -+ case IEI_WT61P803_PUZZLE_SERIAL_NUMBER: -+ ret = iei_wt61p803_puzzle_get_serial_number(mcu); -+ if (!ret) -+ ret = scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.serial_number); -+ else -+ ret = 0; -+ return ret; -+ case IEI_WT61P803_PUZZLE_MAC_ADDRESS: -+ ret = iei_wt61p803_puzzle_get_mac_address(mcu, pattr->index); -+ if (!ret) -+ ret = scnprintf(buf, PAGE_SIZE, "%s\n", -+ mcu->version.mac_address[pattr->index]); -+ else -+ ret = 0; -+ return ret; -+ case IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS: -+ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: -+ case IEI_WT61P803_PUZZLE_POWER_STATUS: -+ ret = iei_wt61p803_puzzle_get_mcu_status(mcu); -+ if (ret) -+ return ret; -+ -+ mutex_lock(&mcu->lock); -+ switch (pattr->type) { -+ case IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS: -+ ret = scnprintf(buf, PAGE_SIZE, "%x\n", -+ mcu->status.ac_recovery_status_flag); -+ break; -+ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: -+ ret = scnprintf(buf, PAGE_SIZE, "%x\n", mcu->status.power_loss_recovery); -+ break; -+ case IEI_WT61P803_PUZZLE_POWER_STATUS: -+ ret = scnprintf(buf, PAGE_SIZE, "%x\n", mcu->status.power_status); -+ break; -+ default: -+ ret = 0; -+ break; -+ } -+ mutex_unlock(&mcu->lock); -+ return ret; -+ default: -+ return 0; -+ } -+ -+ return 0; -+} -+ -+static ssize_t store_output(struct device *dev, -+ struct device_attribute *attr, -+ const char *buf, size_t len) -+{ -+ unsigned char serial_number[IEI_WT61P803_PUZZLE_SN_LENGTH]; -+ unsigned char mac_address[IEI_WT61P803_PUZZLE_MAC_LENGTH]; -+ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); -+ struct iei_wt61p803_puzzle_device_attribute *pattr = to_puzzle_dev_attr(attr); -+ int power_loss_recovery_action = 0; -+ int ret; -+ -+ switch (pattr->type) { -+ case IEI_WT61P803_PUZZLE_SERIAL_NUMBER: -+ if (len != (size_t)(IEI_WT61P803_PUZZLE_SN_LENGTH + 1)) -+ return -EINVAL; -+ memcpy(serial_number, buf, sizeof(serial_number)); -+ ret = iei_wt61p803_puzzle_write_serial_number(mcu, serial_number); -+ if (ret) -+ return ret; -+ return len; -+ case IEI_WT61P803_PUZZLE_MAC_ADDRESS: -+ if (len != (size_t)(IEI_WT61P803_PUZZLE_MAC_LENGTH + 1)) -+ return -EINVAL; -+ -+ memcpy(mac_address, buf, sizeof(mac_address)); -+ -+ if (strlen(attr->attr.name) != 13) -+ return -EIO; -+ -+ ret = iei_wt61p803_puzzle_write_mac_address(mcu, mac_address, pattr->index); -+ if (ret) -+ return ret; -+ return len; -+ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: -+ ret = kstrtoint(buf, 10, &power_loss_recovery_action); -+ if (ret) -+ return ret; -+ ret = iei_wt61p803_puzzle_write_power_loss_recovery(mcu, -+ power_loss_recovery_action); -+ if (ret) -+ return ret; -+ return len; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+#define IEI_WT61P803_PUZZLE_ATTR(_name, _mode, _show, _store, _type, _index) \ -+ struct iei_wt61p803_puzzle_device_attribute dev_attr_##_name = \ -+ { .dev_attr = __ATTR(_name, _mode, _show, _store), \ -+ .type = _type, \ -+ .index = _index } -+ -+#define IEI_WT61P803_PUZZLE_ATTR_RO(_name, _type, _id) \ -+ IEI_WT61P803_PUZZLE_ATTR(_name, 0444, show_output, NULL, _type, _id) -+ -+#define IEI_WT61P803_PUZZLE_ATTR_RW(_name, _type, _id) \ -+ IEI_WT61P803_PUZZLE_ATTR(_name, 0644, show_output, store_output, _type, _id) -+ -+static IEI_WT61P803_PUZZLE_ATTR_RO(version, IEI_WT61P803_PUZZLE_VERSION, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RO(build_info, IEI_WT61P803_PUZZLE_BUILD_INFO, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RO(bootloader_mode, IEI_WT61P803_PUZZLE_BOOTLOADER_MODE, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RO(protocol_version, IEI_WT61P803_PUZZLE_PROTOCOL_VERSION, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RW(serial_number, IEI_WT61P803_PUZZLE_SERIAL_NUMBER, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_0, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_1, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 1); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_2, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 2); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_3, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 3); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_4, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 4); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_5, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 5); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_6, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 6); -+static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_7, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 7); -+static IEI_WT61P803_PUZZLE_ATTR_RO(ac_recovery_status, IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RW(power_loss_recovery, IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, 0); -+static IEI_WT61P803_PUZZLE_ATTR_RO(power_status, IEI_WT61P803_PUZZLE_POWER_STATUS, 0); -+ -+static struct attribute *iei_wt61p803_puzzle_attrs[] = { -+ &dev_attr_version.dev_attr.attr, -+ &dev_attr_build_info.dev_attr.attr, -+ &dev_attr_bootloader_mode.dev_attr.attr, -+ &dev_attr_protocol_version.dev_attr.attr, -+ &dev_attr_serial_number.dev_attr.attr, -+ &dev_attr_mac_address_0.dev_attr.attr, -+ &dev_attr_mac_address_1.dev_attr.attr, -+ &dev_attr_mac_address_2.dev_attr.attr, -+ &dev_attr_mac_address_3.dev_attr.attr, -+ &dev_attr_mac_address_4.dev_attr.attr, -+ &dev_attr_mac_address_5.dev_attr.attr, -+ &dev_attr_mac_address_6.dev_attr.attr, -+ &dev_attr_mac_address_7.dev_attr.attr, -+ &dev_attr_ac_recovery_status.dev_attr.attr, -+ &dev_attr_power_loss_recovery.dev_attr.attr, -+ &dev_attr_power_status.dev_attr.attr, -+ NULL -+}; -+ATTRIBUTE_GROUPS(iei_wt61p803_puzzle); -+ -+static int iei_wt61p803_puzzle_sysfs_create(struct device *dev, -+ struct iei_wt61p803_puzzle *mcu) -+{ -+ int ret; -+ -+ ret = sysfs_create_groups(&mcu->dev->kobj, iei_wt61p803_puzzle_groups); -+ if (ret) -+ mfd_remove_devices(mcu->dev); -+ -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_sysfs_remove(struct device *dev, -+ struct iei_wt61p803_puzzle *mcu) -+{ -+ /* Remove sysfs groups */ -+ sysfs_remove_groups(&mcu->dev->kobj, iei_wt61p803_puzzle_groups); -+ mfd_remove_devices(mcu->dev); -+ -+ return 0; -+} -+ -+static int iei_wt61p803_puzzle_probe(struct serdev_device *serdev) -+{ -+ struct device *dev = &serdev->dev; -+ struct iei_wt61p803_puzzle *mcu; -+ u32 baud; -+ int ret; -+ -+ /* Read the baud rate from 'current-speed', because the MCU supports different rates */ -+ if (device_property_read_u32(dev, "current-speed", &baud)) { -+ dev_err(dev, -+ "'current-speed' is not specified in device node\n"); -+ return -EINVAL; -+ } -+ dev_dbg(dev, "Driver baud rate: %d\n", baud); -+ -+ /* Allocate the memory */ -+ mcu = devm_kzalloc(dev, sizeof(*mcu), GFP_KERNEL); -+ if (!mcu) -+ return -ENOMEM; -+ -+ mcu->reply = devm_kzalloc(dev, sizeof(*mcu->reply), GFP_KERNEL); -+ if (!mcu->reply) -+ return -ENOMEM; -+ -+ /* Initialize device struct data */ -+ mcu->serdev = serdev; -+ mcu->dev = dev; -+ init_completion(&mcu->reply->received); -+ mutex_init(&mcu->reply_lock); -+ mutex_init(&mcu->lock); -+ -+ /* Setup UART interface */ -+ serdev_device_set_drvdata(serdev, mcu); -+ serdev_device_set_client_ops(serdev, &iei_wt61p803_puzzle_serdev_device_ops); -+ ret = devm_serdev_device_open(dev, serdev); -+ if (ret) -+ return ret; -+ serdev_device_set_baudrate(serdev, baud); -+ serdev_device_set_flow_control(serdev, false); -+ ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE); -+ if (ret) { -+ dev_err(dev, "Failed to set parity\n"); -+ return ret; -+ } -+ -+ ret = iei_wt61p803_puzzle_get_version(mcu); -+ if (ret) -+ return ret; -+ -+ dev_dbg(dev, "MCU version: %s\n", mcu->version.version); -+ dev_dbg(dev, "MCU firmware build info: %s\n", mcu->version.build_info); -+ dev_dbg(dev, "MCU in bootloader mode: %s\n", -+ mcu->version.bootloader_mode ? "true" : "false"); -+ dev_dbg(dev, "MCU protocol version: %s\n", mcu->version.protocol_version); -+ -+ if (device_property_read_bool(dev, "enable-beep")) { -+ ret = iei_wt61p803_puzzle_buzzer(mcu, false); -+ if (ret) -+ return ret; -+ } -+ -+ ret = iei_wt61p803_puzzle_sysfs_create(dev, mcu); -+ if (ret) -+ return ret; -+ -+ return devm_of_platform_populate(dev); -+} -+ -+static void iei_wt61p803_puzzle_remove(struct serdev_device *serdev) -+{ -+ struct device *dev = &serdev->dev; -+ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); -+ -+ iei_wt61p803_puzzle_sysfs_remove(dev, mcu); -+} -+ -+static const struct of_device_id iei_wt61p803_puzzle_dt_ids[] = { -+ { .compatible = "iei,wt61p803-puzzle" }, -+ { } -+}; -+ -+MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_dt_ids); -+ -+static struct serdev_device_driver iei_wt61p803_puzzle_drv = { -+ .probe = iei_wt61p803_puzzle_probe, -+ .remove = iei_wt61p803_puzzle_remove, -+ .driver = { -+ .name = "iei-wt61p803-puzzle", -+ .of_match_table = iei_wt61p803_puzzle_dt_ids, -+ }, -+}; -+ -+module_serdev_device_driver(iei_wt61p803_puzzle_drv); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Luka Kovacic "); -+MODULE_DESCRIPTION("IEI WT61P803 PUZZLE MCU Driver"); ---- /dev/null -+++ b/include/linux/mfd/iei-wt61p803-puzzle.h -@@ -0,0 +1,66 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+/* IEI WT61P803 PUZZLE MCU Driver -+ * System management microcontroller for fan control, temperature sensor reading, -+ * LED control and system identification on IEI Puzzle series ARM-based appliances. -+ * -+ * Copyright (C) 2020 Sartura Ltd. -+ * Author: Luka Kovacic -+ */ -+ -+#ifndef _MFD_IEI_WT61P803_PUZZLE_H_ -+#define _MFD_IEI_WT61P803_PUZZLE_H_ -+ -+#define IEI_WT61P803_PUZZLE_BUF_SIZE 512 -+ -+/* Command magic numbers */ -+#define IEI_WT61P803_PUZZLE_CMD_HEADER_START 0x40 /* @ */ -+#define IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER 0x25 /* % */ -+#define IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM 0xF7 -+ -+#define IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK 0x30 /* 0 */ -+#define IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK 0x70 -+ -+#define IEI_WT61P803_PUZZLE_CMD_EEPROM_READ 0xA1 -+#define IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE 0xA0 -+ -+#define IEI_WT61P803_PUZZLE_CMD_OTHER_VERSION 0x56 /* V */ -+#define IEI_WT61P803_PUZZLE_CMD_OTHER_BUILD 0x42 /* B */ -+#define IEI_WT61P803_PUZZLE_CMD_OTHER_BOOTLOADER_MODE 0x4D /* M */ -+#define IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_BOOTLOADER 0x30 -+#define IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_APPS 0x31 -+#define IEI_WT61P803_PUZZLE_CMD_OTHER_PROTOCOL_VERSION 0x50 /* P */ -+ -+#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_SINGLE 0x43 /* C */ -+#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER 0x4F /* O */ -+#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS 0x53 /* S */ -+#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS 0x41 /* A */ -+ -+#define IEI_WT61P803_PUZZLE_CMD_LED 0x52 /* R */ -+#define IEI_WT61P803_PUZZLE_CMD_LED_POWER 0x31 /* 1 */ -+ -+#define IEI_WT61P803_PUZZLE_CMD_TEMP 0x54 /* T */ -+#define IEI_WT61P803_PUZZLE_CMD_TEMP_ALL 0x41 /* A */ -+ -+#define IEI_WT61P803_PUZZLE_CMD_FAN 0x46 /* F */ -+#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ 0x5A /* Z */ -+#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_WRITE 0x57 /* W */ -+#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_BASE 0x30 -+#define IEI_WT61P803_PUZZLE_CMD_FAN_RPM_BASE 0x41 /* A */ -+ -+#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM(x) (IEI_WT61P803_PUZZLE_CMD_FAN_PWM_BASE + (x)) /* 0 - 1 */ -+#define IEI_WT61P803_PUZZLE_CMD_FAN_RPM(x) (IEI_WT61P803_PUZZLE_CMD_FAN_RPM_BASE + (x)) /* 0 - 5 */ -+ -+struct iei_wt61p803_puzzle_mcu_version; -+struct iei_wt61p803_puzzle_reply; -+struct iei_wt61p803_puzzle; -+ -+int iei_wt61p803_puzzle_write_command_watchdog(struct iei_wt61p803_puzzle *mcu, -+ unsigned char *cmd, size_t size, -+ unsigned char *reply_data, size_t *reply_size, -+ int retry_count); -+ -+int iei_wt61p803_puzzle_write_command(struct iei_wt61p803_puzzle *mcu, -+ unsigned char *cmd, size_t size, -+ unsigned char *reply_data, size_t *reply_size); -+ -+#endif /* _MFD_IEI_WT61P803_PUZZLE_H_ */ diff --git a/target/linux/mvebu/patches-5.15/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch b/target/linux/mvebu/patches-5.15/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch deleted file mode 100644 index 023495373b86ed..00000000000000 --- a/target/linux/mvebu/patches-5.15/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch +++ /dev/null @@ -1,501 +0,0 @@ -From e3310a638cd310bfd93dbbc6d2732ab6aea18dd2 Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:34 +0000 -Subject: [PATCH 3/7] drivers: hwmon: Add the IEI WT61P803 PUZZLE HWMON driver - -Add the IEI WT61P803 PUZZLE HWMON driver, that handles the fan speed -control via PWM, reading fan speed and reading on-board temperature -sensors. - -The driver registers a HWMON device and a simple thermal cooling device to -enable in-kernel fan management. - -This driver depends on the IEI WT61P803 PUZZLE MFD driver. - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Acked-by: Guenter Roeck -Cc: Luka Perkov -Cc: Robert Marko ---- - drivers/hwmon/Kconfig | 8 + - drivers/hwmon/Makefile | 1 + - drivers/hwmon/iei-wt61p803-puzzle-hwmon.c | 413 ++++++++++++++++++++++ - 3 files changed, 422 insertions(+) - create mode 100644 drivers/hwmon/iei-wt61p803-puzzle-hwmon.c - ---- a/drivers/hwmon/Kconfig -+++ b/drivers/hwmon/Kconfig -@@ -732,6 +732,14 @@ config SENSORS_IBMPOWERNV - This driver can also be built as a module. If so, the module - will be called ibmpowernv. - -+config SENSORS_IEI_WT61P803_PUZZLE_HWMON -+ tristate "IEI WT61P803 PUZZLE MFD HWMON Driver" -+ depends on MFD_IEI_WT61P803_PUZZLE -+ help -+ The IEI WT61P803 PUZZLE MFD HWMON Driver handles reading fan speed -+ and writing fan PWM values. It also supports reading on-board -+ temperature sensors. -+ - config SENSORS_IIO_HWMON - tristate "Hwmon driver that uses channels specified via iio maps" - depends on IIO ---- a/drivers/hwmon/Makefile -+++ b/drivers/hwmon/Makefile -@@ -84,6 +84,7 @@ obj-$(CONFIG_SENSORS_HIH6130) += hih6130 - obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o - obj-$(CONFIG_SENSORS_I5500) += i5500_temp.o - obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o -+obj-$(CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON) += iei-wt61p803-puzzle-hwmon.o - obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o - obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o - obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o ---- /dev/null -+++ b/drivers/hwmon/iei-wt61p803-puzzle-hwmon.c -@@ -0,0 +1,445 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* IEI WT61P803 PUZZLE MCU HWMON Driver -+ * -+ * Copyright (C) 2020 Sartura Ltd. -+ * Author: Luka Kovacic -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define IEI_WT61P803_PUZZLE_HWMON_MAX_PWM 2 -+#define IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL 255 -+ -+/** -+ * struct iei_wt61p803_puzzle_thermal_cooling_device - Thermal cooling device instance -+ * @mcu_hwmon: Parent driver struct pointer -+ * @tcdev: Thermal cooling device pointer -+ * @name: Thermal cooling device name -+ * @pwm_channel: Controlled PWM channel (0 or 1) -+ * @cooling_levels: Thermal cooling device cooling levels (DT) -+ * @cur_level: Current cooling level -+ * @num_levels: Number of cooling levels -+ */ -+struct iei_wt61p803_puzzle_thermal_cooling_device { -+ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon; -+ struct thermal_cooling_device *tcdev; -+ char name[THERMAL_NAME_LENGTH]; -+ int pwm_channel; -+ u32 *cooling_levels; -+ int cur_level; -+ u8 num_levels; -+}; -+ -+/** -+ * struct iei_wt61p803_puzzle_hwmon - MCU HWMON Driver -+ * @mcu: MCU struct pointer -+ * @response_buffer Global MCU response buffer -+ * @thermal_cooling_dev_present: Per-channel thermal cooling device control indicator -+ * @cdev: Per-channel thermal cooling device private structure -+ */ -+struct iei_wt61p803_puzzle_hwmon { -+ struct iei_wt61p803_puzzle *mcu; -+ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; -+ bool thermal_cooling_dev_present[IEI_WT61P803_PUZZLE_HWMON_MAX_PWM]; -+ struct iei_wt61p803_puzzle_thermal_cooling_device -+ *cdev[IEI_WT61P803_PUZZLE_HWMON_MAX_PWM]; -+ struct mutex lock; /* mutex to protect response_buffer array */ -+}; -+ -+#define raw_temp_to_milidegree_celsius(x) (((x) - 0x80) * 1000) -+static int iei_wt61p803_puzzle_read_temp_sensor(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, -+ int channel, long *value) -+{ -+ unsigned char *resp_buf = mcu_hwmon->response_buffer; -+ unsigned char temp_sensor_ntc_cmd[4] = { -+ IEI_WT61P803_PUZZLE_CMD_HEADER_START, -+ IEI_WT61P803_PUZZLE_CMD_TEMP, -+ IEI_WT61P803_PUZZLE_CMD_TEMP_ALL, -+ }; -+ size_t reply_size; -+ int ret; -+ -+ mutex_lock(&mcu_hwmon->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, temp_sensor_ntc_cmd, -+ sizeof(temp_sensor_ntc_cmd), resp_buf, -+ &reply_size); -+ if (ret) -+ goto exit; -+ -+ if (reply_size != 7) { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ /* Check the number of NTC values */ -+ if (resp_buf[3] != '2') { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ *value = raw_temp_to_milidegree_celsius(resp_buf[4 + channel]); -+exit: -+ mutex_unlock(&mcu_hwmon->lock); -+ return ret; -+} -+ -+#define raw_fan_val_to_rpm(x, y) ((((x) << 8 | (y)) / 2) * 60) -+static int iei_wt61p803_puzzle_read_fan_speed(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, -+ int channel, long *value) -+{ -+ unsigned char *resp_buf = mcu_hwmon->response_buffer; -+ unsigned char fan_speed_cmd[4] = {}; -+ size_t reply_size; -+ int ret; -+ -+ fan_speed_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ fan_speed_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; -+ fan_speed_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_RPM(channel); -+ -+ mutex_lock(&mcu_hwmon->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, fan_speed_cmd, -+ sizeof(fan_speed_cmd), resp_buf, -+ &reply_size); -+ if (ret) -+ goto exit; -+ -+ if (reply_size != 7) { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ *value = raw_fan_val_to_rpm(resp_buf[3], resp_buf[4]); -+exit: -+ mutex_unlock(&mcu_hwmon->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_write_pwm_channel(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, -+ int channel, long pwm_set_val) -+{ -+ unsigned char *resp_buf = mcu_hwmon->response_buffer; -+ unsigned char pwm_set_cmd[6] = {}; -+ size_t reply_size; -+ int ret; -+ -+ pwm_set_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ pwm_set_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; -+ pwm_set_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM_WRITE; -+ pwm_set_cmd[3] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM(channel); -+ pwm_set_cmd[4] = pwm_set_val; -+ -+ mutex_lock(&mcu_hwmon->lock); -+ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, pwm_set_cmd, -+ sizeof(pwm_set_cmd), resp_buf, -+ &reply_size); -+ if (ret) -+ goto exit; -+ -+ if (reply_size != 3) { -+ ret = -EIO; -+ goto exit; -+ } -+ -+ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && -+ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { -+ ret = -EIO; -+ goto exit; -+ } -+exit: -+ mutex_unlock(&mcu_hwmon->lock); -+ return ret; -+} -+ -+static int iei_wt61p803_puzzle_read_pwm_channel(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, -+ int channel, long *value) -+{ -+ unsigned char *resp_buf = mcu_hwmon->response_buffer; -+ unsigned char pwm_get_cmd[5] = {}; -+ size_t reply_size; -+ int ret; -+ -+ pwm_get_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ pwm_get_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; -+ pwm_get_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ; -+ pwm_get_cmd[3] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM(channel); -+ -+ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, pwm_get_cmd, -+ sizeof(pwm_get_cmd), resp_buf, -+ &reply_size); -+ if (ret) -+ return ret; -+ -+ if (reply_size != 5) -+ return -EIO; -+ -+ if (resp_buf[2] != IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ) -+ return -EIO; -+ -+ *value = resp_buf[3]; -+ -+ return 0; -+} -+ -+static int iei_wt61p803_puzzle_read(struct device *dev, enum hwmon_sensor_types type, -+ u32 attr, int channel, long *val) -+{ -+ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = dev_get_drvdata(dev->parent); -+ -+ switch (type) { -+ case hwmon_pwm: -+ return iei_wt61p803_puzzle_read_pwm_channel(mcu_hwmon, channel, val); -+ case hwmon_fan: -+ return iei_wt61p803_puzzle_read_fan_speed(mcu_hwmon, channel, val); -+ case hwmon_temp: -+ return iei_wt61p803_puzzle_read_temp_sensor(mcu_hwmon, channel, val); -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int iei_wt61p803_puzzle_write(struct device *dev, enum hwmon_sensor_types type, -+ u32 attr, int channel, long val) -+{ -+ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = dev_get_drvdata(dev->parent); -+ -+ return iei_wt61p803_puzzle_write_pwm_channel(mcu_hwmon, channel, val); -+} -+ -+static umode_t iei_wt61p803_puzzle_is_visible(const void *data, enum hwmon_sensor_types type, -+ u32 attr, int channel) -+{ -+ const struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = data; -+ -+ switch (type) { -+ case hwmon_pwm: -+ if (mcu_hwmon->thermal_cooling_dev_present[channel]) -+ return 0444; -+ if (attr == hwmon_pwm_input) -+ return 0644; -+ break; -+ case hwmon_fan: -+ if (attr == hwmon_fan_input) -+ return 0444; -+ break; -+ case hwmon_temp: -+ if (attr == hwmon_temp_input) -+ return 0444; -+ break; -+ default: -+ return 0; -+ } -+ -+ return 0; -+} -+ -+static const struct hwmon_ops iei_wt61p803_puzzle_hwmon_ops = { -+ .is_visible = iei_wt61p803_puzzle_is_visible, -+ .read = iei_wt61p803_puzzle_read, -+ .write = iei_wt61p803_puzzle_write, -+}; -+ -+static const struct hwmon_channel_info *iei_wt61p803_puzzle_info[] = { -+ HWMON_CHANNEL_INFO(pwm, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT), -+ HWMON_CHANNEL_INFO(fan, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT), -+ HWMON_CHANNEL_INFO(temp, -+ HWMON_T_INPUT, -+ HWMON_T_INPUT), -+ NULL -+}; -+ -+static const struct hwmon_chip_info iei_wt61p803_puzzle_chip_info = { -+ .ops = &iei_wt61p803_puzzle_hwmon_ops, -+ .info = iei_wt61p803_puzzle_info, -+}; -+ -+static int iei_wt61p803_puzzle_get_max_state(struct thermal_cooling_device *tcdev, -+ unsigned long *state) -+{ -+ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; -+ -+ if (!cdev) -+ return -EINVAL; -+ -+ *state = cdev->num_levels - 1; -+ return 0; -+} -+ -+static int iei_wt61p803_puzzle_get_cur_state(struct thermal_cooling_device *tcdev, -+ unsigned long *state) -+{ -+ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; -+ -+ if (!cdev) -+ return -EINVAL; -+ -+ if (cdev->cur_level < 0) -+ return -EAGAIN; -+ -+ *state = cdev->cur_level; -+ return 0; -+} -+ -+static int iei_wt61p803_puzzle_set_cur_state(struct thermal_cooling_device *tcdev, -+ unsigned long state) -+{ -+ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; -+ u8 pwm_level; -+ -+ if (!cdev) -+ return -EINVAL; -+ -+ if (state >= cdev->num_levels) -+ return -EINVAL; -+ -+ if (state == cdev->cur_level) -+ return 0; -+ -+ cdev->cur_level = state; -+ pwm_level = cdev->cooling_levels[state]; -+ -+ return iei_wt61p803_puzzle_write_pwm_channel(cdev->mcu_hwmon, cdev->pwm_channel, pwm_level); -+} -+ -+static const struct thermal_cooling_device_ops iei_wt61p803_puzzle_cooling_ops = { -+ .get_max_state = iei_wt61p803_puzzle_get_max_state, -+ .get_cur_state = iei_wt61p803_puzzle_get_cur_state, -+ .set_cur_state = iei_wt61p803_puzzle_set_cur_state, -+}; -+ -+static int -+iei_wt61p803_puzzle_enable_thermal_cooling_dev(struct device *dev, -+ struct fwnode_handle *child, -+ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon) -+{ -+ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev; -+ u32 pwm_channel; -+ u8 num_levels; -+ int i, ret; -+ -+ ret = fwnode_property_read_u32(child, "reg", &pwm_channel); -+ if (ret) -+ return ret; -+ -+ mcu_hwmon->thermal_cooling_dev_present[pwm_channel] = true; -+ -+ num_levels = fwnode_property_count_u32(child, "cooling-levels"); -+ if (!num_levels) -+ return -EINVAL; -+ -+ cdev = devm_kzalloc(dev, sizeof(*cdev), GFP_KERNEL); -+ if (!cdev) -+ return -ENOMEM; -+ -+ cdev->cooling_levels = devm_kmalloc_array(dev, num_levels, sizeof(u32), GFP_KERNEL); -+ if (!cdev->cooling_levels) -+ return -ENOMEM; -+ -+ ret = fwnode_property_read_u32_array(child, "cooling-levels", -+ cdev->cooling_levels, -+ num_levels); -+ if (ret) { -+ dev_err(dev, "Couldn't read property 'cooling-levels'\n"); -+ return ret; -+ } -+ -+ for (i = 0; i < num_levels; i++) { -+ if (cdev->cooling_levels[i] > -+ IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL) { -+ dev_err(dev, "iei_wt61p803_fan state[%d]:%d > %d\n", i, -+ cdev->cooling_levels[i], -+ IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL); -+ return -EINVAL; -+ } -+ } -+ -+ cdev->mcu_hwmon = mcu_hwmon; -+ cdev->pwm_channel = pwm_channel; -+ cdev->num_levels = num_levels; -+ cdev->cur_level = -1; -+ mcu_hwmon->cdev[pwm_channel] = cdev; -+ -+ snprintf(cdev->name, THERMAL_NAME_LENGTH, "wt61p803_puzzle_%d", pwm_channel); -+ cdev->tcdev = devm_thermal_of_cooling_device_register(dev, to_of_node(child), cdev->name, -+ cdev, &iei_wt61p803_puzzle_cooling_ops); -+ if (IS_ERR(cdev->tcdev)) -+ return PTR_ERR(cdev->tcdev); -+ -+ return 0; -+} -+ -+static int iei_wt61p803_puzzle_hwmon_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); -+ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon; -+ struct fwnode_handle *child; -+ struct device *hwmon_dev; -+ int ret; -+ -+ mcu_hwmon = devm_kzalloc(dev, sizeof(*mcu_hwmon), GFP_KERNEL); -+ if (!mcu_hwmon) -+ return -ENOMEM; -+ -+ mcu_hwmon->mcu = mcu; -+ platform_set_drvdata(pdev, mcu_hwmon); -+ mutex_init(&mcu_hwmon->lock); -+ -+ hwmon_dev = devm_hwmon_device_register_with_info(dev, "iei_wt61p803_puzzle", -+ mcu_hwmon, -+ &iei_wt61p803_puzzle_chip_info, -+ NULL); -+ if (IS_ERR(hwmon_dev)) -+ return PTR_ERR(hwmon_dev); -+ -+ /* Control fans via PWM lines via Linux Kernel */ -+ if (IS_ENABLED(CONFIG_THERMAL)) { -+ device_for_each_child_node(dev, child) { -+ ret = iei_wt61p803_puzzle_enable_thermal_cooling_dev(dev, child, mcu_hwmon); -+ if (ret) { -+ dev_err(dev, "Enabling the PWM fan failed\n"); -+ fwnode_handle_put(child); -+ return ret; -+ } -+ } -+ } -+ return 0; -+} -+ -+static const struct of_device_id iei_wt61p803_puzzle_hwmon_id_table[] = { -+ { .compatible = "iei,wt61p803-puzzle-hwmon" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_hwmon_id_table); -+ -+static struct platform_driver iei_wt61p803_puzzle_hwmon_driver = { -+ .driver = { -+ .name = "iei-wt61p803-puzzle-hwmon", -+ .of_match_table = iei_wt61p803_puzzle_hwmon_id_table, -+ }, -+ .probe = iei_wt61p803_puzzle_hwmon_probe, -+}; -+ -+module_platform_driver(iei_wt61p803_puzzle_hwmon_driver); -+ -+MODULE_DESCRIPTION("IEI WT61P803 PUZZLE MCU HWMON Driver"); -+MODULE_AUTHOR("Luka Kovacic "); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/mvebu/patches-5.15/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch b/target/linux/mvebu/patches-5.15/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch deleted file mode 100644 index 8192d1998bfbc3..00000000000000 --- a/target/linux/mvebu/patches-5.15/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch +++ /dev/null @@ -1,207 +0,0 @@ -From f3b44eb69cc561cf05d00506dcec0dd9be003ed8 Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:35 +0000 -Subject: [PATCH 4/7] drivers: leds: Add the IEI WT61P803 PUZZLE LED driver - -Add support for the IEI WT61P803 PUZZLE LED driver. -Currently only the front panel power LED is supported, -since it is the only LED on this board wired through the -MCU. - -The LED is wired directly to the on-board MCU controller -and is toggled using an MCU command. - -Support for more LEDs is going to be added in case more -boards implement this microcontroller, as LEDs use many -different GPIOs. - -This driver depends on the IEI WT61P803 PUZZLE MFD driver. - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Cc: Luka Perkov -Cc: Robert Marko ---- - drivers/leds/Kconfig | 8 ++ - drivers/leds/Makefile | 1 + - drivers/leds/leds-iei-wt61p803-puzzle.c | 147 ++++++++++++++++++++++++ - 3 files changed, 156 insertions(+) - create mode 100644 drivers/leds/leds-iei-wt61p803-puzzle.c - ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -307,6 +307,14 @@ config LEDS_IPAQ_MICRO - Choose this option if you want to use the notification LED on - Compaq/HP iPAQ h3100 and h3600. - -+config LEDS_IEI_WT61P803_PUZZLE -+ tristate "LED Support for the IEI WT61P803 PUZZLE MCU" -+ depends on LEDS_CLASS -+ depends on MFD_IEI_WT61P803_PUZZLE -+ help -+ This option enables support for LEDs controlled by the IEI WT61P803 -+ M801 MCU. -+ - config LEDS_HP6XX - tristate "LED Support for the HP Jornada 6xx" - depends on LEDS_CLASS ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -33,6 +33,7 @@ obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx. - obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o - obj-$(CONFIG_LEDS_IP30) += leds-ip30.o - obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o -+obj-$(CONFIG_LEDS_IEI_WT61P803_PUZZLE) += leds-iei-wt61p803-puzzle.o - obj-$(CONFIG_LEDS_IS31FL319X) += leds-is31fl319x.o - obj-$(CONFIG_LEDS_IS31FL32XX) += leds-is31fl32xx.o - obj-$(CONFIG_LEDS_LM3530) += leds-lm3530.o ---- /dev/null -+++ b/drivers/leds/leds-iei-wt61p803-puzzle.c -@@ -0,0 +1,147 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* IEI WT61P803 PUZZLE MCU LED Driver -+ * -+ * Copyright (C) 2020 Sartura Ltd. -+ * Author: Luka Kovacic -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+enum iei_wt61p803_puzzle_led_state { -+ IEI_LED_OFF = 0x30, -+ IEI_LED_ON = 0x31, -+ IEI_LED_BLINK_5HZ = 0x32, -+ IEI_LED_BLINK_1HZ = 0x33, -+}; -+ -+/** -+ * struct iei_wt61p803_puzzle_led - MCU LED Driver -+ * @cdev: LED classdev -+ * @mcu: MCU struct pointer -+ * @response_buffer Global MCU response buffer -+ * @lock: General mutex lock to protect simultaneous R/W access to led_power_state -+ * @led_power_state: State of the front panel power LED -+ */ -+struct iei_wt61p803_puzzle_led { -+ struct led_classdev cdev; -+ struct iei_wt61p803_puzzle *mcu; -+ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; -+ struct mutex lock; /* mutex to protect led_power_state */ -+ int led_power_state; -+}; -+ -+static inline struct iei_wt61p803_puzzle_led *cdev_to_iei_wt61p803_puzzle_led -+ (struct led_classdev *led_cdev) -+{ -+ return container_of(led_cdev, struct iei_wt61p803_puzzle_led, cdev); -+} -+ -+static int iei_wt61p803_puzzle_led_brightness_set_blocking(struct led_classdev *cdev, -+ enum led_brightness brightness) -+{ -+ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); -+ unsigned char *resp_buf = priv->response_buffer; -+ unsigned char led_power_cmd[5] = {}; -+ size_t reply_size; -+ int ret; -+ -+ led_power_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ led_power_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; -+ led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_POWER; -+ led_power_cmd[3] = brightness == LED_OFF ? IEI_LED_OFF : IEI_LED_ON; -+ -+ ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd, -+ sizeof(led_power_cmd), -+ resp_buf, -+ &reply_size); -+ if (ret) -+ return ret; -+ -+ if (reply_size != 3) -+ return -EIO; -+ -+ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && -+ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) -+ return -EIO; -+ -+ mutex_lock(&priv->lock); -+ priv->led_power_state = brightness; -+ mutex_unlock(&priv->lock); -+ -+ return 0; -+} -+ -+static enum led_brightness iei_wt61p803_puzzle_led_brightness_get(struct led_classdev *cdev) -+{ -+ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); -+ int led_state; -+ -+ mutex_lock(&priv->lock); -+ led_state = priv->led_power_state; -+ mutex_unlock(&priv->lock); -+ -+ return led_state; -+} -+ -+static int iei_wt61p803_puzzle_led_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); -+ struct iei_wt61p803_puzzle_led *priv; -+ struct led_init_data init_data = {}; -+ struct fwnode_handle *child; -+ int ret; -+ -+ if (device_get_child_node_count(dev) != 1) -+ return -EINVAL; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->mcu = mcu; -+ priv->led_power_state = 1; -+ mutex_init(&priv->lock); -+ dev_set_drvdata(dev, priv); -+ -+ child = device_get_next_child_node(dev, NULL); -+ init_data.fwnode = child; -+ -+ priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; -+ priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; -+ priv->cdev.max_brightness = 1; -+ -+ ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); -+ if (ret) -+ dev_err(dev, "Could not register LED\n"); -+ -+ fwnode_handle_put(child); -+ return ret; -+} -+ -+static const struct of_device_id iei_wt61p803_puzzle_led_of_match[] = { -+ { .compatible = "iei,wt61p803-puzzle-leds" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_led_of_match); -+ -+static struct platform_driver iei_wt61p803_puzzle_led_driver = { -+ .driver = { -+ .name = "iei-wt61p803-puzzle-led", -+ .of_match_table = iei_wt61p803_puzzle_led_of_match, -+ }, -+ .probe = iei_wt61p803_puzzle_led_probe, -+}; -+module_platform_driver(iei_wt61p803_puzzle_led_driver); -+ -+MODULE_DESCRIPTION("IEI WT61P803 PUZZLE front panel LED driver"); -+MODULE_AUTHOR("Luka Kovacic "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:leds-iei-wt61p803-puzzle"); diff --git a/target/linux/mvebu/patches-5.15/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch b/target/linux/mvebu/patches-5.15/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch deleted file mode 100644 index b1d420ef0a90a6..00000000000000 --- a/target/linux/mvebu/patches-5.15/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 2fab3b4956c5b2f83c1e1abffc1df39de2933d83 Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:36 +0000 -Subject: [PATCH 5/7] Documentation/ABI: Add iei-wt61p803-puzzle driver sysfs - interface documentation - -Add the iei-wt61p803-puzzle driver sysfs interface documentation to allow -monitoring and control of the microcontroller from user space. - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Cc: Luka Perkov -Cc: Robert Marko ---- - .../testing/sysfs-driver-iei-wt61p803-puzzle | 61 +++++++++++++++++++ - 1 file changed, 61 insertions(+) - create mode 100644 Documentation/ABI/testing/sysfs-driver-iei-wt61p803-puzzle - ---- /dev/null -+++ b/Documentation/ABI/testing/sysfs-driver-iei-wt61p803-puzzle -@@ -0,0 +1,61 @@ -+What: /sys/bus/serial/devices/.../mac_address_* -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RW) Internal factory assigned MAC address values -+ -+What: /sys/bus/serial/devices/.../serial_number -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RW) Internal factory assigned serial number -+ -+What: /sys/bus/serial/devices/.../version -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RO) Internal MCU firmware version -+ -+What: /sys/bus/serial/devices/.../protocol_version -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RO) Internal MCU communication protocol version -+ -+What: /sys/bus/serial/devices/.../power_loss_recovery -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RW) Host platform power loss recovery settings -+ Value mapping: 0 - Always-On, 1 - Always-Off, 2 - Always-AC, 3 - Always-WA -+ -+What: /sys/bus/serial/devices/.../bootloader_mode -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RO) Internal MCU bootloader mode status -+ Value mapping: -+ 0 - normal mode -+ 1 - bootloader mode -+ -+What: /sys/bus/serial/devices/.../power_status -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RO) Power status indicates the host platform power on method. -+ Value mapping (bitwise list): -+ 0x80 - Null -+ 0x40 - Firmware flag -+ 0x20 - Power loss detection flag (powered off) -+ 0x10 - Power loss detection flag (AC mode) -+ 0x08 - Button power on -+ 0x04 - Wake-on-LAN power on -+ 0x02 - RTC alarm power on -+ 0x01 - AC recover power on -+ -+What: /sys/bus/serial/devices/.../build_info -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RO) Internal MCU firmware build date -+ Format: yyyy/mm/dd hh:mm -+ -+What: /sys/bus/serial/devices/.../ac_recovery_status -+Date: September 2020 -+Contact: Luka Kovacic -+Description: (RO) Host platform AC recovery status value -+ Value mapping: -+ 0 - board has not been recovered from power down -+ 1 - board has been recovered from power down diff --git a/target/linux/mvebu/patches-5.15/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch b/target/linux/mvebu/patches-5.15/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch deleted file mode 100644 index 9015436f6a4c9c..00000000000000 --- a/target/linux/mvebu/patches-5.15/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 0aff3e5923fecc6842473ad07a688d6e2f2c2d55 Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:37 +0000 -Subject: [PATCH 6/7] Documentation/hwmon: Add iei-wt61p803-puzzle hwmon driver - documentation - -Add the iei-wt61p803-puzzle driver hwmon driver interface documentation. - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Cc: Luka Perkov -Cc: Robert Marko ---- - .../hwmon/iei-wt61p803-puzzle-hwmon.rst | 43 +++++++++++++++++++ - Documentation/hwmon/index.rst | 1 + - 2 files changed, 44 insertions(+) - create mode 100644 Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst - ---- /dev/null -+++ b/Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst -@@ -0,0 +1,43 @@ -+.. SPDX-License-Identifier: GPL-2.0-only -+ -+Kernel driver iei-wt61p803-puzzle-hwmon -+======================================= -+ -+Supported chips: -+ * IEI WT61P803 PUZZLE for IEI Puzzle M801 -+ -+ Prefix: 'iei-wt61p803-puzzle-hwmon' -+ -+Author: Luka Kovacic -+ -+ -+Description -+----------- -+ -+This driver adds fan and temperature sensor reading for some IEI Puzzle -+series boards. -+ -+Sysfs attributes -+---------------- -+ -+The following attributes are supported: -+ -+- IEI WT61P803 PUZZLE for IEI Puzzle M801 -+ -+/sys files in hwmon subsystem -+----------------------------- -+ -+================= == ===================================================== -+fan[1-5]_input RO files for fan speed (in RPM) -+pwm[1-2] RW files for fan[1-2] target duty cycle (0..255) -+temp[1-2]_input RO files for temperature sensors, in millidegree Celsius -+================= == ===================================================== -+ -+/sys files in thermal subsystem -+------------------------------- -+ -+================= == ===================================================== -+cur_state RW file for current cooling state of the cooling device -+ (0..max_state) -+max_state RO file for maximum cooling state of the cooling device -+================= == ===================================================== ---- a/Documentation/hwmon/index.rst -+++ b/Documentation/hwmon/index.rst -@@ -74,6 +74,7 @@ Hardware Monitoring Kernel Drivers - ibmaem - ibm-cffps - ibmpowernv -+ iei-wt61p803-puzzle-hwmon - ina209 - ina2xx - ina3221 diff --git a/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch b/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch deleted file mode 100644 index 0b6891343d2106..00000000000000 --- a/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 12479baad28d2a08c6cb9e83471057635fa1635c Mon Sep 17 00:00:00 2001 -From: Luka Kovacic -Date: Tue, 24 Aug 2021 12:44:38 +0000 -Subject: [PATCH 7/7] MAINTAINERS: Add an entry for the IEI WT61P803 PUZZLE - driver - -Add an entry for the IEI WT61P803 PUZZLE driver (MFD, HWMON, LED drivers). - -Signed-off-by: Luka Kovacic -Signed-off-by: Pavo Banicevic -Cc: Luka Perkov -Cc: Robert Marko ---- - MAINTAINERS | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -9057,6 +9057,22 @@ F: include/net/nl802154.h - F: net/ieee802154/ - F: net/mac802154/ - -+IEI WT61P803 M801 MFD DRIVER -+M: Luka Kovacic -+M: Luka Perkov -+M: Goran Medic -+L: linux-kernel@vger.kernel.org -+S: Maintained -+F: Documentation/ABI/stable/sysfs-driver-iei-wt61p803-puzzle -+F: Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml -+F: Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml -+F: Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml -+F: Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst -+F: drivers/hwmon/iei-wt61p803-puzzle-hwmon.c -+F: drivers/leds/leds-iei-wt61p803-puzzle.c -+F: drivers/mfd/iei-wt61p803-puzzle.c -+F: include/linux/mfd/iei-wt61p803-puzzle.h -+ - IFE PROTOCOL - M: Yotam Gigi - M: Jamal Hadi Salim diff --git a/target/linux/mvebu/patches-5.15/910-drivers-leds-wt61p803-puzzle-improvements.patch b/target/linux/mvebu/patches-5.15/910-drivers-leds-wt61p803-puzzle-improvements.patch deleted file mode 100644 index 150a65498cd3d4..00000000000000 --- a/target/linux/mvebu/patches-5.15/910-drivers-leds-wt61p803-puzzle-improvements.patch +++ /dev/null @@ -1,271 +0,0 @@ ---- a/drivers/leds/leds-iei-wt61p803-puzzle.c -+++ b/drivers/leds/leds-iei-wt61p803-puzzle.c -@@ -9,9 +9,13 @@ - #include - #include - #include -+#include - #include - #include - #include -+#include -+ -+#define IEI_LEDS_MAX 4 - - enum iei_wt61p803_puzzle_led_state { - IEI_LED_OFF = 0x30, -@@ -33,7 +37,11 @@ struct iei_wt61p803_puzzle_led { - struct iei_wt61p803_puzzle *mcu; - unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; - struct mutex lock; /* mutex to protect led_power_state */ -+ struct work_struct work; - int led_power_state; -+ int id; -+ u8 blinking; -+ bool active_low; - }; - - static inline struct iei_wt61p803_puzzle_led *cdev_to_iei_wt61p803_puzzle_led -@@ -51,10 +59,18 @@ static int iei_wt61p803_puzzle_led_brigh - size_t reply_size; - int ret; - -+ if (priv->blinking) { -+ if (brightness == LED_OFF) -+ priv->blinking = 0; -+ else -+ return 0; -+ } -+ - led_power_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; - led_power_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; -- led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_POWER; -- led_power_cmd[3] = brightness == LED_OFF ? IEI_LED_OFF : IEI_LED_ON; -+ led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_SET(priv->id); -+ led_power_cmd[3] = ((brightness == LED_OFF) ^ priv->active_low) ? -+ IEI_LED_OFF : priv->blinking?priv->blinking:IEI_LED_ON; - - ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd, - sizeof(led_power_cmd), -@@ -90,39 +106,166 @@ static enum led_brightness iei_wt61p803_ - return led_state; - } - -+static void iei_wt61p803_puzzle_led_apply_blink(struct work_struct *work) -+{ -+ struct iei_wt61p803_puzzle_led *priv = container_of(work, struct iei_wt61p803_puzzle_led, work); -+ unsigned char led_blink_cmd[5] = {}; -+ unsigned char resp_buf[IEI_WT61P803_PUZZLE_BUF_SIZE]; -+ size_t reply_size; -+ -+ led_blink_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; -+ led_blink_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; -+ led_blink_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_SET(priv->id); -+ led_blink_cmd[3] = priv->blinking; -+ -+ iei_wt61p803_puzzle_write_command(priv->mcu, led_blink_cmd, -+ sizeof(led_blink_cmd), -+ resp_buf, -+ &reply_size); -+ -+ return; -+} -+ -+static int iei_wt61p803_puzzle_led_set_blink(struct led_classdev *cdev, -+ unsigned long *delay_on, -+ unsigned long *delay_off) -+{ -+ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); -+ u8 blink_mode = 0; -+ int ret = 0; -+ -+ /* set defaults */ -+ if (!*delay_on && !*delay_off) { -+ *delay_on = 500; -+ *delay_off = 500; -+ } -+ -+ /* minimum delay for soft-driven blinking is 100ms to keep load low */ -+ if (*delay_on < 100) -+ *delay_on = 100; -+ -+ if (*delay_off < 100) -+ *delay_off = 100; -+ -+ /* offload blinking to hardware, if possible */ -+ if (*delay_on != *delay_off) { -+ ret = -EINVAL; -+ } else if (*delay_on == 100) { -+ blink_mode = IEI_LED_BLINK_5HZ; -+ *delay_on = 100; -+ *delay_off = 100; -+ } else if (*delay_on <= 500) { -+ blink_mode = IEI_LED_BLINK_1HZ; -+ *delay_on = 500; -+ *delay_off = 500; -+ } else { -+ ret = -EINVAL; -+ } -+ -+ mutex_lock(&priv->lock); -+ priv->blinking = blink_mode; -+ mutex_unlock(&priv->lock); -+ -+ if (blink_mode) -+ schedule_work(&priv->work); -+ -+ return ret; -+} -+ -+ -+static int iei_wt61p803_puzzle_led_set_dt_default(struct led_classdev *cdev, -+ struct device_node *np) -+{ -+ const char *state; -+ int ret = 0; -+ -+ state = of_get_property(np, "default-state", NULL); -+ if (state) { -+ if (!strcmp(state, "on")) { -+ ret = -+ iei_wt61p803_puzzle_led_brightness_set_blocking( -+ cdev, cdev->max_brightness); -+ } else { -+ ret = iei_wt61p803_puzzle_led_brightness_set_blocking( -+ cdev, LED_OFF); -+ } -+ } -+ -+ return ret; -+} -+ - static int iei_wt61p803_puzzle_led_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -+ struct device_node *np = dev_of_node(dev); -+ struct device_node *child; - struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); - struct iei_wt61p803_puzzle_led *priv; -- struct led_init_data init_data = {}; -- struct fwnode_handle *child; - int ret; -+ u32 reg; - -- if (device_get_child_node_count(dev) != 1) -+ if (device_get_child_node_count(dev) > IEI_LEDS_MAX) - return -EINVAL; - -- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -- if (!priv) -- return -ENOMEM; -- -- priv->mcu = mcu; -- priv->led_power_state = 1; -- mutex_init(&priv->lock); -- dev_set_drvdata(dev, priv); -- -- child = device_get_next_child_node(dev, NULL); -- init_data.fwnode = child; -- -- priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; -- priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; -- priv->cdev.max_brightness = 1; -+ for_each_available_child_of_node(np, child) { -+ struct led_init_data init_data = {}; - -- ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); -- if (ret) -- dev_err(dev, "Could not register LED\n"); -+ ret = of_property_read_u32(child, "reg", ®); -+ if (ret) { -+ dev_err(dev, "Failed to read led 'reg' property\n"); -+ goto put_child_node; -+ } -+ -+ if (reg > IEI_LEDS_MAX) { -+ dev_err(dev, "Invalid led reg %u\n", reg); -+ ret = -EINVAL; -+ goto put_child_node; -+ } -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) { -+ ret = -ENOMEM; -+ goto put_child_node; -+ } -+ -+ mutex_init(&priv->lock); -+ -+ dev_set_drvdata(dev, priv); -+ -+ if (of_property_read_bool(child, "active-low")) -+ priv->active_low = true; -+ -+ priv->mcu = mcu; -+ priv->id = reg; -+ priv->led_power_state = 1; -+ priv->blinking = 0; -+ init_data.fwnode = of_fwnode_handle(child); -+ -+ priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; -+ priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; -+ priv->cdev.blink_set = iei_wt61p803_puzzle_led_set_blink; -+ -+ priv->cdev.max_brightness = 1; -+ -+ INIT_WORK(&priv->work, iei_wt61p803_puzzle_led_apply_blink); -+ -+ ret = iei_wt61p803_puzzle_led_set_dt_default(&priv->cdev, child); -+ if (ret) { -+ dev_err(dev, "Could apply default from DT\n"); -+ goto put_child_node; -+ } -+ -+ ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); -+ if (ret) { -+ dev_err(dev, "Could not register LED\n"); -+ goto put_child_node; -+ } -+ } -+ -+ return ret; - -- fwnode_handle_put(child); -+put_child_node: -+ of_node_put(child); - return ret; - } - ---- a/include/linux/mfd/iei-wt61p803-puzzle.h -+++ b/include/linux/mfd/iei-wt61p803-puzzle.h -@@ -36,7 +36,7 @@ - #define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS 0x41 /* A */ - - #define IEI_WT61P803_PUZZLE_CMD_LED 0x52 /* R */ --#define IEI_WT61P803_PUZZLE_CMD_LED_POWER 0x31 /* 1 */ -+#define IEI_WT61P803_PUZZLE_CMD_LED_SET(n) (0x30 | (n)) - - #define IEI_WT61P803_PUZZLE_CMD_TEMP 0x54 /* T */ - #define IEI_WT61P803_PUZZLE_CMD_TEMP_ALL 0x41 /* A */ ---- a/drivers/mfd/iei-wt61p803-puzzle.c -+++ b/drivers/mfd/iei-wt61p803-puzzle.c -@@ -176,6 +176,9 @@ static int iei_wt61p803_puzzle_recv_buf( - struct iei_wt61p803_puzzle *mcu = serdev_device_get_drvdata(serdev); - int ret; - -+ print_hex_dump_debug("puzzle-mcu rx: ", DUMP_PREFIX_NONE, -+ 16, 1, data, size, false); -+ - ret = iei_wt61p803_puzzle_process_resp(mcu, data, size); - /* Return the number of processed bytes if function returns error, - * discard the remaining incoming data, since the frame this data -@@ -246,6 +249,9 @@ int iei_wt61p803_puzzle_write_command(st - - cmd[size - 1] = iei_wt61p803_puzzle_checksum(cmd, size - 1); - -+ print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE, -+ 16, 1, cmd, size, false); -+ - /* Initialize reply struct */ - reinit_completion(&mcu->reply->received); - mcu->reply->size = 0; diff --git a/target/linux/mvebu/patches-5.15/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch b/target/linux/mvebu/patches-5.15/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch deleted file mode 100644 index 2f0b1788ff68f2..00000000000000 --- a/target/linux/mvebu/patches-5.15/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch +++ /dev/null @@ -1,63 +0,0 @@ ---- a/drivers/mfd/iei-wt61p803-puzzle.c -+++ b/drivers/mfd/iei-wt61p803-puzzle.c -@@ -241,6 +241,7 @@ int iei_wt61p803_puzzle_write_command(st - { - struct device *dev = &mcu->serdev->dev; - int ret; -+ int retries; - - if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH) - return -EINVAL; -@@ -252,24 +253,36 @@ int iei_wt61p803_puzzle_write_command(st - print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE, - 16, 1, cmd, size, false); - -+ retries = 3; - /* Initialize reply struct */ -- reinit_completion(&mcu->reply->received); -- mcu->reply->size = 0; -- usleep_range(2000, 10000); -- serdev_device_write_flush(mcu->serdev); -- ret = serdev_device_write_buf(mcu->serdev, cmd, size); -- if (ret < 0) -- goto exit; -- -- serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); -- ret = wait_for_completion_timeout(&mcu->reply->received, -- IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); -- if (ret == 0) { -- dev_err(dev, "Command reply receive timeout\n"); -- ret = -ETIMEDOUT; -- goto exit; -+ while (retries) { -+ reinit_completion(&mcu->reply->received); -+ mcu->reply->size = 0; -+ usleep_range(2000, 10000); -+ serdev_device_write_flush(mcu->serdev); -+ ret = serdev_device_write_buf(mcu->serdev, cmd, size); -+ if (ret < 0) -+ goto exit; -+ -+ serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); -+ ret = wait_for_completion_timeout(&mcu->reply->received, -+ IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); -+ retries--; -+ if (ret == 0) { -+ if (retries == 0) { -+ dev_err(dev, "Command reply receive timeout\n"); -+ ret = -ETIMEDOUT; -+ goto exit; -+ } -+ } -+ else { -+ if (mcu->reply->data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && -+ mcu->reply->data[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && -+ mcu->reply->data[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK) { -+ break; -+ } -+ } - } -- - *reply_size = mcu->reply->size; - /* Copy the received data, as it will not be available after a new frame is received */ - memcpy(reply_data, mcu->reply->data, mcu->reply->size); From 5fe80218f914ce88a6e859771291e1dccb5784bf Mon Sep 17 00:00:00 2001 From: John Audia Date: Fri, 16 Feb 2024 16:57:53 -0500 Subject: [PATCH 10/25] kernel: bump 6.1 to 6.1.78 Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.78 Manually rebased: bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch All other patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne, ramips/tplink_archer-a6-v3, logic/xiaomi_redmi-router-ax6000-ubootmod Run-tested: x86/64/AMD Cezanne, ramips/tplink_archer-a6-v3, logic/xiaomi_redmi-router-ax6000-ubootmod Signed-off-by: John Audia --- include/kernel-6.1 | 4 ++-- ...support-for-all-the-downstream-rpi-sound-card-dr.patch | 8 ++++---- ...0-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch | 2 +- ...-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch | 2 +- .../patches-6.1/202-linksys-find-active-root.patch | 4 ++-- target/linux/mvebu/patches-6.1/400-find_active_root.patch | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 64aa8ea76bdf31..95dede372aab0b 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .77 -LINUX_KERNEL_HASH-6.1.77 = 3b54ec567716cdfb3618caf38c58a8aab1372cc41c16430633febe9ccdb3f91d +LINUX_VERSION-6.1 = .78 +LINUX_KERNEL_HASH-6.1.78 = 65206b969831236849c9906eba267e715734a93808e9909fd9b4f12eea10d689 diff --git a/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch b/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch index c5e90fc8601b99..3b5bfaa7e21841 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch @@ -17615,12 +17615,12 @@ Signed-off-by: Ashish Vara * For devices with more than one control interface, we assume the --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c -@@ -2175,6 +2175,8 @@ static const struct usb_audio_quirk_flag +@@ -2087,6 +2087,8 @@ static const struct usb_audio_quirk_flag QUIRK_FLAG_FIXED_RATE), DEVICE_FLG(0x0ecb, 0x2069, /* JBL Quantum810 Wireless */ QUIRK_FLAG_FIXED_RATE), + DEVICE_FLG(0x09da, 0x2695, /* A4Tech FHD 1080p webcam */ + QUIRK_FLAG_DISABLE_AUTOSUSPEND | QUIRK_FLAG_GET_SAMPLE_RATE), - DEVICE_FLG(0x1bcf, 0x2283, /* NexiGo N930AF FHD Webcam */ - QUIRK_FLAG_GET_SAMPLE_RATE), - + DEVICE_FLG(0x0fd9, 0x0008, /* Hauppauge HVR-950Q */ + QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER), + DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */ diff --git a/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch index 2c09524dfd6b1e..e67cb66880eb03 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch @@ -362,7 +362,7 @@ Signed-off-by: Jonathan Bell int dwc3_host_init(struct dwc3 *dwc) { + struct platform_device *pdev = to_platform_device(dwc->dev); - struct property_entry props[4]; + struct property_entry props[5]; struct platform_device *xhci; int ret, irq; int prop_idx = 0; diff --git a/target/linux/generic/backport-6.1/771-v6.7-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch b/target/linux/generic/backport-6.1/771-v6.7-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch index cc8cbf5a1639ff..bce54eba4f0679 100644 --- a/target/linux/generic/backport-6.1/771-v6.7-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch +++ b/target/linux/generic/backport-6.1/771-v6.7-03-net-stmmac-increase-TX-coalesce-timer-to-5ms.patch @@ -27,7 +27,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h -@@ -286,7 +286,7 @@ struct stmmac_safety_stats { +@@ -287,7 +287,7 @@ struct stmmac_safety_stats { #define MIN_DMA_RIWT 0x10 #define DEF_DMA_RIWT 0xa0 /* Tx coalesce parameters */ diff --git a/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch b/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch index 515bb21707e3c8..5029b1791c1035 100644 --- a/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch +++ b/target/linux/kirkwood/patches-6.1/202-linksys-find-active-root.patch @@ -22,7 +22,7 @@ Signed-off-by: Imre Kaloz const char *partname; struct device_node *pp; int nr_parts, i, ret = 0; -@@ -133,9 +136,15 @@ static int parse_fixed_partitions(struct +@@ -152,9 +155,15 @@ static int parse_fixed_partitions(struct parts[i].size = of_read_number(reg + a_cells, s_cells); parts[i].of_node = pp; @@ -41,7 +41,7 @@ Signed-off-by: Imre Kaloz parts[i].name = partname; if (of_get_property(pp, "read-only", &len)) -@@ -252,6 +261,18 @@ static int __init ofpart_parser_init(voi +@@ -271,6 +280,18 @@ static int __init ofpart_parser_init(voi return 0; } diff --git a/target/linux/mvebu/patches-6.1/400-find_active_root.patch b/target/linux/mvebu/patches-6.1/400-find_active_root.patch index 5582d20c6828d2..90164adcd43d78 100644 --- a/target/linux/mvebu/patches-6.1/400-find_active_root.patch +++ b/target/linux/mvebu/patches-6.1/400-find_active_root.patch @@ -22,7 +22,7 @@ Signed-off-by: Imre Kaloz struct device_node *pp; int nr_parts, i, ret = 0; bool dedicated = true; -@@ -133,9 +136,13 @@ static int parse_fixed_partitions(struct +@@ -152,9 +155,13 @@ static int parse_fixed_partitions(struct parts[i].size = of_read_number(reg + a_cells, s_cells); parts[i].of_node = pp; @@ -39,7 +39,7 @@ Signed-off-by: Imre Kaloz parts[i].name = partname; if (of_get_property(pp, "read-only", &len)) -@@ -252,6 +259,18 @@ static int __init ofpart_parser_init(voi +@@ -271,6 +278,18 @@ static int __init ofpart_parser_init(voi return 0; } From dc685cf36e332612c39ee43b729f812fd322ebc7 Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Tue, 13 Feb 2024 11:18:03 +0100 Subject: [PATCH 11/25] imx: switch to kernel 6.1 I have this kernel running for weeks some on a lot of boards in multiple scenarios Signed-off-by: Koen Vandeputte --- target/linux/imx/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/linux/imx/Makefile b/target/linux/imx/Makefile index 5f7f9db58959af..8fd6f239509215 100644 --- a/target/linux/imx/Makefile +++ b/target/linux/imx/Makefile @@ -10,8 +10,7 @@ BOARDNAME:=NXP i.MX FEATURES:=audio display fpu gpio pcie rtc usb usbgadget squashfs targz nand ubifs boot-part rootfs-part SUBTARGETS:=cortexa7 cortexa9 -KERNEL_PATCHVER:=5.15 -KERNEL_TESTING_PATCHVER:=6.1 +KERNEL_PATCHVER:=6.1 include $(INCLUDE_DIR)/target.mk From a3a33f02cea15521f117e5ec8236fea0d143fe97 Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Tue, 13 Feb 2024 11:18:16 +0100 Subject: [PATCH 12/25] imx: remove 5.15 support Drop all 5.15 files as 6.1 is the default now Signed-off-by: Koen Vandeputte --- target/linux/imx/config-5.15 | 447 ------------------ .../linux/imx/patches-5.15/100-bootargs.patch | 11 - ...apalis-ixora-add-status-LEDs-aliases.patch | 96 ---- ...alis-ixora-make-switch3-reset-button.patch | 86 ---- ...10-ARM-dts-imx7d-pico-pi-set-aliases.patch | 24 - ...-pico-pi.dts-add-default-stdout-path.patch | 23 - 6 files changed, 687 deletions(-) delete mode 100644 target/linux/imx/config-5.15 delete mode 100644 target/linux/imx/patches-5.15/100-bootargs.patch delete mode 100644 target/linux/imx/patches-5.15/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch delete mode 100644 target/linux/imx/patches-5.15/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch delete mode 100644 target/linux/imx/patches-5.15/310-ARM-dts-imx7d-pico-pi-set-aliases.patch delete mode 100644 target/linux/imx/patches-5.15/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch diff --git a/target/linux/imx/config-5.15 b/target/linux/imx/config-5.15 deleted file mode 100644 index d3291a59973962..00000000000000 --- a/target/linux/imx/config-5.15 +++ /dev/null @@ -1,447 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MXC=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_ERRATA_814220=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -# CONFIG_ARM_IMX6Q_CPUFREQ is not set -# CONFIG_ARM_IMX_CPUFREQ_DT is not set -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASN1=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_ATA=y -CONFIG_ATAGS=y -# CONFIG_ATA_SFF is not set -CONFIG_AUTO_ZRELADDR=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_PM=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKSRC_IMX_GPT=y -CONFIG_CLKSRC_MMIO=y -# CONFIG_CLK_IMX8MM is not set -# CONFIG_CLK_IMX8MN is not set -# CONFIG_CLK_IMX8MP is not set -# CONFIG_CLK_IMX8MQ is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_THERMAL=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_BLAKE2S_ARM=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CHACHA20=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32_ARM_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_FSL_CAAM=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y -CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y -# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set -CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y -CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 -CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ENGINE=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MISC=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENCRYPTED_KEYS=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FEC=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FSL_DPAA2_SWITCH is not set -CONFIG_FSL_GUTS=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FWNODE_MDIO=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_VDSO_32=y -# CONFIG_GIANFAR is not set -CONFIG_GLOB=y -CONFIG_GPIO_CDEV=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MXC=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_SMP=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -# CONFIG_I2C_IMX_LPI2C is not set -CONFIG_I2C_SLAVE=y -# CONFIG_I2C_SLAVE_TESTUNIT is not set -CONFIG_IMX2_WDT=y -# CONFIG_IMX7ULP_WDT is not set -# CONFIG_IMX8MM_THERMAL is not set -CONFIG_IMX_DMA=y -# CONFIG_IMX_GPCV2_PM_DOMAINS is not set -CONFIG_IMX_INTMUX=y -CONFIG_IMX_IRQSTEER=y -CONFIG_IMX_SDMA=y -CONFIG_IMX_THERMAL=y -# CONFIG_IMX_WEIM is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -# CONFIG_JFFS2_FS is not set -CONFIG_KEYS=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_MXC is not set -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MPILIB=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MX3_IPU is not set -CONFIG_MXC_CLK=y -CONFIG_MXS_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_DSA_COMMON=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SELFTESTS=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -# CONFIG_NVMEM_IMX_IIM is not set -CONFIG_NVMEM_IMX_OCOTP=y -# CONFIG_NVMEM_IMX_OCOTP_ELE is not set -# CONFIG_NVMEM_SNVS_LPGPR is not set -CONFIG_NVMEM_SYSFS=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_IMX8MM is not set -# CONFIG_PINCTRL_IMX8MN is not set -# CONFIG_PINCTRL_IMX8MP is not set -# CONFIG_PINCTRL_IMX8MQ is not set -# CONFIG_PINCTRL_IMX8ULP is not set -CONFIG_PL310_ERRATA_769419=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_OPP=y -CONFIG_PPS=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PWM=y -# CONFIG_PWM_IMX1 is not set -CONFIG_PWM_IMX27=y -# CONFIG_PWM_IMX_TPM is not set -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_IMXDI is not set -# CONFIG_RTC_DRV_MXC is not set -# CONFIG_RTC_DRV_MXC_V2 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCSI=y -CONFIG_SCSI_COMMON=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_IMX_EARLYCON=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOCK_RX_QUEUE_MAPPING=y -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX50 is not set -# CONFIG_SOC_IMX51 is not set -# CONFIG_SOC_IMX53 is not set -# CONFIG_SOC_IMX6Q is not set -# CONFIG_SOC_IMX6SL is not set -# CONFIG_SOC_IMX6SLL is not set -# CONFIG_SOC_IMX6SX is not set -# CONFIG_SOC_IMX6UL is not set -# CONFIG_SOC_IMX7D is not set -# CONFIG_SOC_IMX7ULP is not set -# CONFIG_SOC_IMX8M is not set -# CONFIG_SOC_LS1021A is not set -# CONFIG_SOC_VF610 is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_FSL_LPSPI is not set -# CONFIG_SPI_FSL_QUADSPI is not set -CONFIG_SPI_IMX=y -CONFIG_SPI_MASTER=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_STMP_DEVICE=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_IMX=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_GADGET=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_OTG=y -CONFIG_USB_PHY=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XOR_BLOCKS=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/imx/patches-5.15/100-bootargs.patch b/target/linux/imx/patches-5.15/100-bootargs.patch deleted file mode 100644 index cf63a3bdb1a32d..00000000000000 --- a/target/linux/imx/patches-5.15/100-bootargs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -16,4 +16,8 @@ - device_type = "memory"; - reg = <0x10000000 0x40000000>; - }; -+ -+ chosen { -+ bootargs = "console=ttymxc0,115200"; -+ }; - }; diff --git a/target/linux/imx/patches-5.15/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch b/target/linux/imx/patches-5.15/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch deleted file mode 100644 index e14dc484b08a74..00000000000000 --- a/target/linux/imx/patches-5.15/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 68604e89335ccb3e893b5a05b2c0d5cd2eaaf6ec Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Tue, 3 Mar 2020 15:14:40 +0100 -Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: add status LEDs aliases -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Petr Štetiar ---- - arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 16 ++++++++++------ - arch/arm/boot/dts/imx6q-apalis-ixora.dts | 12 ++++++++---- - 2 files changed, 18 insertions(+), 10 deletions(-) - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -25,6 +25,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -92,22 +96,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; -- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; -- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -24,6 +24,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -91,22 +95,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; - gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/imx/patches-5.15/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch b/target/linux/imx/patches-5.15/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch deleted file mode 100644 index 8f07f0b1a5111e..00000000000000 --- a/target/linux/imx/patches-5.15/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch +++ /dev/null @@ -1,86 +0,0 @@ -From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Tue, 3 Mar 2020 15:15:57 +0100 -Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Petr Štetiar ---- - arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++- - arch/arm/boot/dts/imx6q-apalis-ixora.dts | 15 ++++++++++++++- - 2 files changed, 28 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -38,7 +38,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -47,6 +47,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -275,4 +282,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -37,7 +37,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -46,6 +46,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -276,4 +283,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; diff --git a/target/linux/imx/patches-5.15/310-ARM-dts-imx7d-pico-pi-set-aliases.patch b/target/linux/imx/patches-5.15/310-ARM-dts-imx7d-pico-pi-set-aliases.patch deleted file mode 100644 index f50199cdfc3ffd..00000000000000 --- a/target/linux/imx/patches-5.15/310-ARM-dts-imx7d-pico-pi-set-aliases.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/arch/arm/boot/dts/imx7d-pico-pi.dts -+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts -@@ -8,12 +8,20 @@ - model = "TechNexion PICO-IMX7D Board and PI baseboard"; - compatible = "technexion,imx7d-pico-pi", "fsl,imx7d"; - -+ aliases { -+ led-boot = &led_system; -+ led-failsafe = &led_system; -+ led-running = &led_system; -+ led-upgrade = &led_system; -+ label-mac-device = &fec1; -+ }; -+ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_leds>; - -- led { -+ led_system: led { - label = "gpio-led"; - gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/imx/patches-5.15/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch b/target/linux/imx/patches-5.15/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch deleted file mode 100644 index 5248e8c74c1ab9..00000000000000 --- a/target/linux/imx/patches-5.15/311-ARM-imx7d-pico-pi.dts-add-default-stdout-path.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 6e8e5ccfbee7a531b035ffce3f95f3901946fa9d Mon Sep 17 00:00:00 2001 -From: Robert Nelson -Date: Wed, 9 Jan 2019 14:33:24 -0600 -Subject: [PATCH] ARM: imx7d-pico-pi.dts: add default stdout-path - -Signed-off-by: Robert Nelson ---- - arch/arm/boot/dts/imx7d-pico-pi.dts | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/boot/dts/imx7d-pico-pi.dts -+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts -@@ -16,6 +16,10 @@ - label-mac-device = &fec1; - }; - -+ chosen { -+ stdout-path = "serial4:115200n8"; -+ }; -+ - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; From a56292d9f595537404549bae00ee1877b6f8814c Mon Sep 17 00:00:00 2001 From: Janusz Dziedzic Date: Thu, 1 Feb 2024 09:37:54 +0100 Subject: [PATCH 13/25] linux-firmware: intel: add BE200 wifi firmware Add option to install Intel BE200 firmware required by iwlwifi driver and Wifi7 hardware. Signed-off-by: Janusz Dziedzic --- package/firmware/linux-firmware/intel.mk | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/package/firmware/linux-firmware/intel.mk b/package/firmware/linux-firmware/intel.mk index 27b0d8ce64c456..19a96b2c85a09e 100644 --- a/package/firmware/linux-firmware/intel.mk +++ b/package/firmware/linux-firmware/intel.mk @@ -192,6 +192,14 @@ define Package/iwlwifi-firmware-ax210/install endef $(eval $(call BuildPackage,iwlwifi-firmware-ax210)) +Package/iwlwifi-firmware-be200 = $(call Package/firmware-default,Intel BE200 firmware) +define Package/iwlwifi-firmware-be200/install + $(INSTALL_DIR) $(1)/lib/firmware + $(INSTALL_DATA) $(PKG_BUILD_DIR)/iwlwifi-gl-c0-fm-c0-83.ucode $(1)/lib/firmware + $(INSTALL_DATA) $(PKG_BUILD_DIR)/iwlwifi-gl-c0-fm-c0.pnvm $(1)/lib/firmware +endef +$(eval $(call BuildPackage,iwlwifi-firmware-be200)) + Package/e100-firmware = $(call Package/firmware-default,Intel e100) define Package/e100-firmware/install $(INSTALL_DIR) $(1)/lib/firmware/e100 From fba79f39f267c942dd672f0f9a787bc1833c099e Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 18 Feb 2024 05:02:38 +0000 Subject: [PATCH 14/25] mediatek: filogic: fix nvmem cell names of the GL.iNet MT-2500 Fix style of nvmem cell names in the device tree of the GL.iNet MT-2500. Fixes: 49ed52b862 ("mediatek: filogic: convert GL.iNet MT-2500 to use NVMEM-on-MMC)" Signed-off-by: Daniel Golle --- target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts index 03cfe4c825bc29..9b7c85e51973ee 100644 --- a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts +++ b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt2500.dts @@ -184,19 +184,19 @@ #nvmem-cell-cells = <1>; }; - ddns_boot1_10@10 { + ddns@10 { reg = <0x10 0x10>; }; - sn_bak_boot1_20@20 { + sn-bak@20 { reg = <0x20 0x10>; }; - sn_boot1_20@30 { + sn@30 { reg = <0x30 0x10>; }; - country_code_boot1_88@88 { + country-code@88 { reg = <0x88 0x10>; }; }; From 0ef927472148a7b6639d2e2382b78bfe8f37b80f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Mon, 19 Feb 2024 06:36:37 +0100 Subject: [PATCH 15/25] mediatek: filogic: move mt7981 on-SoC blocks to "soc" node in DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's a standard way of grouping on-SoC hardware blocks and this matches upstream DTS. Signed-off-by: Rafał Miłecki --- .../arch/arm64/boot/dts/mediatek/mt7981.dtsi | 1243 +++++++++-------- 1 file changed, 625 insertions(+), 618 deletions(-) diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi index acd40194b77802..cfe7d50eb384d7 100644 --- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi +++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi @@ -41,16 +41,631 @@ }; }; - pwm: pwm@10048000 { - compatible = "mediatek,mt7981-pwm"; - reg = <0 0x10048000 0 0x1000>; - #pwm-cells = <2>; - clocks = <&infracfg CLK_INFRA_PWM_STA>, - <&infracfg CLK_INFRA_PWM_HCK>, - <&infracfg CLK_INFRA_PWM1_CK>, - <&infracfg CLK_INFRA_PWM2_CK>, - <&infracfg CLK_INFRA_PWM3_CK>; - clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; + soc { + compatible = "simple-bus"; + ranges; + #address-cells = <2>; + #size-cells = <2>; + + pwm: pwm@10048000 { + compatible = "mediatek,mt7981-pwm"; + reg = <0 0x10048000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&infracfg CLK_INFRA_PWM_STA>, + <&infracfg CLK_INFRA_PWM_HCK>, + <&infracfg CLK_INFRA_PWM1_CK>, + <&infracfg CLK_INFRA_PWM2_CK>, + <&infracfg CLK_INFRA_PWM3_CK>; + clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; + }; + + thermal: thermal@1100c800 { + #thermal-sensor-cells = <1>; + compatible = "mediatek,mt7981-thermal", "mediatek,mt7986-thermal"; + reg = <0 0x1100c800 0 0x800>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_THERM_CK>, + <&infracfg CLK_INFRA_ADC_26M_CK>; + clock-names = "therm", "auxadc"; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + nvmem-cells = <&thermal_calibration>; + nvmem-cell-names = "calibration-data"; + }; + + auxadc: adc@1100d000 { + compatible = "mediatek,mt7981-auxadc", + "mediatek,mt7986-auxadc", + "mediatek,mt7622-auxadc"; + reg = <0 0x1100d000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_ADC_26M_CK>, + <&infracfg CLK_INFRA_ADC_FRC_CK>; + clock-names = "main", "32k"; + #io-channel-cells = <1>; + }; + + wdma: wdma@15104800 { + compatible = "mediatek,wed-wdma"; + reg = <0 0x15104800 0 0x400>, + <0 0x15104c00 0 0x400>; + }; + + ap2woccif: ap2woccif@151a5000 { + compatible = "mediatek,ap2woccif"; + reg = <0 0x151a5000 0 0x1000>, + <0 0x151ad000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = , + ; + }; + + infracfg: infracfg@10001000 { + compatible = "mediatek,mt7981-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + }; + + topckgen: topckgen@1001B000 { + compatible = "mediatek,mt7981-topckgen", "syscon"; + reg = <0 0x1001B000 0 0x1000>; + #clock-cells = <1>; + }; + + apmixedsys: apmixedsys@1001E000 { + compatible = "mediatek,mt7981-apmixedsys", "syscon"; + reg = <0 0x1001E000 0 0x1000>; + #clock-cells = <1>; + }; + + watchdog: watchdog@1001c000 { + compatible = "mediatek,mt7986-wdt", + "mediatek,mt6589-wdt"; + reg = <0 0x1001c000 0 0x1000>; + interrupts = ; + #reset-cells = <1>; + status = "disabled"; + }; + + gic: interrupt-controller@c000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + interrupt-controller; + reg = <0 0x0c000000 0 0x40000>, /* GICD */ + <0 0x0c080000 0 0x200000>; /* GICR */ + + interrupts = ; + }; + + uart0: serial@11002000 { + compatible = "mediatek,mt6577-uart"; + reg = <0 0x11002000 0 0x400>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_UART0_SEL>, + <&infracfg CLK_INFRA_UART0_CK>; + clock-names = "baud", "bus"; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_UART0_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, + <&topckgen CLK_TOP_UART_SEL>; + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart1: serial@11003000 { + compatible = "mediatek,mt6577-uart"; + reg = <0 0x11003000 0 0x400>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_UART1_SEL>, + <&infracfg CLK_INFRA_UART1_CK>; + clock-names = "baud", "bus"; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_UART1_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, + <&topckgen CLK_TOP_UART_SEL>; + status = "disabled"; + }; + + uart2: serial@11004000 { + compatible = "mediatek,mt6577-uart"; + reg = <0 0x11004000 0 0x400>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_UART2_SEL>, + <&infracfg CLK_INFRA_UART2_CK>; + clock-names = "baud", "bus"; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_UART2_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, + <&topckgen CLK_TOP_UART_SEL>; + status = "disabled"; + }; + + i2c0: i2c@11007000 { + compatible = "mediatek,mt7981-i2c"; + reg = <0 0x11007000 0 0x1000>, + <0 0x10217080 0 0x80>; + interrupts = ; + clock-div = <1>; + clocks = <&infracfg CLK_INFRA_I2C0_CK>, + <&infracfg CLK_INFRA_AP_DMA_CK>, + <&infracfg CLK_INFRA_I2C_MCK_CK>, + <&infracfg CLK_INFRA_I2C_PCK_CK>; + clock-names = "main", "dma", "arb", "pmic"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pcie: pcie@11280000 { + compatible = "mediatek,mt7981-pcie", + "mediatek,mt7986-pcie"; + device_type = "pci"; + reg = <0 0x11280000 0 0x4000>; + reg-names = "pcie-mac"; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20000000 + 0x0 0x20000000 0 0x10000000>; + status = "disabled"; + + clocks = <&infracfg CLK_INFRA_IPCIE_CK>, + <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, + <&infracfg CLK_INFRA_IPCIER_CK>, + <&infracfg CLK_INFRA_IPCIEB_CK>; + + phys = <&u3port0 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + pcie_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + crypto: crypto@10320000 { + compatible = "inside-secure,safexcel-eip97"; + reg = <0 0x10320000 0 0x40000>; + interrupts = , + , + , + ; + interrupt-names = "ring0", "ring1", "ring2", "ring3"; + clocks = <&topckgen CLK_TOP_EIP97B>; + clock-names = "top_eip97_ck"; + assigned-clocks = <&topckgen CLK_TOP_EIP97B_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_NET1_D5>; + }; + + pio: pinctrl@11d00000 { + compatible = "mediatek,mt7981-pinctrl"; + reg = <0 0x11d00000 0 0x1000>, + <0 0x11c00000 0 0x1000>, + <0 0x11c10000 0 0x1000>, + <0 0x11d20000 0 0x1000>, + <0 0x11e00000 0 0x1000>, + <0 0x11e20000 0 0x1000>, + <0 0x11f00000 0 0x1000>, + <0 0x11f10000 0 0x1000>, + <0 0x1000b000 0 0x1000>; + reg-names = "gpio", "iocfg_rt", "iocfg_rm", + "iocfg_rb", "iocfg_lb", "iocfg_bl", + "iocfg_tm", "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 56>; + interrupt-controller; + interrupts = ; + interrupt-parent = <&gic>; + #interrupt-cells = <2>; + + mdio_pins: mdc-mdio-pins { + mux { + function = "eth"; + groups = "smi_mdc_mdio"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0"; + }; + }; + + wifi_dbdc_pins: wifi-dbdc-pins { + mux { + function = "eth"; + groups = "wf0_mode1"; + }; + conf { + pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4", + "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6", + "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10", + "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ", + "WF_CBA_RESETB", "WF_DIG_RESETB"; + drive-strength = <4>; + }; + }; + + gbe_led0_pins: gbe-led0-pins { + mux { + function = "led"; + groups = "gbe_led0"; + }; + }; + + gbe_led1_pins: gbe-led1-pins { + mux { + function = "led"; + groups = "gbe_led1"; + }; + }; + }; + + ethsys: syscon@15000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mediatek,mt7981-ethsys", + "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + wed: wed@15010000 { + compatible = "mediatek,mt7981-wed", + "mediatek,mt7986-wed", + "syscon"; + reg = <0 0x15010000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + memory-region = <&wo_emi0>, <&wo_data>; + memory-region-names = "wo-emi", "wo-data"; + mediatek,wo-ccif = <&wo_ccif0>; + mediatek,wo-ilm = <&wo_ilm0>; + mediatek,wo-dlm = <&wo_dlm0>; + mediatek,wo-cpuboot = <&wo_cpuboot>; + }; + + eth: ethernet@15100000 { + compatible = "mediatek,mt7981-eth"; + reg = <0 0x15100000 0 0x80000>; + interrupts = , + , + , + ; + clocks = <ðsys CLK_ETH_FE_EN>, + <ðsys CLK_ETH_GP2_EN>, + <ðsys CLK_ETH_GP1_EN>, + <ðsys CLK_ETH_WOCPU0_EN>, + <&sgmiisys0 CLK_SGM0_TX_EN>, + <&sgmiisys0 CLK_SGM0_RX_EN>, + <&sgmiisys0 CLK_SGM0_CK0_EN>, + <&sgmiisys0 CLK_SGM0_CDR_CK0_EN>, + <&sgmiisys1 CLK_SGM1_TX_EN>, + <&sgmiisys1 CLK_SGM1_RX_EN>, + <&sgmiisys1 CLK_SGM1_CK1_EN>, + <&sgmiisys1 CLK_SGM1_CDR_CK1_EN>, + <&topckgen CLK_TOP_SGM_REG>, + <&topckgen CLK_TOP_NETSYS_SEL>, + <&topckgen CLK_TOP_NETSYS_500M_SEL>; + clock-names = "fe", "gp2", "gp1", "wocpu0", + "sgmii_tx250m", "sgmii_rx250m", + "sgmii_cdr_ref", "sgmii_cdr_fb", + "sgmii2_tx250m", "sgmii2_rx250m", + "sgmii2_cdr_ref", "sgmii2_cdr_fb", + "sgmii_ck", "netsys0", "netsys1"; + assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, + <&topckgen CLK_TOP_SGM_325M_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_NET2_800M>, + <&topckgen CLK_TOP_CB_SGM_325M>; + mediatek,ethsys = <ðsys>; + mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; + mediatek,infracfg = <&topmisc>; + mediatek,wed = <&wed>; + #reset-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + mdio_bus: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + int_gbe_phy: ethernet-phy@0 { + reg = <0>; + compatible = "ethernet-phy-ieee802.3-c22"; + phy-mode = "gmii"; + phy-is-integrated; + nvmem-cells = <&phy_calibration>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + int_gbe_phy_led0: int-gbe-phy-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + int_gbe_phy_led1: int-gbe-phy-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + }; + }; + + wo_dlm0: syscon@151e8000 { + compatible = "mediatek,mt7986-wo-dlm", "syscon"; + reg = <0 0x151e8000 0 0x2000>; + }; + + wo_ilm0: syscon@151e0000 { + compatible = "mediatek,mt7986-wo-ilm", "syscon"; + reg = <0 0x151e0000 0 0x8000>; + }; + + wo_cpuboot: syscon@15194000 { + compatible = "mediatek,mt7986-wo-cpuboot", "syscon"; + reg = <0 0x15194000 0 0x1000>; + }; + + wo_ccif0: syscon@151a5000 { + compatible = "mediatek,mt7986-wo-ccif", "syscon"; + reg = <0 0x151a5000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + }; + + sgmiisys0: syscon@10060000 { + compatible = "mediatek,mt7981-sgmiisys_0", "syscon"; + reg = <0 0x10060000 0 0x1000>; + mediatek,pnswap; + #clock-cells = <1>; + }; + + sgmiisys1: syscon@10070000 { + compatible = "mediatek,mt7981-sgmiisys_1", "syscon"; + reg = <0 0x10070000 0 0x1000>; + #clock-cells = <1>; + }; + + topmisc: topmisc@11d10000 { + compatible = "mediatek,mt7981-topmisc", "syscon"; + reg = <0 0x11d10000 0 0x10000>; + #clock-cells = <1>; + }; + + snand: snfi@11005000 { + compatible = "mediatek,mt7986-snand"; + reg = <0 0x11005000 0 0x1000>, <0 0x11006000 0 0x1000>; + reg-names = "nfi", "ecc"; + interrupts = ; + clocks = <&infracfg CLK_INFRA_SPINFI1_CK>, + <&infracfg CLK_INFRA_NFI1_CK>, + <&infracfg CLK_INFRA_NFI_HCK_CK>; + clock-names = "pad_clk", "nfi_clk", "nfi_hclk"; + assigned-clocks = <&topckgen CLK_TOP_SPINFI_SEL>, + <&topckgen CLK_TOP_NFI1X_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D8>, + <&topckgen CLK_TOP_CB_M_D8>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc", + "mediatek,mt7981-mmc"; + reg = <0 0x11230000 0 0x1000>, <0 0x11c20000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_MSDC_CK>, + <&infracfg CLK_INFRA_MSDC_HCK_CK>, + <&infracfg CLK_INFRA_MSDC_66M_CK>, + <&infracfg CLK_INFRA_MSDC_133M_CK>; + assigned-clocks = <&topckgen CLK_TOP_EMMC_208M_SEL>, + <&topckgen CLK_TOP_EMMC_400M_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D2>, + <&topckgen CLK_TOP_CB_NET2_D2>; + clock-names = "source", "hclk", "axi_cg", "ahb_cg"; + status = "disabled"; + }; + + wed_pcie: wed_pcie@10003000 { + compatible = "mediatek,wed_pcie"; + reg = <0 0x10003000 0 0x10>; + }; + + spi0: spi@1100a000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_CB_M_D2>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_INFRA_SPI0_CK>, + <&infracfg CLK_INFRA_SPI0_HCK_CK>; + + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + + spi1: spi@1100b000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100b000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_CB_M_D2>, + <&topckgen CLK_TOP_SPIM_MST_SEL>, + <&infracfg CLK_INFRA_SPI1_CK>, + <&infracfg CLK_INFRA_SPI1_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + + spi2: spi@11009000 { + compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x11009000 0 0x100>; + interrupts = ; + clocks = <&topckgen CLK_TOP_CB_M_D2>, + <&topckgen CLK_TOP_SPI_SEL>, + <&infracfg CLK_INFRA_SPI2_CK>, + <&infracfg CLK_INFRA_SPI2_HCK_CK>; + clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; + status = "disabled"; + }; + + consys: consys@10000000 { + compatible = "mediatek,mt7981-consys"; + reg = <0 0x10000000 0 0x8600000>; + memory-region = <&wmcpu_emi>; + }; + + xhci: usb@11200000 { + compatible = "mediatek,mt7986-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = ; + clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>, + <&infracfg CLK_INFRA_IUSB_CK>, + <&infracfg CLK_INFRA_IUSB_133_CK>, + <&infracfg CLK_INFRA_IUSB_66M_CK>, + <&topckgen CLK_TOP_U2U3_XHCI_SEL>; + clock-names = "sys_ck", + "ref_ck", + "mcu_ck", + "dma_ck", + "xhci_ck"; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + vusb33-supply = <®_3p3v>; + status = "disabled"; + }; + + usb_phy: usb-phy@11e10000 { + compatible = "mediatek,mt7981", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11e10000 0x1700>; + status = "disabled"; + + u2port0: usb-phy@0 { + reg = <0x0 0x700>; + clocks = <&topckgen CLK_TOP_USB_FRMCNT_SEL>; + clock-names = "ref"; + #phy-cells = <1>; + }; + + u3port0: usb-phy@700 { + reg = <0x700 0x900>; + clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>; + clock-names = "ref"; + #phy-cells = <1>; + mediatek,syscon-type = <&topmisc 0x218 0>; + status = "okay"; + }; + }; + + efuse: efuse@11f20000 { + compatible = "mediatek,mt7981-efuse", + "mediatek,efuse"; + reg = <0 0x11f20000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + thermal_calibration: thermal-calib@274 { + reg = <0x274 0xc>; + }; + + phy_calibration: phy-calib@8dc { + reg = <0x8dc 0x10>; + }; + + comb_rx_imp_p0: usb3-rx-imp@8c8 { + reg = <0x8c8 1>; + bits = <0 5>; + }; + + comb_tx_imp_p0: usb3-tx-imp@8c8 { + reg = <0x8c8 2>; + bits = <5 5>; + }; + + comb_intr_p0: usb3-intr@8c9 { + reg = <0x8c9 1>; + bits = <2 6>; + }; + }; + + afe: audio-controller@11210000 { + compatible = "mediatek,mt79xx-audio"; + reg = <0 0x11210000 0 0x9000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_AUD_BUS_CK>, + <&infracfg CLK_INFRA_AUD_26M_CK>, + <&infracfg CLK_INFRA_AUD_L_CK>, + <&infracfg CLK_INFRA_AUD_AUD_CK>, + <&infracfg CLK_INFRA_AUD_EG2_CK>, + <&topckgen CLK_TOP_AUD_SEL>; + clock-names = "aud_bus_ck", + "aud_26m_ck", + "aud_l_ck", + "aud_aud_ck", + "aud_eg2_ck", + "aud_sel"; + assigned-clocks = <&topckgen CLK_TOP_AUD_SEL>, + <&topckgen CLK_TOP_A1SYS_SEL>, + <&topckgen CLK_TOP_AUD_L_SEL>, + <&topckgen CLK_TOP_A_TUNER_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_APLL2_196M>, + <&topckgen CLK_TOP_APLL2_D4>, + <&topckgen CLK_TOP_CB_APLL2_196M>, + <&topckgen CLK_TOP_APLL2_D4>; + status = "disabled"; + }; + + wifi: wifi@18000000 { + compatible = "mediatek,mt7981-wmac"; + resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>; + reset-names = "consys"; + pinctrl-0 = <&wifi_dbdc_pins>; + pinctrl-names = "dbdc"; + clocks = <&topckgen CLK_TOP_NETSYS_MCU_SEL>, + <&topckgen CLK_TOP_AP2CNN_HOST_SEL>; + clock-names = "mcu", "ap2conn"; + reg = <0 0x18000000 0 0x1000000>, + <0 0x10003000 0 0x1000>, + <0 0x11d10000 0 0x1000>; + interrupts = , + , + , + ; + memory-region = <&wmcpu_emi>; + status = "disabled"; + }; }; fan: pwm-fan { @@ -132,46 +747,6 @@ }; }; - thermal: thermal@1100c800 { - #thermal-sensor-cells = <1>; - compatible = "mediatek,mt7981-thermal", "mediatek,mt7986-thermal"; - reg = <0 0x1100c800 0 0x800>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_THERM_CK>, - <&infracfg CLK_INFRA_ADC_26M_CK>; - clock-names = "therm", "auxadc"; - mediatek,auxadc = <&auxadc>; - mediatek,apmixedsys = <&apmixedsys>; - nvmem-cells = <&thermal_calibration>; - nvmem-cell-names = "calibration-data"; - }; - - auxadc: adc@1100d000 { - compatible = "mediatek,mt7981-auxadc", - "mediatek,mt7986-auxadc", - "mediatek,mt7622-auxadc"; - reg = <0 0x1100d000 0 0x1000>; - clocks = <&infracfg CLK_INFRA_ADC_26M_CK>, - <&infracfg CLK_INFRA_ADC_FRC_CK>; - clock-names = "main", "32k"; - #io-channel-cells = <1>; - }; - - wdma: wdma@15104800 { - compatible = "mediatek,wed-wdma"; - reg = <0 0x15104800 0 0x400>, - <0 0x15104c00 0 0x400>; - }; - - ap2woccif: ap2woccif@151a5000 { - compatible = "mediatek,ap2woccif"; - reg = <0 0x151a5000 0 0x1000>, - <0 0x151ad000 0 0x1000>; - interrupt-parent = <&gic>; - interrupts = , - ; - }; - reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -222,24 +797,6 @@ clock-output-names = "clkxtal"; }; - infracfg: infracfg@10001000 { - compatible = "mediatek,mt7981-infracfg", "syscon"; - reg = <0 0x10001000 0 0x1000>; - #clock-cells = <1>; - }; - - topckgen: topckgen@1001B000 { - compatible = "mediatek,mt7981-topckgen", "syscon"; - reg = <0 0x1001B000 0 0x1000>; - #clock-cells = <1>; - }; - - apmixedsys: apmixedsys@1001E000 { - compatible = "mediatek,mt7981-apmixedsys", "syscon"; - reg = <0 0x1001E000 0 0x1000>; - #clock-cells = <1>; - }; - timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; @@ -251,477 +808,6 @@ }; - watchdog: watchdog@1001c000 { - compatible = "mediatek,mt7986-wdt", - "mediatek,mt6589-wdt"; - reg = <0 0x1001c000 0 0x1000>; - interrupts = ; - #reset-cells = <1>; - status = "disabled"; - }; - - gic: interrupt-controller@c000000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - interrupt-controller; - reg = <0 0x0c000000 0 0x40000>, /* GICD */ - <0 0x0c080000 0 0x200000>; /* GICR */ - - interrupts = ; - }; - - uart0: serial@11002000 { - compatible = "mediatek,mt6577-uart"; - reg = <0 0x11002000 0 0x400>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_UART0_SEL>, - <&infracfg CLK_INFRA_UART0_CK>; - clock-names = "baud", "bus"; - assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, - <&infracfg CLK_INFRA_UART0_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, - <&topckgen CLK_TOP_UART_SEL>; - pinctrl-0 = <&uart0_pins>; - pinctrl-names = "default"; - status = "disabled"; - }; - - uart1: serial@11003000 { - compatible = "mediatek,mt6577-uart"; - reg = <0 0x11003000 0 0x400>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_UART1_SEL>, - <&infracfg CLK_INFRA_UART1_CK>; - clock-names = "baud", "bus"; - assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, - <&infracfg CLK_INFRA_UART1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, - <&topckgen CLK_TOP_UART_SEL>; - status = "disabled"; - }; - - uart2: serial@11004000 { - compatible = "mediatek,mt6577-uart"; - reg = <0 0x11004000 0 0x400>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_UART2_SEL>, - <&infracfg CLK_INFRA_UART2_CK>; - clock-names = "baud", "bus"; - assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, - <&infracfg CLK_INFRA_UART2_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, - <&topckgen CLK_TOP_UART_SEL>; - status = "disabled"; - }; - - i2c0: i2c@11007000 { - compatible = "mediatek,mt7981-i2c"; - reg = <0 0x11007000 0 0x1000>, - <0 0x10217080 0 0x80>; - interrupts = ; - clock-div = <1>; - clocks = <&infracfg CLK_INFRA_I2C0_CK>, - <&infracfg CLK_INFRA_AP_DMA_CK>, - <&infracfg CLK_INFRA_I2C_MCK_CK>, - <&infracfg CLK_INFRA_I2C_PCK_CK>; - clock-names = "main", "dma", "arb", "pmic"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pcie: pcie@11280000 { - compatible = "mediatek,mt7981-pcie", - "mediatek,mt7986-pcie"; - device_type = "pci"; - reg = <0 0x11280000 0 0x4000>; - reg-names = "pcie-mac"; - #address-cells = <3>; - #size-cells = <2>; - interrupts = ; - bus-range = <0x00 0xff>; - ranges = <0x82000000 0 0x20000000 - 0x0 0x20000000 0 0x10000000>; - status = "disabled"; - - clocks = <&infracfg CLK_INFRA_IPCIE_CK>, - <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, - <&infracfg CLK_INFRA_IPCIER_CK>, - <&infracfg CLK_INFRA_IPCIEB_CK>; - - phys = <&u3port0 PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc 0>, - <0 0 0 2 &pcie_intc 1>, - <0 0 0 3 &pcie_intc 2>, - <0 0 0 4 &pcie_intc 3>; - pcie_intc: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - - crypto: crypto@10320000 { - compatible = "inside-secure,safexcel-eip97"; - reg = <0 0x10320000 0 0x40000>; - interrupts = , - , - , - ; - interrupt-names = "ring0", "ring1", "ring2", "ring3"; - clocks = <&topckgen CLK_TOP_EIP97B>; - clock-names = "top_eip97_ck"; - assigned-clocks = <&topckgen CLK_TOP_EIP97B_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_NET1_D5>; - }; - - pio: pinctrl@11d00000 { - compatible = "mediatek,mt7981-pinctrl"; - reg = <0 0x11d00000 0 0x1000>, - <0 0x11c00000 0 0x1000>, - <0 0x11c10000 0 0x1000>, - <0 0x11d20000 0 0x1000>, - <0 0x11e00000 0 0x1000>, - <0 0x11e20000 0 0x1000>, - <0 0x11f00000 0 0x1000>, - <0 0x11f10000 0 0x1000>, - <0 0x1000b000 0 0x1000>; - reg-names = "gpio", "iocfg_rt", "iocfg_rm", - "iocfg_rb", "iocfg_lb", "iocfg_bl", - "iocfg_tm", "iocfg_tl", "eint"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 56>; - interrupt-controller; - interrupts = ; - interrupt-parent = <&gic>; - #interrupt-cells = <2>; - - mdio_pins: mdc-mdio-pins { - mux { - function = "eth"; - groups = "smi_mdc_mdio"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0"; - }; - }; - - wifi_dbdc_pins: wifi-dbdc-pins { - mux { - function = "eth"; - groups = "wf0_mode1"; - }; - conf { - pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4", - "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6", - "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10", - "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ", - "WF_CBA_RESETB", "WF_DIG_RESETB"; - drive-strength = <4>; - }; - }; - - gbe_led0_pins: gbe-led0-pins { - mux { - function = "led"; - groups = "gbe_led0"; - }; - }; - - gbe_led1_pins: gbe-led1-pins { - mux { - function = "led"; - groups = "gbe_led1"; - }; - }; - }; - - ethsys: syscon@15000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mediatek,mt7981-ethsys", - "syscon"; - reg = <0 0x15000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - wed: wed@15010000 { - compatible = "mediatek,mt7981-wed", - "mediatek,mt7986-wed", - "syscon"; - reg = <0 0x15010000 0 0x1000>; - interrupt-parent = <&gic>; - interrupts = ; - memory-region = <&wo_emi0>, <&wo_data>; - memory-region-names = "wo-emi", "wo-data"; - mediatek,wo-ccif = <&wo_ccif0>; - mediatek,wo-ilm = <&wo_ilm0>; - mediatek,wo-dlm = <&wo_dlm0>; - mediatek,wo-cpuboot = <&wo_cpuboot>; - }; - - eth: ethernet@15100000 { - compatible = "mediatek,mt7981-eth"; - reg = <0 0x15100000 0 0x80000>; - interrupts = , - , - , - ; - clocks = <ðsys CLK_ETH_FE_EN>, - <ðsys CLK_ETH_GP2_EN>, - <ðsys CLK_ETH_GP1_EN>, - <ðsys CLK_ETH_WOCPU0_EN>, - <&sgmiisys0 CLK_SGM0_TX_EN>, - <&sgmiisys0 CLK_SGM0_RX_EN>, - <&sgmiisys0 CLK_SGM0_CK0_EN>, - <&sgmiisys0 CLK_SGM0_CDR_CK0_EN>, - <&sgmiisys1 CLK_SGM1_TX_EN>, - <&sgmiisys1 CLK_SGM1_RX_EN>, - <&sgmiisys1 CLK_SGM1_CK1_EN>, - <&sgmiisys1 CLK_SGM1_CDR_CK1_EN>, - <&topckgen CLK_TOP_SGM_REG>, - <&topckgen CLK_TOP_NETSYS_SEL>, - <&topckgen CLK_TOP_NETSYS_500M_SEL>; - clock-names = "fe", "gp2", "gp1", "wocpu0", - "sgmii_tx250m", "sgmii_rx250m", - "sgmii_cdr_ref", "sgmii_cdr_fb", - "sgmii2_tx250m", "sgmii2_rx250m", - "sgmii2_cdr_ref", "sgmii2_cdr_fb", - "sgmii_ck", "netsys0", "netsys1"; - assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, - <&topckgen CLK_TOP_SGM_325M_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_NET2_800M>, - <&topckgen CLK_TOP_CB_SGM_325M>; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; - mediatek,infracfg = <&topmisc>; - mediatek,wed = <&wed>; - #reset-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - mdio_bus: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - int_gbe_phy: ethernet-phy@0 { - reg = <0>; - compatible = "ethernet-phy-ieee802.3-c22"; - phy-mode = "gmii"; - phy-is-integrated; - nvmem-cells = <&phy_calibration>; - nvmem-cell-names = "phy-cal-data"; - - leds { - #address-cells = <1>; - #size-cells = <0>; - - int_gbe_phy_led0: int-gbe-phy-led0@0 { - reg = <0>; - function = LED_FUNCTION_LAN; - status = "disabled"; - }; - - int_gbe_phy_led1: int-gbe-phy-led1@1 { - reg = <1>; - function = LED_FUNCTION_LAN; - status = "disabled"; - }; - }; - }; - }; - }; - - wo_dlm0: syscon@151e8000 { - compatible = "mediatek,mt7986-wo-dlm", "syscon"; - reg = <0 0x151e8000 0 0x2000>; - }; - - wo_ilm0: syscon@151e0000 { - compatible = "mediatek,mt7986-wo-ilm", "syscon"; - reg = <0 0x151e0000 0 0x8000>; - }; - - wo_cpuboot: syscon@15194000 { - compatible = "mediatek,mt7986-wo-cpuboot", "syscon"; - reg = <0 0x15194000 0 0x1000>; - }; - - wo_ccif0: syscon@151a5000 { - compatible = "mediatek,mt7986-wo-ccif", "syscon"; - reg = <0 0x151a5000 0 0x1000>; - interrupt-parent = <&gic>; - interrupts = ; - }; - - sgmiisys0: syscon@10060000 { - compatible = "mediatek,mt7981-sgmiisys_0", "syscon"; - reg = <0 0x10060000 0 0x1000>; - mediatek,pnswap; - #clock-cells = <1>; - }; - - sgmiisys1: syscon@10070000 { - compatible = "mediatek,mt7981-sgmiisys_1", "syscon"; - reg = <0 0x10070000 0 0x1000>; - #clock-cells = <1>; - }; - - topmisc: topmisc@11d10000 { - compatible = "mediatek,mt7981-topmisc", "syscon"; - reg = <0 0x11d10000 0 0x10000>; - #clock-cells = <1>; - }; - - snand: snfi@11005000 { - compatible = "mediatek,mt7986-snand"; - reg = <0 0x11005000 0 0x1000>, <0 0x11006000 0 0x1000>; - reg-names = "nfi", "ecc"; - interrupts = ; - clocks = <&infracfg CLK_INFRA_SPINFI1_CK>, - <&infracfg CLK_INFRA_NFI1_CK>, - <&infracfg CLK_INFRA_NFI_HCK_CK>; - clock-names = "pad_clk", "nfi_clk", "nfi_hclk"; - assigned-clocks = <&topckgen CLK_TOP_SPINFI_SEL>, - <&topckgen CLK_TOP_NFI1X_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D8>, - <&topckgen CLK_TOP_CB_M_D8>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - mmc0: mmc@11230000 { - compatible = "mediatek,mt7986-mmc", - "mediatek,mt7981-mmc"; - reg = <0 0x11230000 0 0x1000>, <0 0x11c20000 0 0x1000>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_MSDC_CK>, - <&infracfg CLK_INFRA_MSDC_HCK_CK>, - <&infracfg CLK_INFRA_MSDC_66M_CK>, - <&infracfg CLK_INFRA_MSDC_133M_CK>; - assigned-clocks = <&topckgen CLK_TOP_EMMC_208M_SEL>, - <&topckgen CLK_TOP_EMMC_400M_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D2>, - <&topckgen CLK_TOP_CB_NET2_D2>; - clock-names = "source", "hclk", "axi_cg", "ahb_cg"; - status = "disabled"; - }; - - wed_pcie: wed_pcie@10003000 { - compatible = "mediatek,wed_pcie"; - reg = <0 0x10003000 0 0x10>; - }; - - spi0: spi@1100a000 { - compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0x1100a000 0 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_CB_M_D2>, - <&topckgen CLK_TOP_SPI_SEL>, - <&infracfg CLK_INFRA_SPI0_CK>, - <&infracfg CLK_INFRA_SPI0_HCK_CK>; - - clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; - status = "disabled"; - }; - - spi1: spi@1100b000 { - compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0x1100b000 0 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_CB_M_D2>, - <&topckgen CLK_TOP_SPIM_MST_SEL>, - <&infracfg CLK_INFRA_SPI1_CK>, - <&infracfg CLK_INFRA_SPI1_HCK_CK>; - clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; - status = "disabled"; - }; - - spi2: spi@11009000 { - compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0x11009000 0 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_CB_M_D2>, - <&topckgen CLK_TOP_SPI_SEL>, - <&infracfg CLK_INFRA_SPI2_CK>, - <&infracfg CLK_INFRA_SPI2_HCK_CK>; - clock-names = "parent-clk", "sel-clk", "spi-clk", "hclk"; - status = "disabled"; - }; - - consys: consys@10000000 { - compatible = "mediatek,mt7981-consys"; - reg = <0 0x10000000 0 0x8600000>; - memory-region = <&wmcpu_emi>; - }; - - xhci: usb@11200000 { - compatible = "mediatek,mt7986-xhci", - "mediatek,mtk-xhci"; - reg = <0 0x11200000 0 0x2e00>, - <0 0x11203e00 0 0x0100>; - reg-names = "mac", "ippc"; - interrupts = ; - clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>, - <&infracfg CLK_INFRA_IUSB_CK>, - <&infracfg CLK_INFRA_IUSB_133_CK>, - <&infracfg CLK_INFRA_IUSB_66M_CK>, - <&topckgen CLK_TOP_U2U3_XHCI_SEL>; - clock-names = "sys_ck", - "ref_ck", - "mcu_ck", - "dma_ck", - "xhci_ck"; - phys = <&u2port0 PHY_TYPE_USB2>, - <&u3port0 PHY_TYPE_USB3>; - vusb33-supply = <®_3p3v>; - status = "disabled"; - }; - - usb_phy: usb-phy@11e10000 { - compatible = "mediatek,mt7981", - "mediatek,generic-tphy-v2"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0x11e10000 0x1700>; - status = "disabled"; - - u2port0: usb-phy@0 { - reg = <0x0 0x700>; - clocks = <&topckgen CLK_TOP_USB_FRMCNT_SEL>; - clock-names = "ref"; - #phy-cells = <1>; - }; - - u3port0: usb-phy@700 { - reg = <0x700 0x900>; - clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>; - clock-names = "ref"; - #phy-cells = <1>; - mediatek,syscon-type = <&topmisc 0x218 0>; - status = "okay"; - }; - }; - reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; @@ -731,89 +817,10 @@ regulator-always-on; }; - efuse: efuse@11f20000 { - compatible = "mediatek,mt7981-efuse", - "mediatek,efuse"; - reg = <0 0x11f20000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - status = "okay"; - - thermal_calibration: thermal-calib@274 { - reg = <0x274 0xc>; - }; - - phy_calibration: phy-calib@8dc { - reg = <0x8dc 0x10>; - }; - - comb_rx_imp_p0: usb3-rx-imp@8c8 { - reg = <0x8c8 1>; - bits = <0 5>; - }; - - comb_tx_imp_p0: usb3-tx-imp@8c8 { - reg = <0x8c8 2>; - bits = <5 5>; - }; - - comb_intr_p0: usb3-intr@8c9 { - reg = <0x8c9 1>; - bits = <2 6>; - }; - }; - - afe: audio-controller@11210000 { - compatible = "mediatek,mt79xx-audio"; - reg = <0 0x11210000 0 0x9000>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_AUD_BUS_CK>, - <&infracfg CLK_INFRA_AUD_26M_CK>, - <&infracfg CLK_INFRA_AUD_L_CK>, - <&infracfg CLK_INFRA_AUD_AUD_CK>, - <&infracfg CLK_INFRA_AUD_EG2_CK>, - <&topckgen CLK_TOP_AUD_SEL>; - clock-names = "aud_bus_ck", - "aud_26m_ck", - "aud_l_ck", - "aud_aud_ck", - "aud_eg2_ck", - "aud_sel"; - assigned-clocks = <&topckgen CLK_TOP_AUD_SEL>, - <&topckgen CLK_TOP_A1SYS_SEL>, - <&topckgen CLK_TOP_AUD_L_SEL>, - <&topckgen CLK_TOP_A_TUNER_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_APLL2_196M>, - <&topckgen CLK_TOP_APLL2_D4>, - <&topckgen CLK_TOP_CB_APLL2_196M>, - <&topckgen CLK_TOP_APLL2_D4>; - status = "disabled"; - }; - ice: ice_debug { compatible = "mediatek,mt7981-ice_debug", "mediatek,mt2701-ice_debug"; clocks = <&infracfg CLK_INFRA_DBG_CK>; clock-names = "ice_dbg"; }; - - wifi: wifi@18000000 { - compatible = "mediatek,mt7981-wmac"; - resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>; - reset-names = "consys"; - pinctrl-0 = <&wifi_dbdc_pins>; - pinctrl-names = "dbdc"; - clocks = <&topckgen CLK_TOP_NETSYS_MCU_SEL>, - <&topckgen CLK_TOP_AP2CNN_HOST_SEL>; - clock-names = "mcu", "ap2conn"; - reg = <0 0x18000000 0 0x1000000>, - <0 0x10003000 0 0x1000>, - <0 0x11d10000 0 0x1000>; - interrupts = , - , - , - ; - memory-region = <&wmcpu_emi>; - status = "disabled"; - }; }; From 14ac91c68c0e17b8ec705256f0d9092bfb899466 Mon Sep 17 00:00:00 2001 From: Luiz Angelo Daros de Luca Date: Wed, 19 Oct 2022 23:12:49 -0300 Subject: [PATCH 16/25] base-files: sysupgrade: do not hide tar errors tar stderr was probably discarded only to remove this message: tar: removing leading '/' from member names However, together with that, any other error would also be discarded. It is easier to fix that allowing the error message to be printed. In sysupgrade, the backup file list only uses absolute paths. That way, the solution is to remove the leading '/' from all files (sed) and chdir to / (option -C /) Signed-off-by: Luiz Angelo Daros de Luca --- package/base-files/files/sbin/sysupgrade | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade index 93150913024fb7..eba11ce78ed5d4 100755 --- a/package/base-files/files/sbin/sysupgrade +++ b/package/base-files/files/sbin/sysupgrade @@ -257,7 +257,8 @@ do_save_conffiles() { v "Saving config files..." [ "$VERBOSE" -gt 1 ] && TAR_V="v" || TAR_V="" - tar c${TAR_V}zf "$conf_tar" -T "$CONFFILES" 2>/dev/null + sed -i -e 's,^/,,' "$CONFFILES" + tar c${TAR_V}zf "$conf_tar" -C / -T "$CONFFILES" if [ "$?" -ne 0 ]; then echo "Failed to create the configuration backup." rm -f "$conf_tar" From 700907bc6371939256129b00c1324f3a5942f007 Mon Sep 17 00:00:00 2001 From: Luiz Angelo Daros de Luca Date: Wed, 19 Oct 2022 23:27:52 -0300 Subject: [PATCH 17/25] base-files: sysupgrade: always cleanup after backups When tar was failing, it was exiting immediately. Some files and the tmpfs mount (-k) would remain breaking the next backup attempt. Also remove redundant $? from exit builtin call as exit already returns the last command exit code when called. Signed-off-by: Luiz Angelo Daros de Luca --- package/base-files/files/sbin/sysupgrade | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade index eba11ce78ed5d4..43e129e1d77ca0 100755 --- a/package/base-files/files/sbin/sysupgrade +++ b/package/base-files/files/sbin/sysupgrade @@ -259,10 +259,10 @@ do_save_conffiles() { [ "$VERBOSE" -gt 1 ] && TAR_V="v" || TAR_V="" sed -i -e 's,^/,,' "$CONFFILES" tar c${TAR_V}zf "$conf_tar" -C / -T "$CONFFILES" - if [ "$?" -ne 0 ]; then + local err=$? + if [ "$err" -ne 0 ]; then echo "Failed to create the configuration backup." rm -f "$conf_tar" - exit 1 fi [ "$UMOUNT_ETCBACKUP_DIR" -eq 1 ] && { @@ -270,6 +270,8 @@ do_save_conffiles() { rm -rf "$RAMFS" } rm -f "$CONFFILES" + + return "$err" } if [ $CONF_BACKUP_LIST -eq 1 ]; then @@ -282,7 +284,7 @@ fi if [ -n "$CONF_BACKUP" ]; then do_save_conffiles "$CONF_BACKUP" - exit $? + exit fi if [ -n "$CONF_RESTORE" ]; then @@ -351,7 +353,7 @@ if [ -n "$CONF_IMAGE" ]; then get_image "$CONF_IMAGE" "cat" > "$CONF_TAR" export SAVE_CONFIG=1 elif ask_bool $SAVE_CONFIG "Keep config files over reflash"; then - [ $TEST -eq 1 ] || do_save_conffiles "$CONF_TAR" + [ $TEST -eq 1 ] || do_save_conffiles "$CONF_TAR" || exit export SAVE_CONFIG=1 else [ $TEST -eq 1 ] || rm -f "$CONF_TAR" From 4fa9aaf0bed984d200b3c48d1cc81fca7847c394 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Tue, 13 Feb 2024 22:10:37 +0100 Subject: [PATCH 18/25] base-files: sysupgrade: always setup overlay when creating backup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Setting overlay while creating backup allows including extra files in archive without actually writing them to flash. Right now this feature is limited to /etc/backup/ directory and is used only for including installed_packages.txt. Extend this solution to make it more generic: 1. Always mount overlay while creating backup 2. Overlay whole / to don't limit it to /etc/backup/ This allows including any additional files in backups and adding more sysupgrade features. Cc: Luiz Angelo Daros de Luca Cc: Christian Marangi Cc: Jo-Philipp Wich Cc: Jonas Gorski Signed-off-by: Rafał Miłecki --- package/base-files/files/sbin/sysupgrade | 36 +++++++++++++----------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade index 43e129e1d77ca0..66bdf95de01735 100755 --- a/package/base-files/files/sbin/sysupgrade +++ b/package/base-files/files/sbin/sysupgrade @@ -24,7 +24,6 @@ export NEED_IMAGE= export HELP=0 export FORCE=0 export TEST=0 -export UMOUNT_ETCBACKUP_DIR=0 # parse options while [ -n "$1" ]; do @@ -224,6 +223,8 @@ include /lib/upgrade do_save_conffiles() { local conf_tar="$1" + local tmp + local dir [ "$(rootfs_type)" = "tmpfs" ] && { echo "Cannot save config while running from ramdisk." >&2 @@ -234,17 +235,21 @@ do_save_conffiles() { run_hooks "$CONFFILES" $sysupgrade_init_conffiles ask_bool 0 "Edit config file list" && vi "$CONFFILES" + # Mount root directory with temporary overlay on top of it. + # This allows including extra (temporary) files in backup archive + # without messing actual rootfs. + tmp="$(mktemp -d -t overlay.XXXXXX)" + mkdir -p "$tmp/upper" "$tmp/work" "$tmp/backup" + dir="$tmp/backup" + if ! mount -t overlay overlay -o lowerdir=/,upperdir="$tmp/upper",workdir="$tmp/work" "$dir"; then + echo "Cannot mount backup overlay to $dir." >&2 + ask_bool 0 "Abort" && exit + dir="" + fi + if [ "$SAVE_INSTALLED_PKGS" -eq 1 ]; then echo "${INSTALLED_PACKAGES}" >> "$CONFFILES" - mkdir -p "$ETCBACKUP_DIR" - # Avoid touching filesystem on each backup - RAMFS="$(mktemp -d -t sysupgrade.XXXXXX)" - mkdir -p "$RAMFS/upper" "$RAMFS/work" - mount -t overlay overlay -o lowerdir=$ETCBACKUP_DIR,upperdir=$RAMFS/upper,workdir=$RAMFS/work $ETCBACKUP_DIR && - UMOUNT_ETCBACKUP_DIR=1 || { - echo "Cannot mount '$ETCBACKUP_DIR' as tmpfs to avoid touching disk while saving the list of installed packages." >&2 - ask_bool 0 "Abort" && exit - } + mkdir -p "$dir/$ETCBACKUP_DIR" # Format: pkg-name{rom,overlay,unkown} # rom is used for pkgs in /rom, even if updated later @@ -252,23 +257,22 @@ do_save_conffiles() { \( -exec test -f /rom/{} \; -exec echo {} rom \; \) -o \ \( -exec test -f /overlay/upper/{} \; -exec echo {} overlay \; \) -o \ \( -exec echo {} unknown \; \) \ - \) | sed -e 's,.*/,,;s/\.control /\t/' > ${INSTALLED_PACKAGES} + \) | sed -e 's,.*/,,;s/\.control /\t/' > "$dir/${INSTALLED_PACKAGES}" fi v "Saving config files..." [ "$VERBOSE" -gt 1 ] && TAR_V="v" || TAR_V="" sed -i -e 's,^/,,' "$CONFFILES" - tar c${TAR_V}zf "$conf_tar" -C / -T "$CONFFILES" + tar c${TAR_V}zf "$conf_tar" -C "${dir:-/}" -T "$CONFFILES" local err=$? if [ "$err" -ne 0 ]; then echo "Failed to create the configuration backup." rm -f "$conf_tar" fi - [ "$UMOUNT_ETCBACKUP_DIR" -eq 1 ] && { - umount "$ETCBACKUP_DIR" - rm -rf "$RAMFS" - } + umount "$dir" + rm -rf "$tmp" + rm -f "$CONFFILES" return "$err" From bf304d10e97c11de8c637fda02578cce79a3a0b4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Wed, 14 Feb 2024 16:05:19 +0100 Subject: [PATCH 19/25] base-files: sysupgrade: include uci-defaults script disabling services MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Disabled services should be kept disabled after sysupgrade. This can be easily handled using a proper uci-defaults script. Extend sysupgrade to check for disabled services, generate uci-defaults script disabling them and include it in backup. Cc: Christian Marangi Cc: Jo-Philipp Wich Cc: Jonas Gorski Signed-off-by: Rafał Miłecki Acked-by: Jo-Philipp Wich --- package/base-files/files/sbin/sysupgrade | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade index 66bdf95de01735..4bac1041d9665a 100755 --- a/package/base-files/files/sbin/sysupgrade +++ b/package/base-files/files/sbin/sysupgrade @@ -260,6 +260,16 @@ do_save_conffiles() { \) | sed -e 's,.*/,,;s/\.control /\t/' > "$dir/${INSTALLED_PACKAGES}" fi + mkdir -p $dir/etc/uci-defaults/ + touch $dir/etc/uci-defaults/10_disable_services + for service in /etc/init.d/*; do + if ! $service enabled; then + echo "$service disable" >> $dir/etc/uci-defaults/10_disable_services + fi + done + echo "exit 0" >> $dir/etc/uci-defaults/10_disable_services + echo "/etc/uci-defaults/10_disable_services" >> "$CONFFILES" + v "Saving config files..." [ "$VERBOSE" -gt 1 ] && TAR_V="v" || TAR_V="" sed -i -e 's,^/,,' "$CONFFILES" From 4108c0c1b6965b3a4e5fbaa1171310875e80f76e Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Mon, 15 Jan 2024 23:28:13 +0800 Subject: [PATCH 20/25] qualcommax: backport more changes for ipq6018 and ipq8074 - Mark patches as upstream - Backport more upstream changes - Handle conflicts and refresh patches Signed-off-by: Chukun Pan --- ...-dts-qcom-ipq6018-fix-NAND-node-name.patch | 28 + ...pq6018-align-TLMM-pin-configuration-.patch | 56 ++ ...m-ipq8074-add-compatible-fallback-to.patch | 26 + ...m-ipq8074-add-critical-thermal-trips.patch | 24 +- ...-qcom-nvmem-add-support-for-IPQ6018.patch} | 26 +- ...-qcom-nvmem-add-support-for-IPQ8074.patch} | 23 +- ...pq8074-include-the-GPLL0-as-clock-pr.patch | 6 +- ...-ipq6018-move-ARMv8-timer-out-of-SoC.patch | 52 ++ ...dts-qcom-ipq6018-Sort-nodes-properly.patch | 605 ++++++++++++++++++ ...com-ipq6018-Add-remove-some-newlines.patch | 92 +++ ...4-dts-qcom-ipq6018-Use-lowercase-hex.patch | 25 + ...m-ipq6018-align-RPM-G-Link-node-with.patch | 28 + ...m-ipq6018-cp01-c1-drop-SPI-cs-select.patch | 27 + ...-add-few-more-reserved-memory-region.patch | 92 +++ ...com-enable-the-download-mode-support.patch | 49 ++ ...om-ipq6018-correct-qrng-unit-address.patch | 29 + ...ipq6018-add-unit-address-to-soc-node.patch | 28 + ...64-dts-qcom-ipq6018-add-QFPROM-node.patch} | 8 +- ...-qcom-ipq6018-drop-incorrect-SPI-bus.patch | 37 ++ ...-qcom-ipq8074-drop-incorrect-SPI-bus.patch | 29 + ...pq6018-Use-floor-ops-for-sdcc-clocks.patch | 27 + ...gcc-ipq6018-drop-redundant-F-define.patch} | 2 +- ...k-qcom-gcc-ipq6018-update-UBI32-PLL.patch} | 2 +- ...q6018-remove-duplicate-initializers.patch} | 2 +- ...m-Add-RPM-processor-subsystem-driver.patch | 132 ++++ ...dts-qcom-Add-rpm-proc-node-for-GLINK.patch | 93 +++ ...s-qcom-ipq6018-include-the-GPLL0-as.patch} | 19 +- ...-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch | 57 ++ ...-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch} | 16 +- ...-ipq6018-Add-remaining-QUP-UART-node.patch | 81 +++ ...com-Fix-hs_phy_irq-for-QUSB2-targets.patch | 95 +++ ...k-qcom-Remove-IPQ6018-SOC-specific-.patch} | 12 +- ...m64-dts-qcom-ipq6018-add-tsens-node.patch} | 10 +- ...-dts-qcom-ipq6018-add-thermal-zones.patch} | 22 +- ...018-add-qdss_at-clock-needed-for-wi.patch} | 4 +- ...ix-serdes-init-sequence-for-IPQ6018.patch} | 0 ...ts-ipq8074-add-reserved-memory-nodes.patch | 22 +- ...pq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch | 2 +- ...qcom-ipq8074-use-msi-parent-for-PCIe.patch | 6 +- ...com-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch | 8 +- ...0121-arm64-dts-ipq8074-Add-WLAN-node.patch | 2 +- ...64-dts-qcom-ipq8074-add-QFPROM-fuses.patch | 2 +- ...rm64-dts-qcom-ipq6018-add-SDHCI-node.patch | 4 +- ...dts-qcom-ipq6018-add-LDOA2-regulator.patch | 18 +- ...arm64-dts-qcom-ipq6018-add-wifi-node.patch | 2 +- ...07-soc-qcom-fix-smp2p-ack-on-ipq6018.patch | 2 +- ...pq6018-assign-QDSS_AT-clock-to-wifi-.patch | 2 +- ...pq6018-change-voltage-to-perf-levels.patch | 2 +- 48 files changed, 1810 insertions(+), 126 deletions(-) create mode 100644 target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch create mode 100644 target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch create mode 100644 target/linux/qualcommax/patches-6.1/0022-v6.4-arm64-dts-qcom-ipq8074-add-compatible-fallback-to.patch rename target/linux/qualcommax/patches-6.1/{0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch => 0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch} (86%) rename target/linux/qualcommax/patches-6.1/{0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch => 0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch} (84%) create mode 100644 target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch create mode 100644 target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch create mode 100644 target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch create mode 100644 target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch create mode 100644 target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch create mode 100644 target/linux/qualcommax/patches-6.1/0038-v6.4-arm64-dts-qcom-ipq6018-cp01-c1-drop-SPI-cs-select.patch create mode 100644 target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch create mode 100644 target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch create mode 100644 target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch create mode 100644 target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch rename target/linux/qualcommax/patches-6.1/{0037-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch => 0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch} (92%) create mode 100644 target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch create mode 100644 target/linux/qualcommax/patches-6.1/0045-v6.5-arm64-dts-qcom-ipq8074-drop-incorrect-SPI-bus.patch create mode 100644 target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch rename target/linux/qualcommax/patches-6.1/{0026-v6.5-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch => 0047-v6.6-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch} (92%) rename target/linux/qualcommax/patches-6.1/{0033-v6.5-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch => 0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch} (94%) rename target/linux/qualcommax/patches-6.1/{0034-v6.5-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch => 0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch} (95%) create mode 100644 target/linux/qualcommax/patches-6.1/0050-v6.6-soc-qcom-Add-RPM-processor-subsystem-driver.patch create mode 100644 target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch rename target/linux/qualcommax/patches-6.1/{0135-arm64-dts-qcom-ipq6018-include-the-GPLL0-as-clock-pr.patch => 0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch} (54%) create mode 100644 target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch rename target/linux/qualcommax/patches-6.1/{0142-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch => 0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch} (96%) create mode 100644 target/linux/qualcommax/patches-6.1/0055-v6.8-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch create mode 100644 target/linux/qualcommax/patches-6.1/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch rename target/linux/qualcommax/patches-6.1/{0138-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-compatib.patch => 0057-v6.8-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-.patch} (80%) rename target/linux/qualcommax/patches-6.1/{0140-arm64-dts-qcom-ipq6018-add-tsens-node.patch => 0058-v6.9-arm64-dts-qcom-ipq6018-add-tsens-node.patch} (72%) rename target/linux/qualcommax/patches-6.1/{0141-arm64-dts-qcom-ipq6018-add-thermal-zones.patch => 0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch} (88%) rename target/linux/qualcommax/patches-6.1/{0036-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch => 0060-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch} (92%) rename target/linux/qualcommax/patches-6.1/{0035-v6.9-phy-qcom-qmp-usb-fix-serdes-init-sequence-for-IPQ601.patch => 0061-v6.8-phy-qcom-qmp-usb-fix-serdes-init-sequence-for-IPQ6018.patch} (100%) diff --git a/target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch b/target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch new file mode 100644 index 00000000000000..a87ae4b8ad0e46 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch @@ -0,0 +1,28 @@ +From 8857b0ab6a562c473c5bded0efda9390b82a84d4 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 27 Sep 2022 22:12:17 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: fix NAND node name + +Per schema it should be nand-controller@79b0000 instead of nand@79b0000. +Fix it to match nand-controller.yaml requirements. + +Signed-off-by: Robert Marko +Reviewed-by: Krzysztof Kozlowski +Reviewed-by: Neil Armstrong +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20220927201218.1264506-1-robimarko@gmail.com +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -348,7 +348,7 @@ + status = "disabled"; + }; + +- qpic_nand: nand@79b0000 { ++ qpic_nand: nand-controller@79b0000 { + compatible = "qcom,ipq6018-nand"; + reg = <0x0 0x079b0000 0x0 0x10000>; + #address-cells = <1>; diff --git a/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch b/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch new file mode 100644 index 00000000000000..ceaf68bf7ace24 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch @@ -0,0 +1,56 @@ +From 20afb6751739264ea41993877de93923911dfdc3 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Thu, 6 Oct 2022 14:46:27 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: align TLMM pin configuration with + DT schema + +DT schema expects TLMM pin configuration nodes to be named with +'-state' suffix and their optional children with '-pins' suffix. + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Bjorn Andersson +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221006124659.217540-3-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++-- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts ++++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts +@@ -51,13 +51,13 @@ + }; + + &tlmm { +- i2c_1_pins: i2c-1-pins { ++ i2c_1_pins: i2c-1-state { + pins = "gpio42", "gpio43"; + function = "blsp2_i2c"; + drive-strength = <8>; + }; + +- spi_0_pins: spi-0-pins { ++ spi_0_pins: spi-0-state { + pins = "gpio38", "gpio39", "gpio40", "gpio41"; + function = "blsp0_spi"; + drive-strength = <8>; +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -218,14 +218,14 @@ + interrupt-controller; + #interrupt-cells = <2>; + +- serial_3_pins: serial3-pinmux { ++ serial_3_pins: serial3-state { + pins = "gpio44", "gpio45"; + function = "blsp2_uart"; + drive-strength = <8>; + bias-pull-down; + }; + +- qpic_pins: qpic-pins { ++ qpic_pins: qpic-state { + pins = "gpio1", "gpio3", "gpio4", + "gpio5", "gpio6", "gpio7", + "gpio8", "gpio10", "gpio11", diff --git a/target/linux/qualcommax/patches-6.1/0022-v6.4-arm64-dts-qcom-ipq8074-add-compatible-fallback-to.patch b/target/linux/qualcommax/patches-6.1/0022-v6.4-arm64-dts-qcom-ipq8074-add-compatible-fallback-to.patch new file mode 100644 index 00000000000000..f85be793cde78e --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0022-v6.4-arm64-dts-qcom-ipq8074-add-compatible-fallback-to.patch @@ -0,0 +1,26 @@ +From d93bd4630ce163f3761aedc0b342b072bee6db6b Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Wed, 22 Mar 2023 18:41:40 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq8074: add compatible fallback to mailbox + +IPQ8074 mailbox is compatible with IPQ6018. + +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230322174148.810938-4-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -682,7 +682,8 @@ + }; + + apcs_glb: mailbox@b111000 { +- compatible = "qcom,ipq8074-apcs-apps-global"; ++ compatible = "qcom,ipq8074-apcs-apps-global", ++ "qcom,ipq6018-apcs-apps-global"; + reg = <0x0b111000 0x1000>; + clocks = <&a53pll>, <&xo>; + clock-names = "pll", "xo"; diff --git a/target/linux/qualcommax/patches-6.1/0023-v6.5-arm64-dts-qcom-ipq8074-add-critical-thermal-trips.patch b/target/linux/qualcommax/patches-6.1/0023-v6.5-arm64-dts-qcom-ipq8074-add-critical-thermal-trips.patch index 98e0a08a27f43f..737bb067523359 100644 --- a/target/linux/qualcommax/patches-6.1/0023-v6.5-arm64-dts-qcom-ipq8074-add-critical-thermal-trips.patch +++ b/target/linux/qualcommax/patches-6.1/0023-v6.5-arm64-dts-qcom-ipq8074-add-critical-thermal-trips.patch @@ -17,7 +17,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -898,6 +898,14 @@ +@@ -899,6 +899,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 4>; @@ -32,7 +32,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; nss0-thermal { -@@ -905,6 +913,14 @@ +@@ -906,6 +914,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 5>; @@ -47,7 +47,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; nss1-thermal { -@@ -912,6 +928,14 @@ +@@ -913,6 +929,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 6>; @@ -62,7 +62,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; wcss-phya0-thermal { -@@ -919,6 +943,14 @@ +@@ -920,6 +944,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 7>; @@ -77,7 +77,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; wcss-phya1-thermal { -@@ -926,6 +958,14 @@ +@@ -927,6 +959,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 8>; @@ -92,7 +92,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; cpu0_thermal: cpu0-thermal { -@@ -933,6 +973,14 @@ +@@ -934,6 +974,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 9>; @@ -107,7 +107,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; cpu1_thermal: cpu1-thermal { -@@ -940,6 +988,14 @@ +@@ -941,6 +989,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 10>; @@ -122,7 +122,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; cpu2_thermal: cpu2-thermal { -@@ -947,6 +1003,14 @@ +@@ -948,6 +1004,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 11>; @@ -137,7 +137,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; cpu3_thermal: cpu3-thermal { -@@ -954,6 +1018,14 @@ +@@ -955,6 +1019,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 12>; @@ -152,7 +152,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; cluster_thermal: cluster-thermal { -@@ -961,6 +1033,14 @@ +@@ -962,6 +1034,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 13>; @@ -167,7 +167,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; wcss-phyb0-thermal { -@@ -968,6 +1048,14 @@ +@@ -969,6 +1049,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 14>; @@ -182,7 +182,7 @@ Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com }; wcss-phyb1-thermal { -@@ -975,6 +1063,14 @@ +@@ -976,6 +1064,14 @@ polling-delay = <1000>; thermal-sensors = <&tsens 15>; diff --git a/target/linux/qualcommax/patches-6.1/0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch b/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch similarity index 86% rename from target/linux/qualcommax/patches-6.1/0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch rename to target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch index ffd9cf030a2638..63e2f22db7dbfd 100644 --- a/target/linux/qualcommax/patches-6.1/0038-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch +++ b/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch @@ -20,7 +20,7 @@ Signed-off-by: Robert Marko Signed-off-by: Viresh Kumar --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + - drivers/cpufreq/qcom-cpufreq-nvmem.c | 58 ++++++++++++++++++++++++++++++++++++ + drivers/cpufreq/qcom-cpufreq-nvmem.c | 58 ++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) --- a/drivers/cpufreq/cpufreq-dt-platdev.c @@ -31,20 +31,20 @@ Signed-off-by: Viresh Kumar + { .compatible = "qcom,ipq6018", }, { .compatible = "qcom,ipq8064", }, - { .compatible = "qcom,ipq8074", }, { .compatible = "qcom,apq8064", }, + { .compatible = "qcom,msm8974", }, --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c -@@ -36,6 +36,8 @@ enum ipq8074_versions { - IPQ8074_ACORN_VERSION, - }; +@@ -31,6 +31,8 @@ + + #include +#define IPQ6000_VERSION BIT(2) + struct qcom_cpufreq_drv; struct qcom_cpufreq_match_data { -@@ -209,6 +211,57 @@ len_error: +@@ -204,6 +206,57 @@ len_error: return ret; } @@ -99,11 +99,11 @@ Signed-off-by: Viresh Kumar + return 0; +} + - static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev, - struct nvmem_cell *speedbin_nvmem, - char **pvs_name, -@@ -265,6 +318,10 @@ static const struct qcom_cpufreq_match_d - .get_version = qcom_cpufreq_ipq8074_name_version, + static const struct qcom_cpufreq_match_data match_data_kryo = { + .get_version = qcom_cpufreq_kryo_name_version, + }; +@@ -218,6 +271,10 @@ static const struct qcom_cpufreq_match_d + .genpd_names = qcs404_genpd_names, }; +static const struct qcom_cpufreq_match_data match_data_ipq6018 = { @@ -113,11 +113,11 @@ Signed-off-by: Viresh Kumar static int qcom_cpufreq_probe(struct platform_device *pdev) { struct qcom_cpufreq_drv *drv; -@@ -409,6 +466,7 @@ static const struct of_device_id qcom_cp +@@ -362,6 +419,7 @@ static const struct of_device_id qcom_cp { .compatible = "qcom,apq8096", .data = &match_data_kryo }, { .compatible = "qcom,msm8996", .data = &match_data_kryo }, { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, + { .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 }, { .compatible = "qcom,ipq8064", .data = &match_data_krait }, - { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 }, { .compatible = "qcom,apq8064", .data = &match_data_krait }, + { .compatible = "qcom,msm8974", .data = &match_data_krait }, diff --git a/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch b/target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch similarity index 84% rename from target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch rename to target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch index 61cc2a459bb1b5..cbd7b770f4e741 100644 --- a/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch +++ b/target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch @@ -1,4 +1,4 @@ -From df75a00c60c6e58bc36e4c63e9d7f1910412b132 Mon Sep 17 00:00:00 2001 +From 0b9cd949136f1b63f7aa9424b6e583a1ab261e36 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Fri, 13 Oct 2023 19:20:02 +0200 Subject: [PATCH] cpufreq: qcom-nvmem: add support for IPQ8074 @@ -16,6 +16,7 @@ will get created by NVMEM CPUFreq driver. Signed-off-by: Robert Marko Acked-by: Konrad Dybcio +[ Viresh: Fixed rebase conflict. ] Signed-off-by: Viresh Kumar --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + @@ -24,9 +25,9 @@ Signed-off-by: Viresh Kumar --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c -@@ -164,6 +164,7 @@ static const struct of_device_id blockli - { .compatible = "ti,omap3", }, +@@ -165,6 +165,7 @@ static const struct of_device_id blockli + { .compatible = "qcom,ipq6018", }, { .compatible = "qcom,ipq8064", }, + { .compatible = "qcom,ipq8074", }, { .compatible = "qcom,apq8064", }, @@ -34,9 +35,9 @@ Signed-off-by: Viresh Kumar { .compatible = "qcom,msm8960", }, --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c -@@ -31,6 +31,11 @@ +@@ -33,6 +33,11 @@ - #include + #define IPQ6000_VERSION BIT(2) +enum ipq8074_versions { + IPQ8074_HAWKEYE_VERSION = 0, @@ -46,8 +47,8 @@ Signed-off-by: Viresh Kumar struct qcom_cpufreq_drv; struct qcom_cpufreq_match_data { -@@ -204,6 +209,44 @@ len_error: - return ret; +@@ -257,6 +262,44 @@ static int qcom_cpufreq_ipq6018_name_ver + return 0; } +static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev, @@ -91,8 +92,8 @@ Signed-off-by: Viresh Kumar static const struct qcom_cpufreq_match_data match_data_kryo = { .get_version = qcom_cpufreq_kryo_name_version, }; -@@ -218,6 +261,10 @@ static const struct qcom_cpufreq_match_d - .genpd_names = qcs404_genpd_names, +@@ -275,6 +318,10 @@ static const struct qcom_cpufreq_match_d + .get_version = qcom_cpufreq_ipq6018_name_version, }; +static const struct qcom_cpufreq_match_data match_data_ipq8074 = { @@ -102,9 +103,9 @@ Signed-off-by: Viresh Kumar static int qcom_cpufreq_probe(struct platform_device *pdev) { struct qcom_cpufreq_drv *drv; -@@ -363,6 +410,7 @@ static const struct of_device_id qcom_cp - { .compatible = "qcom,msm8996", .data = &match_data_kryo }, +@@ -421,6 +468,7 @@ static const struct of_device_id qcom_cp { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, + { .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 }, { .compatible = "qcom,ipq8064", .data = &match_data_krait }, + { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 }, { .compatible = "qcom,apq8064", .data = &match_data_krait }, diff --git a/target/linux/qualcommax/patches-6.1/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch b/target/linux/qualcommax/patches-6.1/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch index dee770e4cd13ba..fb7011de95de71 100644 --- a/target/linux/qualcommax/patches-6.1/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch +++ b/target/linux/qualcommax/patches-6.1/0028-v6.7-arm64-dts-qcom-ipq8074-include-the-GPLL0-as-clock-pr.patch @@ -19,9 +19,9 @@ Reviewed-by: Konrad Dybcio --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -684,8 +684,8 @@ - apcs_glb: mailbox@b111000 { - compatible = "qcom,ipq8074-apcs-apps-global"; +@@ -685,8 +685,8 @@ + compatible = "qcom,ipq8074-apcs-apps-global", + "qcom,ipq6018-apcs-apps-global"; reg = <0x0b111000 0x1000>; - clocks = <&a53pll>, <&xo>; - clock-names = "pll", "xo"; diff --git a/target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch b/target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch new file mode 100644 index 00000000000000..c3e94a2ae008ef --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch @@ -0,0 +1,52 @@ +From feeef118fda562cf9081edef8ad464d89db070f4 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 27 Sep 2022 22:12:18 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node + +The ARM timer is usually considered not part of SoC node, just like +other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: + +arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} + From schema: dtschema/schemas/simple-bus.yaml + +Signed-off-by: Robert Marko +Reviewed-by: Krzysztof Kozlowski +Reviewed-by: Neil Armstrong +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20220927201218.1264506-2-robimarko@gmail.com +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -510,14 +510,6 @@ + clock-names = "xo"; + }; + +- timer { +- compatible = "arm,armv8-timer"; +- interrupts = , +- , +- , +- ; +- }; +- + timer@b120000 { + #address-cells = <1>; + #size-cells = <1>; +@@ -769,6 +761,14 @@ + }; + }; + ++ timer { ++ compatible = "arm,armv8-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ }; ++ + wcss: wcss-smp2p { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; diff --git a/target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch b/target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch new file mode 100644 index 00000000000000..ad32e64fe1b582 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch @@ -0,0 +1,605 @@ +From 2c6e322a41c5e1ca45be50b9d5fbcda62dc23a0d Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio +Date: Mon, 2 Jan 2023 10:46:28 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq6018: Sort nodes properly + +Order nodes by unit address if one exists and alphabetically otherwise. + +Signed-off-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230102094642.74254-4-konrad.dybcio@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 562 +++++++++++++------------- + 1 file changed, 281 insertions(+), 281 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -87,6 +87,12 @@ + }; + }; + ++ firmware { ++ scm { ++ compatible = "qcom,scm-ipq6018", "qcom,scm"; ++ }; ++ }; ++ + cpu_opp_table: opp-table-cpu { + compatible = "operating-points-v2"; + opp-shared; +@@ -123,12 +129,6 @@ + }; + }; + +- firmware { +- scm { +- compatible = "qcom,scm-ipq6018", "qcom,scm"; +- }; +- }; +- + pmuv8: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; ++ qcom,rpm-msg-ram = <&rpm_msg_ram>; ++ mboxes = <&apcs_glb 0>; ++ ++ rpm_requests: glink-channel { ++ compatible = "qcom,rpm-ipq6018"; ++ qcom,glink-channels = "rpm_requests"; ++ ++ regulators { ++ compatible = "qcom,rpm-mp5496-regulators"; ++ ++ ipq6018_s2: s2 { ++ regulator-min-microvolt = <725000>; ++ regulator-max-microvolt = <1062500>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ }; ++ + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; +@@ -179,6 +201,102 @@ + dma-ranges; + compatible = "simple-bus"; + ++ qusb_phy_1: qusb@59000 { ++ compatible = "qcom,ipq6018-qusb2-phy"; ++ reg = <0x0 0x00059000 0x0 0x180>; ++ #phy-cells = <0>; ++ ++ clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, ++ <&xo>; ++ clock-names = "cfg_ahb", "ref"; ++ ++ resets = <&gcc GCC_QUSB2_1_PHY_BCR>; ++ status = "disabled"; ++ }; ++ ++ ssphy_0: ssphy@78000 { ++ compatible = "qcom,ipq6018-qmp-usb3-phy"; ++ reg = <0x0 0x00078000 0x0 0x1c4>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ clocks = <&gcc GCC_USB0_AUX_CLK>, ++ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; ++ clock-names = "aux", "cfg_ahb", "ref"; ++ ++ resets = <&gcc GCC_USB0_PHY_BCR>, ++ <&gcc GCC_USB3PHY_0_PHY_BCR>; ++ reset-names = "phy","common"; ++ status = "disabled"; ++ ++ usb0_ssphy: phy@78200 { ++ reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ ++ <0x0 0x00078400 0x0 0x200>, /* Rx */ ++ <0x0 0x00078800 0x0 0x1f8>, /* PCS */ ++ <0x0 0x00078600 0x0 0x044>; /* PCS misc */ ++ #phy-cells = <0>; ++ #clock-cells = <0>; ++ clocks = <&gcc GCC_USB0_PIPE_CLK>; ++ clock-names = "pipe0"; ++ clock-output-names = "gcc_usb0_pipe_clk_src"; ++ }; ++ }; ++ ++ qusb_phy_0: qusb@79000 { ++ compatible = "qcom,ipq6018-qusb2-phy"; ++ reg = <0x0 0x00079000 0x0 0x180>; ++ #phy-cells = <0>; ++ ++ clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, ++ <&xo>; ++ clock-names = "cfg_ahb", "ref"; ++ ++ resets = <&gcc GCC_QUSB2_0_PHY_BCR>; ++ status = "disabled"; ++ }; ++ ++ pcie_phy: phy@84000 { ++ compatible = "qcom,ipq6018-qmp-pcie-phy"; ++ reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ ++ status = "disabled"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ clocks = <&gcc GCC_PCIE0_AUX_CLK>, ++ <&gcc GCC_PCIE0_AHB_CLK>; ++ clock-names = "aux", "cfg_ahb"; ++ ++ resets = <&gcc GCC_PCIE0_PHY_BCR>, ++ <&gcc GCC_PCIE0PHY_PHY_BCR>; ++ reset-names = "phy", ++ "common"; ++ ++ pcie_phy0: phy@84200 { ++ reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ ++ <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ ++ <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ ++ <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ ++ #phy-cells = <0>; ++ ++ clocks = <&gcc GCC_PCIE0_PIPE_CLK>; ++ clock-names = "pipe0"; ++ clock-output-names = "gcc_pcie0_pipe_clk_src"; ++ #clock-cells = <0>; ++ }; ++ }; ++ ++ mdio: mdio@90000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; ++ reg = <0x0 0x00090000 0x0 0x64>; ++ clocks = <&gcc GCC_MDIO_AHB_CLK>; ++ clock-names = "gcc_mdio_ahb_clk"; ++ status = "disabled"; ++ }; ++ + prng: qrng@e1000 { + compatible = "qcom,prng-ee"; + reg = <0x0 0x000e3000 0x0 0x1000>; +@@ -257,6 +375,41 @@ + reg = <0x0 0x01937000 0x0 0x21000>; + }; + ++ usb2: usb@70f8800 { ++ compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; ++ reg = <0x0 0x070F8800 0x0 0x400>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ clocks = <&gcc GCC_USB1_MASTER_CLK>, ++ <&gcc GCC_USB1_SLEEP_CLK>, ++ <&gcc GCC_USB1_MOCK_UTMI_CLK>; ++ clock-names = "core", ++ "sleep", ++ "mock_utmi"; ++ ++ assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, ++ <&gcc GCC_USB1_MOCK_UTMI_CLK>; ++ assigned-clock-rates = <133330000>, ++ <24000000>; ++ resets = <&gcc GCC_USB1_BCR>; ++ status = "disabled"; ++ ++ dwc_1: usb@7000000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x07000000 0x0 0xcd00>; ++ interrupts = ; ++ phys = <&qusb_phy_1>; ++ phy-names = "usb2-phy"; ++ tx-fifo-resize; ++ snps,is-utmi-l1-suspend; ++ snps,hird-threshold = /bits/ 8 <0x0>; ++ snps,dis_u2_susphy_quirk; ++ snps,dis_u3_susphy_quirk; ++ dr_mode = "host"; ++ }; ++ }; ++ + blsp_dma: dma-controller@7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x0 0x07884000 0x0 0x2b000>; +@@ -366,6 +519,49 @@ + status = "disabled"; + }; + ++ usb3: usb@8af8800 { ++ compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; ++ reg = <0x0 0x08af8800 0x0 0x400>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, ++ <&gcc GCC_USB0_MASTER_CLK>, ++ <&gcc GCC_USB0_SLEEP_CLK>, ++ <&gcc GCC_USB0_MOCK_UTMI_CLK>; ++ clock-names = "cfg_noc", ++ "core", ++ "sleep", ++ "mock_utmi"; ++ ++ assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, ++ <&gcc GCC_USB0_MASTER_CLK>, ++ <&gcc GCC_USB0_MOCK_UTMI_CLK>; ++ assigned-clock-rates = <133330000>, ++ <133330000>, ++ <24000000>; ++ ++ resets = <&gcc GCC_USB0_BCR>; ++ status = "disabled"; ++ ++ dwc_0: usb@8a00000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x08a00000 0x0 0xcd00>; ++ interrupts = ; ++ phys = <&qusb_phy_0>, <&usb0_ssphy>; ++ phy-names = "usb2-phy", "usb3-phy"; ++ clocks = <&xo>; ++ clock-names = "ref"; ++ tx-fifo-resize; ++ snps,is-utmi-l1-suspend; ++ snps,hird-threshold = /bits/ 8 <0x0>; ++ snps,dis_u2_susphy_quirk; ++ snps,dis_u3_susphy_quirk; ++ dr_mode = "host"; ++ }; ++ }; ++ + intc: interrupt-controller@b000000 { + compatible = "qcom,msm-qgic2"; + #address-cells = <2>; +@@ -386,105 +582,6 @@ + }; + }; + +- pcie_phy: phy@84000 { +- compatible = "qcom,ipq6018-qmp-pcie-phy"; +- reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ +- status = "disabled"; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; +- +- clocks = <&gcc GCC_PCIE0_AUX_CLK>, +- <&gcc GCC_PCIE0_AHB_CLK>; +- clock-names = "aux", "cfg_ahb"; +- +- resets = <&gcc GCC_PCIE0_PHY_BCR>, +- <&gcc GCC_PCIE0PHY_PHY_BCR>; +- reset-names = "phy", +- "common"; +- +- pcie_phy0: phy@84200 { +- reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ +- <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ +- <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ +- <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ +- #phy-cells = <0>; +- +- clocks = <&gcc GCC_PCIE0_PIPE_CLK>; +- clock-names = "pipe0"; +- clock-output-names = "gcc_pcie0_pipe_clk_src"; +- #clock-cells = <0>; +- }; +- }; +- +- pcie0: pci@20000000 { +- compatible = "qcom,pcie-ipq6018"; +- reg = <0x0 0x20000000 0x0 0xf1d>, +- <0x0 0x20000f20 0x0 0xa8>, +- <0x0 0x20001000 0x0 0x1000>, +- <0x0 0x80000 0x0 0x4000>, +- <0x0 0x20100000 0x0 0x1000>; +- reg-names = "dbi", "elbi", "atu", "parf", "config"; +- +- device_type = "pci"; +- linux,pci-domain = <0>; +- bus-range = <0x00 0xff>; +- num-lanes = <1>; +- max-link-speed = <3>; +- #address-cells = <3>; +- #size-cells = <2>; +- +- phys = <&pcie_phy0>; +- phy-names = "pciephy"; +- +- ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>, +- <0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>; +- +- interrupts = ; +- interrupt-names = "msi"; +- +- #interrupt-cells = <1>; +- interrupt-map-mask = <0 0 0 0x7>; +- interrupt-map = <0 0 0 1 &intc 0 75 +- IRQ_TYPE_LEVEL_HIGH>, /* int_a */ +- <0 0 0 2 &intc 0 78 +- IRQ_TYPE_LEVEL_HIGH>, /* int_b */ +- <0 0 0 3 &intc 0 79 +- IRQ_TYPE_LEVEL_HIGH>, /* int_c */ +- <0 0 0 4 &intc 0 83 +- IRQ_TYPE_LEVEL_HIGH>; /* int_d */ +- +- clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, +- <&gcc GCC_PCIE0_AXI_M_CLK>, +- <&gcc GCC_PCIE0_AXI_S_CLK>, +- <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, +- <&gcc PCIE0_RCHNG_CLK>; +- clock-names = "iface", +- "axi_m", +- "axi_s", +- "axi_bridge", +- "rchng"; +- +- resets = <&gcc GCC_PCIE0_PIPE_ARES>, +- <&gcc GCC_PCIE0_SLEEP_ARES>, +- <&gcc GCC_PCIE0_CORE_STICKY_ARES>, +- <&gcc GCC_PCIE0_AXI_MASTER_ARES>, +- <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, +- <&gcc GCC_PCIE0_AHB_ARES>, +- <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, +- <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; +- reset-names = "pipe", +- "sleep", +- "sticky", +- "axi_m", +- "axi_s", +- "ahb", +- "axi_m_sticky", +- "axi_s_sticky"; +- +- status = "disabled"; +- }; +- + watchdog@b017000 { + compatible = "qcom,kpss-wdt"; + interrupts = ; +@@ -617,147 +714,74 @@ + }; + }; + +- mdio: mdio@90000 { +- #address-cells = <1>; +- #size-cells = <0>; +- compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; +- reg = <0x0 0x00090000 0x0 0x64>; +- clocks = <&gcc GCC_MDIO_AHB_CLK>; +- clock-names = "gcc_mdio_ahb_clk"; +- status = "disabled"; +- }; +- +- qusb_phy_1: qusb@59000 { +- compatible = "qcom,ipq6018-qusb2-phy"; +- reg = <0x0 0x00059000 0x0 0x180>; +- #phy-cells = <0>; +- +- clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, +- <&xo>; +- clock-names = "cfg_ahb", "ref"; +- +- resets = <&gcc GCC_QUSB2_1_PHY_BCR>; +- status = "disabled"; +- }; +- +- usb2: usb@70f8800 { +- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; +- reg = <0x0 0x070F8800 0x0 0x400>; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; +- clocks = <&gcc GCC_USB1_MASTER_CLK>, +- <&gcc GCC_USB1_SLEEP_CLK>, +- <&gcc GCC_USB1_MOCK_UTMI_CLK>; +- clock-names = "core", +- "sleep", +- "mock_utmi"; +- +- assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, +- <&gcc GCC_USB1_MOCK_UTMI_CLK>; +- assigned-clock-rates = <133330000>, +- <24000000>; +- resets = <&gcc GCC_USB1_BCR>; +- status = "disabled"; +- +- dwc_1: usb@7000000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x07000000 0x0 0xcd00>; +- interrupts = ; +- phys = <&qusb_phy_1>; +- phy-names = "usb2-phy"; +- tx-fifo-resize; +- snps,is-utmi-l1-suspend; +- snps,hird-threshold = /bits/ 8 <0x0>; +- snps,dis_u2_susphy_quirk; +- snps,dis_u3_susphy_quirk; +- dr_mode = "host"; +- }; +- }; ++ pcie0: pci@20000000 { ++ compatible = "qcom,pcie-ipq6018"; ++ reg = <0x0 0x20000000 0x0 0xf1d>, ++ <0x0 0x20000f20 0x0 0xa8>, ++ <0x0 0x20001000 0x0 0x1000>, ++ <0x0 0x80000 0x0 0x4000>, ++ <0x0 0x20100000 0x0 0x1000>; ++ reg-names = "dbi", "elbi", "atu", "parf", "config"; + +- ssphy_0: ssphy@78000 { +- compatible = "qcom,ipq6018-qmp-usb3-phy"; +- reg = <0x0 0x00078000 0x0 0x1c4>; +- #address-cells = <2>; ++ device_type = "pci"; ++ linux,pci-domain = <0>; ++ bus-range = <0x00 0xff>; ++ num-lanes = <1>; ++ max-link-speed = <3>; ++ #address-cells = <3>; + #size-cells = <2>; +- ranges; +- +- clocks = <&gcc GCC_USB0_AUX_CLK>, +- <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; +- clock-names = "aux", "cfg_ahb", "ref"; +- +- resets = <&gcc GCC_USB0_PHY_BCR>, +- <&gcc GCC_USB3PHY_0_PHY_BCR>; +- reset-names = "phy","common"; +- status = "disabled"; +- +- usb0_ssphy: phy@78200 { +- reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ +- <0x0 0x00078400 0x0 0x200>, /* Rx */ +- <0x0 0x00078800 0x0 0x1f8>, /* PCS */ +- <0x0 0x00078600 0x0 0x044>; /* PCS misc */ +- #phy-cells = <0>; +- #clock-cells = <0>; +- clocks = <&gcc GCC_USB0_PIPE_CLK>; +- clock-names = "pipe0"; +- clock-output-names = "gcc_usb0_pipe_clk_src"; +- }; +- }; + +- qusb_phy_0: qusb@79000 { +- compatible = "qcom,ipq6018-qusb2-phy"; +- reg = <0x0 0x00079000 0x0 0x180>; +- #phy-cells = <0>; ++ phys = <&pcie_phy0>; ++ phy-names = "pciephy"; + +- clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, +- <&xo>; +- clock-names = "cfg_ahb", "ref"; ++ ranges = <0x81000000 0 0x20200000 0 0x20200000 ++ 0 0x10000>, /* downstream I/O */ ++ <0x82000000 0 0x20220000 0 0x20220000 ++ 0 0xfde0000>; /* non-prefetchable memory */ + +- resets = <&gcc GCC_QUSB2_0_PHY_BCR>; +- status = "disabled"; +- }; ++ interrupts = ; ++ interrupt-names = "msi"; + +- usb3: usb@8af8800 { +- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; +- reg = <0x0 0x8af8800 0x0 0x400>; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 0x7>; ++ interrupt-map = <0 0 0 1 &intc 0 75 ++ IRQ_TYPE_LEVEL_HIGH>, /* int_a */ ++ <0 0 0 2 &intc 0 78 ++ IRQ_TYPE_LEVEL_HIGH>, /* int_b */ ++ <0 0 0 3 &intc 0 79 ++ IRQ_TYPE_LEVEL_HIGH>, /* int_c */ ++ <0 0 0 4 &intc 0 83 ++ IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + +- clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, +- <&gcc GCC_USB0_MASTER_CLK>, +- <&gcc GCC_USB0_SLEEP_CLK>, +- <&gcc GCC_USB0_MOCK_UTMI_CLK>; +- clock-names = "cfg_noc", +- "core", +- "sleep", +- "mock_utmi"; ++ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, ++ <&gcc GCC_PCIE0_AXI_M_CLK>, ++ <&gcc GCC_PCIE0_AXI_S_CLK>, ++ <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, ++ <&gcc PCIE0_RCHNG_CLK>; ++ clock-names = "iface", ++ "axi_m", ++ "axi_s", ++ "axi_bridge", ++ "rchng"; + +- assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, +- <&gcc GCC_USB0_MASTER_CLK>, +- <&gcc GCC_USB0_MOCK_UTMI_CLK>; +- assigned-clock-rates = <133330000>, +- <133330000>, +- <24000000>; ++ resets = <&gcc GCC_PCIE0_PIPE_ARES>, ++ <&gcc GCC_PCIE0_SLEEP_ARES>, ++ <&gcc GCC_PCIE0_CORE_STICKY_ARES>, ++ <&gcc GCC_PCIE0_AXI_MASTER_ARES>, ++ <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, ++ <&gcc GCC_PCIE0_AHB_ARES>, ++ <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, ++ <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; ++ reset-names = "pipe", ++ "sleep", ++ "sticky", ++ "axi_m", ++ "axi_s", ++ "ahb", ++ "axi_m_sticky", ++ "axi_s_sticky"; + +- resets = <&gcc GCC_USB0_BCR>; + status = "disabled"; +- +- dwc_0: usb@8a00000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x8a00000 0x0 0xcd00>; +- interrupts = ; +- phys = <&qusb_phy_0>, <&usb0_ssphy>; +- phy-names = "usb2-phy", "usb3-phy"; +- clocks = <&xo>; +- clock-names = "ref"; +- tx-fifo-resize; +- snps,is-utmi-l1-suspend; +- snps,hird-threshold = /bits/ 8 <0x0>; +- snps,dis_u2_susphy_quirk; +- snps,dis_u3_susphy_quirk; +- dr_mode = "host"; +- }; + }; + }; + +@@ -792,26 +816,4 @@ + #interrupt-cells = <2>; + }; + }; +- +- rpm-glink { +- compatible = "qcom,glink-rpm"; +- interrupts = ; +- qcom,rpm-msg-ram = <&rpm_msg_ram>; +- mboxes = <&apcs_glb 0>; +- +- rpm_requests: glink-channel { +- compatible = "qcom,rpm-ipq6018"; +- qcom,glink-channels = "rpm_requests"; +- +- regulators { +- compatible = "qcom,rpm-mp5496-regulators"; +- +- ipq6018_s2: s2 { +- regulator-min-microvolt = <725000>; +- regulator-max-microvolt = <1062500>; +- regulator-always-on; +- }; +- }; +- }; +- }; + }; diff --git a/target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch b/target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch new file mode 100644 index 00000000000000..a883e305dfd82b --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch @@ -0,0 +1,92 @@ +From 6db9ed9a128cbae1423d043f3debd8bfa77783fd Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio +Date: Mon, 2 Jan 2023 10:46:29 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq6018: Add/remove some newlines + +Some lines were broken very aggresively, presumably to fit under 80 chars +and some places could have used a newline, particularly between subsequent +nodes. Address all that and remove redundant comments near PCIe ranges +while at it so as not to exceed 100 chars needlessly. + +Signed-off-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230102094642.74254-5-konrad.dybcio@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 26 ++++++++++++-------------- + 1 file changed, 12 insertions(+), 14 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -102,26 +102,31 @@ + opp-microvolt = <725000>; + clock-latency-ns = <200000>; + }; ++ + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <787500>; + clock-latency-ns = <200000>; + }; ++ + opp-1320000000 { + opp-hz = /bits/ 64 <1320000000>; + opp-microvolt = <862500>; + clock-latency-ns = <200000>; + }; ++ + opp-1440000000 { + opp-hz = /bits/ 64 <1440000000>; + opp-microvolt = <925000>; + clock-latency-ns = <200000>; + }; ++ + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <987500>; + clock-latency-ns = <200000>; + }; ++ + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1062500>; +@@ -131,8 +136,7 @@ + + pmuv8: pmu { + compatible = "arm,cortex-a53-pmu"; +- interrupts = ; ++ interrupts = ; + }; + + psci: psci { +@@ -734,24 +738,18 @@ + phys = <&pcie_phy0>; + phy-names = "pciephy"; + +- ranges = <0x81000000 0 0x20200000 0 0x20200000 +- 0 0x10000>, /* downstream I/O */ +- <0x82000000 0 0x20220000 0 0x20220000 +- 0 0xfde0000>; /* non-prefetchable memory */ ++ ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, ++ <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; + + interrupts = ; + interrupt-names = "msi"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; +- interrupt-map = <0 0 0 1 &intc 0 75 +- IRQ_TYPE_LEVEL_HIGH>, /* int_a */ +- <0 0 0 2 &intc 0 78 +- IRQ_TYPE_LEVEL_HIGH>, /* int_b */ +- <0 0 0 3 &intc 0 79 +- IRQ_TYPE_LEVEL_HIGH>, /* int_c */ +- <0 0 0 4 &intc 0 83 +- IRQ_TYPE_LEVEL_HIGH>; /* int_d */ ++ interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ ++ <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ ++ <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ ++ <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, + <&gcc GCC_PCIE0_AXI_M_CLK>, diff --git a/target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch b/target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch new file mode 100644 index 00000000000000..35aa46bb10aec9 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch @@ -0,0 +1,25 @@ +From 7356ae3e10abd1d71f06ff0b8a8e72aa7c955c57 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio +Date: Mon, 2 Jan 2023 10:46:30 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq6018: Use lowercase hex + +One value escaped my previous lowercase hexification. Take care of it. + +Signed-off-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230102094642.74254-6-konrad.dybcio@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -381,7 +381,7 @@ + + usb2: usb@70f8800 { + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; +- reg = <0x0 0x070F8800 0x0 0x400>; ++ reg = <0x0 0x070f8800 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; diff --git a/target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch b/target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch new file mode 100644 index 00000000000000..c939d126bf70cb --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch @@ -0,0 +1,28 @@ +From 679ee73bbee28cab441008f8cca38160cc8f3d05 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Wed, 8 Feb 2023 11:15:39 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq6018: align RPM G-Link node with + bindings + +Bindings expect (and most of DTS use) the RPM G-Link node name to be +"rpm-requests". + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Dmitry Baryshkov +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230208101545.45711-1-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -176,7 +176,7 @@ + qcom,rpm-msg-ram = <&rpm_msg_ram>; + mboxes = <&apcs_glb 0>; + +- rpm_requests: glink-channel { ++ rpm_requests: rpm-requests { + compatible = "qcom,rpm-ipq6018"; + qcom,glink-channels = "rpm_requests"; + diff --git a/target/linux/qualcommax/patches-6.1/0038-v6.4-arm64-dts-qcom-ipq6018-cp01-c1-drop-SPI-cs-select.patch b/target/linux/qualcommax/patches-6.1/0038-v6.4-arm64-dts-qcom-ipq6018-cp01-c1-drop-SPI-cs-select.patch new file mode 100644 index 00000000000000..28688069b8e87f --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0038-v6.4-arm64-dts-qcom-ipq6018-cp01-c1-drop-SPI-cs-select.patch @@ -0,0 +1,27 @@ +From afa8eb675fc6dd606783ed2350de90927d6fb9d3 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Wed, 8 Mar 2023 13:59:01 +0100 +Subject: [PATCH] arm64: dts: qcom: ipq6018-cp01-c1: drop SPI cs-select + +The SPI controller nodes do not use/allow cs-select property: + + ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('cs-select' was unexpected) + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230308125906.236885-6-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts ++++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts +@@ -36,7 +36,6 @@ + }; + + &blsp1_spi1 { +- cs-select = <0>; + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; diff --git a/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch b/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch new file mode 100644 index 00000000000000..d1280b528bec62 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch @@ -0,0 +1,92 @@ +From 0cd4e90cb2dec02ff859f5c98f744f43a23aea65 Mon Sep 17 00:00:00 2001 +From: Vignesh Viswanathan +Date: Fri, 26 May 2023 16:36:53 +0530 +Subject: [PATCH] arm64: dts: qcom: add few more reserved memory region + +In IPQ SoCs, bootloader will collect the system RAM contents upon crash +for the post morterm analysis. If we don't reserve the memory region used +by bootloader, obviously linux will consume it and upon next boot on +crash, bootloader will be loaded in the same region, which will lead to +loose some of the data, sometimes we may miss out critical information. +So lets reserve the region used by the bootloader. + +Similarly SBL copies some data into the reserved region and it will be +used in the crash scenario. So reserve 1MB for SBL as well. + +While at it, drop the size padding in the reserved memory region, +wherever applicable. + +Signed-off-by: Vignesh Viswanathan +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 +++++++++++++--- + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++-- + 2 files changed, 25 insertions(+), 5 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -154,18 +154,28 @@ + no-map; + }; + ++ bootloader@4a100000 { ++ reg = <0x0 0x4a100000 0x0 0x400000>; ++ no-map; ++ }; ++ ++ sbl@4a500000 { ++ reg = <0x0 0x4a500000 0x0 0x100000>; ++ no-map; ++ }; ++ + tz: memory@4a600000 { +- reg = <0x0 0x4a600000 0x0 0x00400000>; ++ reg = <0x0 0x4a600000 0x0 0x400000>; + no-map; + }; + + smem_region: memory@4aa00000 { +- reg = <0x0 0x4aa00000 0x0 0x00100000>; ++ reg = <0x0 0x4aa00000 0x0 0x100000>; + no-map; + }; + + q6_region: memory@4ab00000 { +- reg = <0x0 0x4ab00000 0x0 0x05500000>; ++ reg = <0x0 0x4ab00000 0x0 0x5500000>; + no-map; + }; + }; +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -85,17 +85,27 @@ + #size-cells = <2>; + ranges; + ++ bootloader@4a600000 { ++ reg = <0x0 0x4a600000 0x0 0x400000>; ++ no-map; ++ }; ++ ++ sbl@4aa00000 { ++ reg = <0x0 0x4aa00000 0x0 0x100000>; ++ no-map; ++ }; ++ + smem@4ab00000 { + compatible = "qcom,smem"; +- reg = <0x0 0x4ab00000 0x0 0x00100000>; ++ reg = <0x0 0x4ab00000 0x0 0x100000>; + no-map; + + hwlocks = <&tcsr_mutex 3>; + }; + + memory@4ac00000 { ++ reg = <0x0 0x4ac00000 0x0 0x400000>; + no-map; +- reg = <0x0 0x4ac00000 0x0 0x00400000>; + }; + }; + diff --git a/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch b/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch new file mode 100644 index 00000000000000..6dd185f6e0607f --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch @@ -0,0 +1,49 @@ +From 9b2406aaba7841863ac041225316c1ec1c86ea36 Mon Sep 17 00:00:00 2001 +From: Vignesh Viswanathan +Date: Fri, 26 May 2023 16:36:52 +0530 +Subject: [PATCH] arm64: dts: qcom: enable the download mode support + +Like any other Qualcomm SoCs, IPQ8074 and IPQ6018 also supports the +download mode to collect the RAM dumps if system crashes, to perform +the post mortem analysis. Add support for the same. + +Signed-off-by: Vignesh Viswanathan +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230526110653.27777-3-quic_viswanat@quicinc.com +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 1 + + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++++ + 2 files changed, 7 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -90,6 +90,7 @@ + firmware { + scm { + compatible = "qcom,scm-ipq6018", "qcom,scm"; ++ qcom,dload-mode = <&tcsr 0x6100>; + }; + }; + +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -112,6 +112,7 @@ + firmware { + scm { + compatible = "qcom,scm-ipq8074", "qcom,scm"; ++ qcom,dload-mode = <&tcsr 0x6100>; + }; + }; + +@@ -386,6 +387,11 @@ + #hwlock-cells = <1>; + }; + ++ tcsr: syscon@1937000 { ++ compatible = "qcom,tcsr-ipq8074", "syscon"; ++ reg = <0x01937000 0x21000>; ++ }; ++ + spmi_bus: spmi@200f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0200f000 0x001000>, diff --git a/target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch b/target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch new file mode 100644 index 00000000000000..e9b92b596e92b2 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch @@ -0,0 +1,29 @@ +From 085058786a7890dd44ec623fe5ac74db870f6b93 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Wed, 19 Apr 2023 23:18:39 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: correct qrng unit address + +Match unit-address to reg entry to fix dtbs W=1 warnings: + + Warning (simple_bus_reg): /soc/qrng@e1000: simple-bus unit address format error, expected "e3000" + +Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes") +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230419211856.79332-1-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -312,7 +312,7 @@ + status = "disabled"; + }; + +- prng: qrng@e1000 { ++ prng: qrng@e3000 { + compatible = "qcom,prng-ee"; + reg = <0x0 0x000e3000 0x0 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; diff --git a/target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch b/target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch new file mode 100644 index 00000000000000..821c9890c6a6dd --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch @@ -0,0 +1,28 @@ +From 393595d4ffbd0a1fafd5548f8de1b8487a037cf2 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Thu, 20 Apr 2023 08:36:04 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: add unit address to soc node + +"soc" node is supposed to have unit address: + + Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230420063610.11068-1-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -209,7 +209,7 @@ + hwlocks = <&tcsr_mutex 3>; + }; + +- soc: soc { ++ soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0 0x0 0xffffffff>; diff --git a/target/linux/qualcommax/patches-6.1/0037-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch b/target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch similarity index 92% rename from target/linux/qualcommax/patches-6.1/0037-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch rename to target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch index 552f2568b5d32b..68895c5c962df2 100644 --- a/target/linux/qualcommax/patches-6.1/0037-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch +++ b/target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch @@ -18,9 +18,9 @@ Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -179,6 +179,13 @@ - dma-ranges; - compatible = "simple-bus"; +@@ -312,6 +312,13 @@ + status = "disabled"; + }; + qfprom: efuse@a4000 { + compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; @@ -29,6 +29,6 @@ Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com + #size-cells = <1>; + }; + - prng: qrng@e1000 { + prng: qrng@e3000 { compatible = "qcom,prng-ee"; reg = <0x0 0x000e3000 0x0 0x1000>; diff --git a/target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch b/target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch new file mode 100644 index 00000000000000..b2057e588ea495 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch @@ -0,0 +1,37 @@ +From b8420d478aa3fc739fcdba6b4b945850b356cb3b Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Sun, 16 Apr 2023 14:37:25 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: drop incorrect SPI bus + spi-max-frequency + +The spi-max-frequency property belongs to SPI devices, not SPI +controller: + + ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230416123730.300863-1-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -458,7 +458,6 @@ + #size-cells = <0>; + reg = <0x0 0x078b5000 0x0 0x600>; + interrupts = ; +- spi-max-frequency = <50000000>; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; +@@ -473,7 +472,6 @@ + #size-cells = <0>; + reg = <0x0 0x078b6000 0x0 0x600>; + interrupts = ; +- spi-max-frequency = <50000000>; + clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; diff --git a/target/linux/qualcommax/patches-6.1/0045-v6.5-arm64-dts-qcom-ipq8074-drop-incorrect-SPI-bus.patch b/target/linux/qualcommax/patches-6.1/0045-v6.5-arm64-dts-qcom-ipq8074-drop-incorrect-SPI-bus.patch new file mode 100644 index 00000000000000..52ba16cc9f34cd --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0045-v6.5-arm64-dts-qcom-ipq8074-drop-incorrect-SPI-bus.patch @@ -0,0 +1,29 @@ +From e6e0e706940b64e3a77e0a4840037692f109bd5f Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Sun, 16 Apr 2023 14:37:26 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq8074: drop incorrect SPI bus + spi-max-frequency + +The spi-max-frequency property belongs to SPI devices, not SPI +controller: + + ipq8074-hk01.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230416123730.300863-2-krzysztof.kozlowski@linaro.org +--- + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -487,7 +487,6 @@ + #size-cells = <0>; + reg = <0x078b5000 0x600>; + interrupts = ; +- spi-max-frequency = <50000000>; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; diff --git a/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch b/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch new file mode 100644 index 00000000000000..9ae72730d8f711 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch @@ -0,0 +1,27 @@ +From 56e5ae0116aef87273cf1812d608645b076e4f02 Mon Sep 17 00:00:00 2001 +From: Mantas Pucka +Date: Tue, 25 Apr 2023 12:11:49 +0300 +Subject: [PATCH] clk: qcom: gcc-ipq6018: Use floor ops for sdcc clocks + +SDCC clocks must be rounded down to avoid overclocking the controller. + +Fixes: d9db07f088af ("clk: qcom: Add ipq6018 Global Clock Controller support") +Signed-off-by: Mantas Pucka +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/1682413909-24927-1-git-send-email-mantas@8devices.com +--- + drivers/clk/qcom/gcc-ipq6018.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/qcom/gcc-ipq6018.c ++++ b/drivers/clk/qcom/gcc-ipq6018.c +@@ -1702,7 +1702,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl + .name = "usb0_mock_utmi_clk_src", + .parent_data = gcc_xo_gpll6_gpll0_gpll0_out_main_div2, + .num_parents = 4, +- .ops = &clk_rcg2_ops, ++ .ops = &clk_rcg2_floor_ops, + }, + }; + diff --git a/target/linux/qualcommax/patches-6.1/0026-v6.5-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch b/target/linux/qualcommax/patches-6.1/0047-v6.6-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch similarity index 92% rename from target/linux/qualcommax/patches-6.1/0026-v6.5-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch rename to target/linux/qualcommax/patches-6.1/0047-v6.6-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch index 30da78f08e6615..19dc9482e67df4 100644 --- a/target/linux/qualcommax/patches-6.1/0026-v6.5-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch +++ b/target/linux/qualcommax/patches-6.1/0047-v6.6-clk-qcom-gcc-ipq6018-drop-redundant-F-define.patch @@ -1,4 +1,4 @@ -From 1e8a314a1b87eaba496fcc6dc0efef573b3c186d Mon Sep 17 00:00:00 2001 +From 923f7d678b2ae3d522543058514d5605c185633b Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 17 Apr 2023 19:44:07 +0200 Subject: [PATCH] clk: qcom: gcc-ipq6018: drop redundant F define diff --git a/target/linux/qualcommax/patches-6.1/0033-v6.5-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch b/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch similarity index 94% rename from target/linux/qualcommax/patches-6.1/0033-v6.5-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch rename to target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch index 7f53734f29f8f6..e38b40278cb4ef 100644 --- a/target/linux/qualcommax/patches-6.1/0033-v6.5-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch +++ b/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch @@ -1,4 +1,4 @@ -From 91e7c87f0ec1d644afb65cf3a16ded874c9d4ab9 Mon Sep 17 00:00:00 2001 +From f4f0c8acee0e41c5fbae7a7ad06087668ddce0d6 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Fri, 26 May 2023 21:08:54 +0200 Subject: [PATCH] clk: qcom: gcc-ipq6018: update UBI32 PLL diff --git a/target/linux/qualcommax/patches-6.1/0034-v6.5-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch b/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch similarity index 95% rename from target/linux/qualcommax/patches-6.1/0034-v6.5-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch rename to target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch index 2de9efd3766d39..e4faac1b6e2c64 100644 --- a/target/linux/qualcommax/patches-6.1/0034-v6.5-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch +++ b/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch @@ -1,4 +1,4 @@ -From 3f2fbfe6e4f6f2bdd1da8ef5aceba3945c4ada57 Mon Sep 17 00:00:00 2001 +From 5ae7899765607e97e5eb34486336898c8d9ec654 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 1 Jun 2023 23:34:12 +0200 Subject: [PATCH] clk: qcom: gcc-ipq6018: remove duplicate initializers diff --git a/target/linux/qualcommax/patches-6.1/0050-v6.6-soc-qcom-Add-RPM-processor-subsystem-driver.patch b/target/linux/qualcommax/patches-6.1/0050-v6.6-soc-qcom-Add-RPM-processor-subsystem-driver.patch new file mode 100644 index 00000000000000..c2c26fb079830b --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0050-v6.6-soc-qcom-Add-RPM-processor-subsystem-driver.patch @@ -0,0 +1,132 @@ +From 8ddfa81d090c71fd6cb3cb8ca1d420c0da33a575 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Thu, 15 Jun 2023 18:50:42 +0200 +Subject: [PATCH] soc: qcom: Add RPM processor/subsystem driver + +Add a simple driver for the qcom,rpm-proc compatible that registers the +"smd-edge" and populates other children defined in the device tree. + +Note that the DT schema belongs to the remoteproc subsystem while this +driver is added inside soc/qcom. I argue that the RPM *is* a remoteproc, +but as an implementation detail in Linux it can currently not benefit +from anything provided by the remoteproc subsystem. The RPM firmware is +usually already loaded and started by earlier components in the boot +chain and is not meant to be ever restarted. + +To avoid breaking existing kernel configurations the driver is always +built when smd-rpm.c is also built. They belong closely together anyway. +To avoid build errors CONFIG_RPMSG_QCOM_SMD must be also built-in if +rpm-proc is. + +Reviewed-by: Konrad Dybcio +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-9-a07dcdefd918@gerhold.net +Signed-off-by: Bjorn Andersson +--- + drivers/soc/qcom/Kconfig | 1 + + drivers/soc/qcom/Makefile | 2 +- + drivers/soc/qcom/rpm-proc.c | 77 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 79 insertions(+), 1 deletion(-) + create mode 100644 drivers/soc/qcom/rpm-proc.c + +--- a/drivers/soc/qcom/Kconfig ++++ b/drivers/soc/qcom/Kconfig +@@ -153,6 +153,7 @@ config QCOM_SMD_RPM + tristate "Qualcomm Resource Power Manager (RPM) over SMD" + depends on ARCH_QCOM || COMPILE_TEST + depends on RPMSG ++ depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n + help + If you say yes to this option, support will be included for the + Resource Power Manager system found in the Qualcomm 8974 based +--- a/drivers/soc/qcom/Makefile ++++ b/drivers/soc/qcom/Makefile +@@ -14,7 +14,7 @@ obj-$(CONFIG_QCOM_RMTFS_MEM) += rmtfs_me + obj-$(CONFIG_QCOM_RPMH) += qcom_rpmh.o + qcom_rpmh-y += rpmh-rsc.o + qcom_rpmh-y += rpmh.o +-obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o ++obj-$(CONFIG_QCOM_SMD_RPM) += rpm-proc.o smd-rpm.o + obj-$(CONFIG_QCOM_SMEM) += smem.o + obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o + obj-$(CONFIG_QCOM_SMP2P) += smp2p.o +--- /dev/null ++++ b/drivers/soc/qcom/rpm-proc.c +@@ -0,0 +1,77 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* Copyright (c) 2021-2023, Stephan Gerhold */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++static int rpm_proc_probe(struct platform_device *pdev) ++{ ++ struct qcom_smd_edge *edge = NULL; ++ struct device *dev = &pdev->dev; ++ struct device_node *edge_node; ++ int ret; ++ ++ edge_node = of_get_child_by_name(dev->of_node, "smd-edge"); ++ if (edge_node) { ++ edge = qcom_smd_register_edge(dev, edge_node); ++ of_node_put(edge_node); ++ if (IS_ERR(edge)) ++ return dev_err_probe(dev, PTR_ERR(edge), ++ "Failed to register smd-edge\n"); ++ } ++ ++ ret = devm_of_platform_populate(dev); ++ if (ret) { ++ dev_err(dev, "Failed to populate child devices: %d\n", ret); ++ goto err; ++ } ++ ++ platform_set_drvdata(pdev, edge); ++ return 0; ++err: ++ if (edge) ++ qcom_smd_unregister_edge(edge); ++ return ret; ++} ++ ++static void rpm_proc_remove(struct platform_device *pdev) ++{ ++ struct qcom_smd_edge *edge = platform_get_drvdata(pdev); ++ ++ if (edge) ++ qcom_smd_unregister_edge(edge); ++} ++ ++static const struct of_device_id rpm_proc_of_match[] = { ++ { .compatible = "qcom,rpm-proc", }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, rpm_proc_of_match); ++ ++static struct platform_driver rpm_proc_driver = { ++ .probe = rpm_proc_probe, ++ .remove_new = rpm_proc_remove, ++ .driver = { ++ .name = "qcom-rpm-proc", ++ .of_match_table = rpm_proc_of_match, ++ }, ++}; ++ ++static int __init rpm_proc_init(void) ++{ ++ return platform_driver_register(&rpm_proc_driver); ++} ++arch_initcall(rpm_proc_init); ++ ++static void __exit rpm_proc_exit(void) ++{ ++ platform_driver_unregister(&rpm_proc_driver); ++} ++module_exit(rpm_proc_exit); ++ ++MODULE_DESCRIPTION("Qualcomm RPM processor/subsystem driver"); ++MODULE_AUTHOR("Stephan Gerhold "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch b/target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch new file mode 100644 index 00000000000000..746a391b42e8fc --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch @@ -0,0 +1,93 @@ +From 7e1acc8b92a3b67db1e5255adae2851d58d74434 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Thu, 15 Jun 2023 18:50:44 +0200 +Subject: [PATCH] arm64: dts: qcom: Add rpm-proc node for GLINK gplatforms + +Rather than having the RPM GLINK channels as the only child of a dummy +top-level rpm-glink node, switch to representing the RPM as remoteproc +like all the other remoteprocs (modem DSP, ...). + +This allows assigning additional subdevices to it like the MPM +interrupt-controller or rpm-master-stats. + +Tested-by: Konrad Dybcio # SM6375 +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-11-a07dcdefd918@gerhold.net +Signed-off-by: Bjorn Andersson +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 48 ++++---- + arch/arm64/boot/dts/qcom/ipq9574.dtsi | 28 +++-- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 113 +++++++++---------- + arch/arm64/boot/dts/qcom/msm8998.dtsi | 102 ++++++++--------- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 126 ++++++++++----------- + arch/arm64/boot/dts/qcom/qcs404.dtsi | 152 +++++++++++++------------- + arch/arm64/boot/dts/qcom/sdm630.dtsi | 132 +++++++++++----------- + arch/arm64/boot/dts/qcom/sm6115.dtsi | 128 +++++++++++----------- + arch/arm64/boot/dts/qcom/sm6125.dtsi | 140 ++++++++++++------------ + arch/arm64/boot/dts/qcom/sm6375.dtsi | 126 ++++++++++----------- + 10 files changed, 566 insertions(+), 529 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -145,6 +145,32 @@ + method = "smc"; + }; + ++ rpm: remoteproc { ++ compatible = "qcom,ipq6018-rpm-proc", "qcom,rpm-proc"; ++ ++ glink-edge { ++ compatible = "qcom,glink-rpm"; ++ interrupts = ; ++ qcom,rpm-msg-ram = <&rpm_msg_ram>; ++ mboxes = <&apcs_glb 0>; ++ ++ rpm_requests: rpm-requests { ++ compatible = "qcom,rpm-ipq6018"; ++ qcom,glink-channels = "rpm_requests"; ++ ++ regulators { ++ compatible = "qcom,rpm-mp5496-regulators"; ++ ++ ipq6018_s2: s2 { ++ regulator-min-microvolt = <725000>; ++ regulator-max-microvolt = <1062500>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ }; ++ }; ++ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; +@@ -181,28 +207,6 @@ + }; + }; + +- rpm-glink { +- compatible = "qcom,glink-rpm"; +- interrupts = ; +- qcom,rpm-msg-ram = <&rpm_msg_ram>; +- mboxes = <&apcs_glb 0>; +- +- rpm_requests: rpm-requests { +- compatible = "qcom,rpm-ipq6018"; +- qcom,glink-channels = "rpm_requests"; +- +- regulators { +- compatible = "qcom,rpm-mp5496-regulators"; +- +- ipq6018_s2: s2 { +- regulator-min-microvolt = <725000>; +- regulator-max-microvolt = <1062500>; +- regulator-always-on; +- }; +- }; +- }; +- }; +- + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; diff --git a/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-include-the-GPLL0-as-clock-pr.patch b/target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch similarity index 54% rename from target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-include-the-GPLL0-as-clock-pr.patch rename to target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch index bfa04cd02d3c86..b70d7bf69c0af4 100644 --- a/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-include-the-GPLL0-as-clock-pr.patch +++ b/target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch @@ -1,25 +1,28 @@ -From a120815200adaf3ac28ccf3a1813c78b4be02cc4 Mon Sep 17 00:00:00 2001 +From 0133c7af3aa0420778d106cb90db708cfa45f2c6 Mon Sep 17 00:00:00 2001 From: Kathiravan Thirumoorthy Date: Thu, 14 Sep 2023 12:29:59 +0530 Subject: [PATCH] arm64: dts: qcom: ipq6018: include the GPLL0 as clock provider for mailbox -While the kernel is booting up, APSS PLL will be running at 800MHz with -GPLL0 as source. Once the cpufreq driver is available, APSS PLL will be -configured to the rate based on the opp table and the source also will -be changed to APSS_PLL_EARLY. So allow the mailbox to consume the GPLL0, -with this inclusion, CPU Freq correctly reports that CPU is running at -800MHz rather than 24MHz. +While the kernel is booting up, APSS clock / CPU clock will be running +at 800MHz with GPLL0 as source. Once the cpufreq driver is available, +APSS PLL will be configured to the rate based on the opp table and the +source also will be changed to APSS_PLL_EARLY. So allow the mailbox to +consume the GPLL0, with this inclusion, CPU Freq correctly reports that +CPU is running at 800MHz rather than 24MHz. Signed-off-by: Kathiravan Thirumoorthy Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20230913-gpll_cleanup-v2-9-c8ceb1a37680@quicinc.com +[bjorn: Updated commit message, as requested by Kathiravan] +Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -504,8 +504,8 @@ +@@ -618,8 +618,8 @@ compatible = "qcom,ipq6018-apcs-apps-global"; reg = <0x0 0x0b111000 0x0 0x1000>; #clock-cells = <1>; diff --git a/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch b/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch new file mode 100644 index 00000000000000..08585289332e07 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch @@ -0,0 +1,57 @@ +From 3dcf7b59393812a5fbd83f8cd8d34b94afb4c4d1 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sat, 21 Oct 2023 13:55:18 +0200 +Subject: [PATCH] clk: qcom: gcc-ipq6018: add QUP6 I2C clock + +QUP6 I2C clock is listed in the dt bindings but it was never included in +the GCC driver. +So lets add support for it, it is marked as criticial as it is used by RPM +to communicate to the external PMIC over I2C so this clock must not be +disabled. + +Signed-off-by: Robert Marko +Reviewed-by: Kathiravan Thirumoorthy +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20231021115545.229060-1-robimarko@gmail.com +Signed-off-by: Bjorn Andersson +--- + drivers/clk/qcom/gcc-ipq6018.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/drivers/clk/qcom/gcc-ipq6018.c ++++ b/drivers/clk/qcom/gcc-ipq6018.c +@@ -2120,6 +2120,26 @@ static struct clk_branch gcc_blsp1_qup5_ + }, + }; + ++static struct clk_branch gcc_blsp1_qup6_i2c_apps_clk = { ++ .halt_reg = 0x07010, ++ .clkr = { ++ .enable_reg = 0x07010, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_blsp1_qup6_i2c_apps_clk", ++ .parent_hws = (const struct clk_hw *[]){ ++ &blsp1_qup6_i2c_apps_clk_src.clkr.hw }, ++ .num_parents = 1, ++ /* ++ * RPM uses QUP6 I2C to communicate with the external ++ * PMIC so it must not be disabled. ++ */ ++ .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ + static struct clk_branch gcc_blsp1_qup6_spi_apps_clk = { + .halt_reg = 0x0700c, + .clkr = { +@@ -4276,6 +4296,7 @@ static struct clk_regmap *gcc_ipq6018_cl + [GCC_BLSP1_QUP4_SPI_APPS_CLK] = &gcc_blsp1_qup4_spi_apps_clk.clkr, + [GCC_BLSP1_QUP5_I2C_APPS_CLK] = &gcc_blsp1_qup5_i2c_apps_clk.clkr, + [GCC_BLSP1_QUP5_SPI_APPS_CLK] = &gcc_blsp1_qup5_spi_apps_clk.clkr, ++ [GCC_BLSP1_QUP6_I2C_APPS_CLK] = &gcc_blsp1_qup6_i2c_apps_clk.clkr, + [GCC_BLSP1_QUP6_SPI_APPS_CLK] = &gcc_blsp1_qup6_spi_apps_clk.clkr, + [GCC_BLSP1_UART1_APPS_CLK] = &gcc_blsp1_uart1_apps_clk.clkr, + [GCC_BLSP1_UART2_APPS_CLK] = &gcc_blsp1_uart2_apps_clk.clkr, diff --git a/target/linux/qualcommax/patches-6.1/0142-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch b/target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch similarity index 96% rename from target/linux/qualcommax/patches-6.1/0142-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch rename to target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch index 0eb21a4f90baba..1369a90a8a72b0 100644 --- a/target/linux/qualcommax/patches-6.1/0142-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch +++ b/target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch @@ -20,7 +20,7 @@ Signed-off-by: Bjorn Andersson --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -93,37 +93,49 @@ +@@ -95,42 +95,49 @@ }; cpu_opp_table: opp-table-cpu { @@ -35,35 +35,35 @@ Signed-off-by: Bjorn Andersson + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; -+ + opp-1056000000 { opp-hz = /bits/ 64 <1056000000>; opp-microvolt = <787500>; + opp-supported-hw = <0xf>; clock-latency-ns = <200000>; }; -+ + opp-1320000000 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <862500>; + opp-supported-hw = <0x3>; clock-latency-ns = <200000>; }; -+ + opp-1440000000 { opp-hz = /bits/ 64 <1440000000>; opp-microvolt = <925000>; + opp-supported-hw = <0x3>; clock-latency-ns = <200000>; }; -+ + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; -+ + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1062500>; @@ -71,7 +71,7 @@ Signed-off-by: Bjorn Andersson clock-latency-ns = <200000>; }; }; -@@ -189,6 +201,11 @@ +@@ -321,6 +328,11 @@ reg = <0x0 0x000a4000 0x0 0x2000>; #address-cells = <1>; #size-cells = <1>; @@ -82,4 +82,4 @@ Signed-off-by: Bjorn Andersson + }; }; - prng: qrng@e1000 { + prng: qrng@e3000 { diff --git a/target/linux/qualcommax/patches-6.1/0055-v6.8-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch b/target/linux/qualcommax/patches-6.1/0055-v6.8-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch new file mode 100644 index 00000000000000..ca3c89604706e0 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0055-v6.8-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch @@ -0,0 +1,81 @@ +From e6c32770ef83f3e8cc057f3920b1c06aa9d1c9c2 Mon Sep 17 00:00:00 2001 +From: Chukun Pan +Date: Sun, 3 Dec 2023 23:39:14 +0800 +Subject: [PATCH] arm64: dts: qcom: ipq6018: Add remaining QUP UART node + +Add node to support all the QUP UART node controller inside of IPQ6018. +Some routers use these bus to connect Bluetooth chips. + +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20231203153914.532654-1-amadeus@jmu.edu.cn +Signed-off-by: Bjorn Andersson +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 50 +++++++++++++++++++++++++++ + 1 file changed, 50 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -458,6 +458,26 @@ + qcom,ee = <0>; + }; + ++ blsp1_uart1: serial@78af000 { ++ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; ++ reg = <0x0 0x78af000 0x0 0x200>; ++ interrupts = ; ++ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, ++ <&gcc GCC_BLSP1_AHB_CLK>; ++ clock-names = "core", "iface"; ++ status = "disabled"; ++ }; ++ ++ blsp1_uart2: serial@78b0000 { ++ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; ++ reg = <0x0 0x78b0000 0x0 0x200>; ++ interrupts = ; ++ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, ++ <&gcc GCC_BLSP1_AHB_CLK>; ++ clock-names = "core", "iface"; ++ status = "disabled"; ++ }; ++ + blsp1_uart3: serial@78b1000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x078b1000 0x0 0x200>; +@@ -466,6 +486,36 @@ + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; ++ }; ++ ++ blsp1_uart4: serial@78b2000 { ++ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; ++ reg = <0x0 0x078b2000 0x0 0x200>; ++ interrupts = ; ++ clocks = <&gcc GCC_BLSP1_UART4_APPS_CLK>, ++ <&gcc GCC_BLSP1_AHB_CLK>; ++ clock-names = "core", "iface"; ++ status = "disabled"; ++ }; ++ ++ blsp1_uart5: serial@78b3000 { ++ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; ++ reg = <0x0 0x78b3000 0x0 0x200>; ++ interrupts = ; ++ clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>, ++ <&gcc GCC_BLSP1_AHB_CLK>; ++ clock-names = "core", "iface"; ++ status = "disabled"; ++ }; ++ ++ blsp1_uart6: serial@78b4000 { ++ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; ++ reg = <0x0 0x078b4000 0x0 0x200>; ++ interrupts = ; ++ clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>, ++ <&gcc GCC_BLSP1_AHB_CLK>; ++ clock-names = "core", "iface"; ++ status = "disabled"; + }; + + blsp1_spi1: spi@78b5000 { diff --git a/target/linux/qualcommax/patches-6.1/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch b/target/linux/qualcommax/patches-6.1/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch new file mode 100644 index 00000000000000..0f1b3e6a386ba5 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0056-v6.9-arm64-dts-qcom-Fix-hs_phy_irq-for-QUSB2-targets.patch @@ -0,0 +1,95 @@ +From 2c6597c72e9722ac020102d5af40126df0437b82 Mon Sep 17 00:00:00 2001 +From: Krishna Kurapati +Date: Fri, 26 Jan 2024 00:29:18 +0530 +Subject: [PATCH] arm64: dts: qcom: Fix hs_phy_irq for QUSB2 targets + +On several QUSB2 Targets, the hs_phy_irq mentioned is actually +qusb2_phy interrupt specific to QUSB2 PHY's. Rename hs_phy_irq +to qusb2_phy for such targets. + +In actuality, the hs_phy_irq is also present in these targets, but +kept in for debug purposes in hw test environments. This is not +triggered by default and its functionality is mutually exclusive +to that of qusb2_phy interrupt. + +Add missing hs_phy_irq's, pwr_event irq's for QUSB2 PHY targets. +Add missing ss_phy_irq on some targets which allows for remote +wakeup to work on a Super Speed link. + +Also modify order of interrupts in accordance to bindings update. +Since driver looks up for interrupts by name and not by index, it +is safe to modify order of these interrupts in the DT. + +Signed-off-by: Krishna Kurapati +Link: https://lore.kernel.org/r/20240125185921.5062-2-quic_kriskura@quicinc.com +Signed-off-by: Bjorn Andersson +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 13 +++++++++++++ + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++++ + arch/arm64/boot/dts/qcom/msm8953.dtsi | 7 +++++-- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 8 ++++++-- + arch/arm64/boot/dts/qcom/msm8998.dtsi | 7 +++++-- + arch/arm64/boot/dts/qcom/sdm630.dtsi | 17 +++++++++++++---- + arch/arm64/boot/dts/qcom/sm6115.dtsi | 9 +++++++-- + arch/arm64/boot/dts/qcom/sm6125.dtsi | 9 +++++++-- + 8 files changed, 70 insertions(+), 14 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -430,6 +430,12 @@ + <&gcc GCC_USB1_MOCK_UTMI_CLK>; + assigned-clock-rates = <133330000>, + <24000000>; ++ ++ interrupts = , ++ ; ++ interrupt-names = "pwr_event", ++ "qusb2_phy"; ++ + resets = <&gcc GCC_USB1_BCR>; + status = "disabled"; + +@@ -628,6 +634,13 @@ + <133330000>, + <24000000>; + ++ interrupts = , ++ , ++ ; ++ interrupt-names = "pwr_event", ++ "qusb2_phy", ++ "ss_phy_irq"; ++ + resets = <&gcc GCC_USB0_BCR>; + status = "disabled"; + +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -611,6 +611,13 @@ + <133330000>, + <19200000>; + ++ interrupts = , ++ , ++ ; ++ interrupt-names = "pwr_event", ++ "qusb2_phy", ++ "ss_phy_irq"; ++ + power-domains = <&gcc USB0_GDSC>; + + resets = <&gcc GCC_USB0_BCR>; +@@ -653,6 +660,13 @@ + <133330000>, + <19200000>; + ++ interrupts = , ++ , ++ ; ++ interrupt-names = "pwr_event", ++ "qusb2_phy", ++ "ss_phy_irq"; ++ + power-domains = <&gcc USB1_GDSC>; + + resets = <&gcc GCC_USB1_BCR>; diff --git a/target/linux/qualcommax/patches-6.1/0138-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-compatib.patch b/target/linux/qualcommax/patches-6.1/0057-v6.8-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-.patch similarity index 80% rename from target/linux/qualcommax/patches-6.1/0138-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-compatib.patch rename to target/linux/qualcommax/patches-6.1/0057-v6.8-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-.patch index 21e60c632799d8..25d56870a475df 100644 --- a/target/linux/qualcommax/patches-6.1/0138-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-compatib.patch +++ b/target/linux/qualcommax/patches-6.1/0057-v6.8-hwspinlock-qcom-Remove-IPQ6018-SOC-specific-.patch @@ -1,7 +1,7 @@ -From a120815200adaf3ac28ccf3a1813c78b4be02cc4 Mon Sep 17 00:00:00 2001 +From c3dc3d079d191c9149496b3c7fe1ece909386d93 Mon Sep 17 00:00:00 2001 From: Vignesh Viswanathan Date: Tue, 5 Sep 2023 15:25:35 +0530 -Subject: [PATCH v2 2/2] hwspinlock: qcom: Remove IPQ6018 SOC specific compatible +Subject: [PATCH] hwspinlock: qcom: Remove IPQ6018 SOC specific compatible IPQ6018 has 32 tcsr_mutex hwlock registers with stride 0x1000. The compatible string qcom,ipq6018-tcsr-mutex is mapped to @@ -11,13 +11,11 @@ and doesn't match the HW present in IPQ6018. Remove IPQ6018 specific compatible string so that it fallsback to of_tcsr_mutex data which maps to the correct configuration for IPQ6018. -Changes in v2: - - Updated commit message - - Added Fixes and stable tags - -Cc: stable@vger.kernel.org Fixes: 5d4753f741d8 ("hwspinlock: qcom: add support for MMIO on older SoCs") Signed-off-by: Vignesh Viswanathan +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20230905095535.1263113-3-quic_viswanat@quicinc.com +Signed-off-by: Bjorn Andersson --- drivers/hwspinlock/qcom_hwspinlock.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/qualcommax/patches-6.1/0140-arm64-dts-qcom-ipq6018-add-tsens-node.patch b/target/linux/qualcommax/patches-6.1/0058-v6.9-arm64-dts-qcom-ipq6018-add-tsens-node.patch similarity index 72% rename from target/linux/qualcommax/patches-6.1/0140-arm64-dts-qcom-ipq6018-add-tsens-node.patch rename to target/linux/qualcommax/patches-6.1/0058-v6.9-arm64-dts-qcom-ipq6018-add-tsens-node.patch index f3fa4fe6c87e6b..9de90e4da62c3b 100644 --- a/target/linux/qualcommax/patches-6.1/0140-arm64-dts-qcom-ipq6018-add-tsens-node.patch +++ b/target/linux/qualcommax/patches-6.1/0058-v6.9-arm64-dts-qcom-ipq6018-add-tsens-node.patch @@ -1,19 +1,21 @@ -From 946b1a565a60a04f8e5171a79a463f99485a3531 Mon Sep 17 00:00:00 2001 +From 0b17197055b528da22e9385200e61b847b499d48 Mon Sep 17 00:00:00 2001 From: Mantas Pucka -Date: Wed, 24 Jan 2024 15:07:24 +0200 -Subject: [PATCH 2/3] arm64: dts: qcom: ipq6018: add tsens node +Date: Thu, 25 Jan 2024 11:04:11 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: add tsens node IPQ6018 has temperature sensing HW block compatible with IPQ8074. Add node for it. Signed-off-by: Mantas Pucka +Link: https://lore.kernel.org/r/1706173452-1017-3-git-send-email-mantas@8devices.com +Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -193,6 +193,16 @@ +@@ -342,6 +342,16 @@ clock-names = "core"; }; diff --git a/target/linux/qualcommax/patches-6.1/0141-arm64-dts-qcom-ipq6018-add-thermal-zones.patch b/target/linux/qualcommax/patches-6.1/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch similarity index 88% rename from target/linux/qualcommax/patches-6.1/0141-arm64-dts-qcom-ipq6018-add-thermal-zones.patch rename to target/linux/qualcommax/patches-6.1/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch index 9b4ab43b62df2b..dab433348a3dfb 100644 --- a/target/linux/qualcommax/patches-6.1/0141-arm64-dts-qcom-ipq6018-add-thermal-zones.patch +++ b/target/linux/qualcommax/patches-6.1/0059-v6.9-arm64-dts-qcom-ipq6018-add-thermal-zones.patch @@ -1,14 +1,16 @@ -From 92c65f959ec2b8d1ab26efe246b29ed538b45c86 Mon Sep 17 00:00:00 2001 +From 8f053e5616352943e16966f195f5a7a161e6fe7d Mon Sep 17 00:00:00 2001 From: Mantas Pucka -Date: Wed, 24 Jan 2024 15:10:43 +0200 -Subject: [PATCH 3/3] arm64: dts: qcom: ipq6018: add thermal zones +Date: Thu, 25 Jan 2024 11:04:12 +0200 +Subject: [PATCH] arm64: dts: qcom: ipq6018: add thermal zones Add thermal zones to make use of thermal sensors data. For CPU zone, add cooling device that uses CPU frequency scaling. Signed-off-by: Mantas Pucka +Link: https://lore.kernel.org/r/1706173452-1017-4-git-send-email-mantas@8devices.com +Signed-off-by: Bjorn Andersson --- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 121 ++++++++++++++++++++++++++++++++++ + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 121 ++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -53,11 +55,10 @@ Signed-off-by: Mantas Pucka }; L2_0: l2-cache { -@@ -808,6 +813,122 @@ - }; +@@ -888,6 +893,122 @@ }; }; -+ + + thermal-zones { + nss-top-thermal { + polling-delay-passive = <250>; @@ -173,6 +174,7 @@ Signed-off-by: Mantas Pucka + }; + }; + }; - - wcss: wcss-smp2p { - compatible = "qcom,smp2p"; ++ + timer { + compatible = "arm,armv8-timer"; + interrupts = , diff --git a/target/linux/qualcommax/patches-6.1/0036-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch b/target/linux/qualcommax/patches-6.1/0060-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch similarity index 92% rename from target/linux/qualcommax/patches-6.1/0036-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch rename to target/linux/qualcommax/patches-6.1/0060-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch index bbe8b19c46a0d5..e72d1180c58c94 100644 --- a/target/linux/qualcommax/patches-6.1/0036-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch +++ b/target/linux/qualcommax/patches-6.1/0060-v6.9-clk-qcom-gcc-ipq6018-add-qdss_at-clock-needed-for-wi.patch @@ -17,7 +17,7 @@ Signed-off-by: Bjorn Andersson --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -3503,6 +3503,22 @@ static struct clk_branch gcc_prng_ahb_cl +@@ -3523,6 +3523,22 @@ static struct clk_branch gcc_prng_ahb_cl }, }; @@ -40,7 +40,7 @@ Signed-off-by: Bjorn Andersson static struct clk_branch gcc_qdss_dap_clk = { .halt_reg = 0x29084, .clkr = { -@@ -4341,6 +4357,7 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4362,6 +4378,7 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_SYS_NOC_PCIE0_AXI_CLK] = &gcc_sys_noc_pcie0_axi_clk.clkr, [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr, [GCC_PRNG_AHB_CLK] = &gcc_prng_ahb_clk.clkr, diff --git a/target/linux/qualcommax/patches-6.1/0035-v6.9-phy-qcom-qmp-usb-fix-serdes-init-sequence-for-IPQ601.patch b/target/linux/qualcommax/patches-6.1/0061-v6.8-phy-qcom-qmp-usb-fix-serdes-init-sequence-for-IPQ6018.patch similarity index 100% rename from target/linux/qualcommax/patches-6.1/0035-v6.9-phy-qcom-qmp-usb-fix-serdes-init-sequence-for-IPQ601.patch rename to target/linux/qualcommax/patches-6.1/0061-v6.8-phy-qcom-qmp-usb-fix-serdes-init-sequence-for-IPQ6018.patch diff --git a/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch b/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch index af53c077ff1eca..3996d15d9d983e 100644 --- a/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch +++ b/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch @@ -19,7 +19,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -85,6 +85,26 @@ +@@ -85,6 +85,16 @@ #size-cells = <2>; ranges; @@ -33,22 +33,12 @@ Signed-off-by: Robert Marko + reg = <0x0 0x4a400000 0x0 0x00200000>; + }; + -+ uboot@4a600000 { -+ no-map; -+ reg = <0x0 0x4a600000 0x0 0x00400000>; -+ }; -+ -+ sbl@4aa00000 { -+ no-map; -+ reg = <0x0 0x4aa00000 0x0 0x00100000>; -+ }; -+ - smem@4ab00000 { - compatible = "qcom,smem"; - reg = <0x0 0x4ab00000 0x0 0x00100000>; -@@ -97,6 +117,21 @@ + bootloader@4a600000 { + reg = <0x0 0x4a600000 0x0 0x400000>; + no-map; +@@ -107,6 +117,21 @@ + reg = <0x0 0x4ac00000 0x0 0x400000>; no-map; - reg = <0x0 0x4ac00000 0x0 0x00400000>; }; + + q6_region: wcnss@4b000000 { diff --git a/target/linux/qualcommax/patches-6.1/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch b/target/linux/qualcommax/patches-6.1/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch index 4bd0d9298f8a6a..fd97663513e7d0 100644 --- a/target/linux/qualcommax/patches-6.1/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch +++ b/target/linux/qualcommax/patches-6.1/0110-arm64-dts-qcom-ipq8074-pass-QMP-PCI-PHY-PIPE-clocks-.patch @@ -17,7 +17,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -398,8 +398,8 @@ +@@ -399,8 +399,8 @@ gcc: gcc@1800000 { compatible = "qcom,gcc-ipq8074"; reg = <0x01800000 0x80000>; diff --git a/target/linux/qualcommax/patches-6.1/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch b/target/linux/qualcommax/patches-6.1/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch index 2aedbd7028039c..30cc69fcebd650 100644 --- a/target/linux/qualcommax/patches-6.1/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch +++ b/target/linux/qualcommax/patches-6.1/0111-arm64-dts-qcom-ipq8074-use-msi-parent-for-PCIe.patch @@ -12,7 +12,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -701,7 +701,7 @@ +@@ -720,7 +720,7 @@ reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>; ranges = <0 0xb00a000 0xffd>; @@ -21,7 +21,7 @@ Signed-off-by: Robert Marko compatible = "arm,gic-v2m-frame"; msi-controller; reg = <0x0 0xffd>; -@@ -813,8 +813,7 @@ +@@ -833,8 +833,7 @@ ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */ <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */ @@ -31,7 +31,7 @@ Signed-off-by: Robert Marko #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 142 -@@ -875,8 +874,7 @@ +@@ -895,8 +894,7 @@ ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */ <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */ diff --git a/target/linux/qualcommax/patches-6.1/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch b/target/linux/qualcommax/patches-6.1/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch index f5f93d389ef746..3d92386bb1a67a 100644 --- a/target/linux/qualcommax/patches-6.1/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch +++ b/target/linux/qualcommax/patches-6.1/0120-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch @@ -16,7 +16,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -140,6 +140,32 @@ +@@ -141,6 +141,32 @@ }; }; @@ -49,8 +49,8 @@ Signed-off-by: Robert Marko soc: soc { #address-cells = <0x1>; #size-cells = <0x1>; -@@ -411,6 +437,11 @@ - #hwlock-cells = <1>; +@@ -417,6 +443,11 @@ + reg = <0x01937000 0x21000>; }; + tcsr_q6: syscon@1945000 { @@ -61,7 +61,7 @@ Signed-off-by: Robert Marko spmi_bus: spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0200f000 0x001000>, -@@ -915,6 +946,56 @@ +@@ -935,6 +966,56 @@ "axi_s_sticky"; status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.1/0121-arm64-dts-ipq8074-Add-WLAN-node.patch b/target/linux/qualcommax/patches-6.1/0121-arm64-dts-ipq8074-Add-WLAN-node.patch index 1aaa187d8acea6..299adb5ff8ea6e 100644 --- a/target/linux/qualcommax/patches-6.1/0121-arm64-dts-ipq8074-Add-WLAN-node.patch +++ b/target/linux/qualcommax/patches-6.1/0121-arm64-dts-ipq8074-Add-WLAN-node.patch @@ -15,7 +15,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -996,6 +996,117 @@ +@@ -1016,6 +1016,117 @@ }; }; }; diff --git a/target/linux/qualcommax/patches-6.1/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch b/target/linux/qualcommax/patches-6.1/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch index 5776ab1af74173..8ec46601236368 100644 --- a/target/linux/qualcommax/patches-6.1/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch +++ b/target/linux/qualcommax/patches-6.1/0129-arm64-dts-qcom-ipq8074-add-QFPROM-fuses.patch @@ -12,7 +12,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi -@@ -342,6 +342,113 @@ +@@ -343,6 +343,113 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-add-SDHCI-node.patch b/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-add-SDHCI-node.patch index 329c83a6537710..bfca74ba766e12 100644 --- a/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-add-SDHCI-node.patch +++ b/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-add-SDHCI-node.patch @@ -13,8 +13,8 @@ Tested-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -264,6 +264,29 @@ - reg = <0x0 0x01937000 0x0 0x21000>; +@@ -469,6 +469,29 @@ + }; }; + sdhc_1: mmc@7804000 { diff --git a/target/linux/qualcommax/patches-6.1/0139-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch b/target/linux/qualcommax/patches-6.1/0139-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch index 6549211689ea87..8889db97f91d65 100644 --- a/target/linux/qualcommax/patches-6.1/0139-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch +++ b/target/linux/qualcommax/patches-6.1/0139-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch @@ -13,15 +13,15 @@ Signed-off-by: Chukun Pan --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -841,6 +841,11 @@ - regulator-max-microvolt = <1062500>; - regulator-always-on; - }; +@@ -178,6 +178,11 @@ + regulator-max-microvolt = <1062500>; + regulator-always-on; + }; + -+ ipq6018_l2: l2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ }; ++ ipq6018_l2: l2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; }; }; - }; diff --git a/target/linux/qualcommax/patches-6.1/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch b/target/linux/qualcommax/patches-6.1/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch index 8c1b7cc6c53f23..247df110fff7f2 100644 --- a/target/linux/qualcommax/patches-6.1/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch +++ b/target/linux/qualcommax/patches-6.1/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch @@ -15,7 +15,7 @@ Signed-off-by: Mantas Pucka --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -638,6 +638,102 @@ +@@ -807,6 +807,102 @@ }; }; diff --git a/target/linux/qualcommax/patches-6.1/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch b/target/linux/qualcommax/patches-6.1/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch index afb2361120f7c6..88e294562d01a2 100644 --- a/target/linux/qualcommax/patches-6.1/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch +++ b/target/linux/qualcommax/patches-6.1/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch @@ -15,7 +15,7 @@ Signed-off-by: Mantas Pucka --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -1057,6 +1057,7 @@ +@@ -1155,6 +1155,7 @@ wcss_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; diff --git a/target/linux/qualcommax/patches-6.1/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch b/target/linux/qualcommax/patches-6.1/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch index 5261f3fd96d2f2..0a7a100f6ac87b 100644 --- a/target/linux/qualcommax/patches-6.1/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch +++ b/target/linux/qualcommax/patches-6.1/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch @@ -13,7 +13,7 @@ Signed-off-by: Mantas Pucka --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -759,8 +759,8 @@ +@@ -928,8 +928,8 @@ "wcss_reset", "wcss_q6_reset"; diff --git a/target/linux/qualcommax/patches-6.1/0910-arm64-dts-qcom-ipq6018-change-voltage-to-perf-levels.patch b/target/linux/qualcommax/patches-6.1/0910-arm64-dts-qcom-ipq6018-change-voltage-to-perf-levels.patch index 8d2aff1dcaf77c..17784235c352df 100644 --- a/target/linux/qualcommax/patches-6.1/0910-arm64-dts-qcom-ipq6018-change-voltage-to-perf-levels.patch +++ b/target/linux/qualcommax/patches-6.1/0910-arm64-dts-qcom-ipq6018-change-voltage-to-perf-levels.patch @@ -14,7 +14,7 @@ Signed-off-by: Mantas Pucka --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -99,42 +99,42 @@ +@@ -106,42 +106,42 @@ opp-864000000 { opp-hz = /bits/ 64 <864000000>; From 23cb2b1636d2cfacaff4b459139c4026120431be Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Fri, 16 Feb 2024 14:33:49 +0800 Subject: [PATCH 21/25] uboot-rockchip: add NanoPi R2C Plus support Add support for the FriendlyARM NanoPi R2C Plus. Signed-off-by: Tianling Shen --- package/boot/uboot-rockchip/Makefile | 8 + ...pport-for-FriendlyARM-NanoPi-R2C-Plu.patch | 213 ++++++++++++++++++ 2 files changed, 221 insertions(+) create mode 100644 package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 71eac09d98ba39..2682a0afd69461 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -39,6 +39,13 @@ define U-Boot/nanopi-r2c-rk3328 friendlyarm_nanopi-r2c endef +define U-Boot/nanopi-r2c-plus-rk3328 + $(U-Boot/rk3328/Default) + NAME:=NanoPi R2C Plus + BUILD_DEVICES:= \ + friendlyarm_nanopi-r2c-plus +endef + define U-Boot/nanopi-r2s-rk3328 $(U-Boot/rk3328/Default) NAME:=NanoPi R2S @@ -147,6 +154,7 @@ UBOOT_TARGETS := \ rock-pi-4-rk3399 \ rockpro64-rk3399 \ nanopi-r2c-rk3328 \ + nanopi-r2c-plus-rk3328 \ nanopi-r2s-rk3328 \ orangepi-r1-plus-rk3328 \ orangepi-r1-plus-lts-rk3328 \ diff --git a/package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch b/package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch new file mode 100644 index 00000000000000..25e063bfa98c94 --- /dev/null +++ b/package/boot/uboot-rockchip/patches/001-board-rockchip-Add-support-for-FriendlyARM-NanoPi-R2C-Plu.patch @@ -0,0 +1,213 @@ +From 0bc16c6a8744a1c0293a31253020205b312895d3 Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Sat, 23 Dec 2023 12:00:07 +0800 +Subject: [PATCH] board: rockchip: Add support for FriendlyARM NanoPi R2C Plus + +The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board +eMMC flash (8G) included. + +The device tree is taken from the kernel v6.5. + +Signed-off-by: Tianling Shen +Reviewed-by: Kever Yang +--- + arch/arm/dts/Makefile | 1 + + .../dts/rk3328-nanopi-r2c-plus-u-boot.dtsi | 9 ++ + arch/arm/dts/rk3328-nanopi-r2c-plus.dts | 33 +++++ + board/rockchip/evb_rk3328/MAINTAINERS | 6 + + configs/nanopi-r2c-plus-rk3328_defconfig | 114 ++++++++++++++++++ + 5 files changed, 163 insertions(+) + create mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi + create mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus.dts + create mode 100644 configs/nanopi-r2c-plus-rk3328_defconfig + +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -126,6 +126,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ + dtb-$(CONFIG_ROCKCHIP_RK3328) += \ + rk3328-evb.dtb \ + rk3328-nanopi-r2c.dtb \ ++ rk3328-nanopi-r2c-plus.dtb \ + rk3328-nanopi-r2s.dtb \ + rk3328-orangepi-r1-plus.dtb \ + rk3328-orangepi-r1-plus-lts.dtb \ +--- /dev/null ++++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi +@@ -0,0 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++ ++#include "rk3328-nanopi-r2c-u-boot.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts +@@ -0,0 +1,33 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. ++ * (http://www.friendlyarm.com) ++ * ++ * Copyright (c) 2023 Tianling Shen ++ */ ++ ++/dts-v1/; ++#include "rk3328-nanopi-r2c.dts" ++ ++/ { ++ model = "FriendlyElec NanoPi R2C Plus"; ++ compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328"; ++ ++ aliases { ++ mmc1 = &emmc; ++ }; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ max-frequency = <150000000>; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ vmmc-supply = <&vcc_io_33>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; +--- a/board/rockchip/evb_rk3328/MAINTAINERS ++++ b/board/rockchip/evb_rk3328/MAINTAINERS +@@ -11,6 +11,12 @@ S: Maintained + F: configs/nanopi-r2c-rk3328_defconfig + F: arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi + ++NANOPI-R2C-PLUS-RK3328 ++M: Tianling Shen ++S: Maintained ++F: configs/nanopi-r2c-plus-rk3328_defconfig ++F: arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi ++ + NANOPI-R2S-RK3328 + M: David Bauer + S: Maintained +--- /dev/null ++++ b/configs/nanopi-r2c-plus-rk3328_defconfig +@@ -0,0 +1,114 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_COUNTER_FREQUENCY=24000000 ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_TEXT_BASE=0x00200000 ++CONFIG_SPL_GPIO=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c-plus" ++CONFIG_DM_RESET=y ++CONFIG_ROCKCHIP_RK3328=y ++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y ++CONFIG_TPL_LIBCOMMON_SUPPORT=y ++CONFIG_TPL_LIBGENERIC_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC=y ++CONFIG_SPL_STACK_R_ADDR=0x600000 ++CONFIG_SPL_STACK=0x400000 ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 ++CONFIG_DEBUG_UART_BASE=0xFF130000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SYS_LOAD_ADDR=0x800800 ++CONFIG_DEBUG_UART=y ++# CONFIG_ANDROID_BOOT_IMAGE is not set ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c-plus.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_MISC_INIT_R=y ++CONFIG_SPL_MAX_SIZE=0x40000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y ++CONFIG_SPL_BSS_START_ADDR=0x2000000 ++CONFIG_SPL_BSS_MAX_SIZE=0x2000 ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_I2C=y ++CONFIG_SPL_POWER=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_TPL_SYS_MALLOC_SIMPLE=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_TPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_TPL_OF_PLATDATA=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SYS_MMC_ENV_DEV=1 ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_TPL_DM=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_TPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_TPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_FASTBOOT_BUF_ADDR=0x800800 ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_SPL_PMIC_RK8XX=y ++CONFIG_SPL_DM_REGULATOR=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_SPL_DM_REGULATOR_FIXED=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550_MEM32=y ++CONFIG_SYSINFO=y ++CONFIG_SYSRESET=y ++# CONFIG_TPL_SYSRESET is not set ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_TPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y From 782266473de09c2b5f9332027bde3e5ad0493534 Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Fri, 16 Feb 2024 14:34:40 +0800 Subject: [PATCH 22/25] rockchip: add NanoPi R2C Plus support The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board eMMC flash (8G) included. Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen --- .../armv8/base-files/etc/board.d/01_leds | 1 + .../armv8/base-files/etc/board.d/02_network | 2 + .../etc/hotplug.d/net/40-net-smp-affinity | 1 + target/linux/rockchip/image/armv8.mk | 8 +++ ...chip-Add-FriendlyARM-NanoPi-R2C-Plus.patch | 63 +++++++++++++++++++ 5 files changed, 75 insertions(+) create mode 100644 target/linux/rockchip/patches-6.1/016-v6.5-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C-Plus.patch diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index fbbe2735e9e610..43dcd550161958 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -9,6 +9,7 @@ board_config_update case $board in friendlyarm,nanopi-r2c|\ +friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ xunlong,orangepi-r1-plus|\ diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index 01e32c77406413..2a83acc85c0a58 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -8,6 +8,7 @@ rockchip_setup_interfaces() case "$board" in friendlyarm,nanopi-r2c|\ + friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ xunlong,orangepi-r1-plus|\ @@ -68,6 +69,7 @@ rockchip_setup_macs() wan_mac=$(macaddr_generate_from_mmc_cid mmcblk*) lan_mac=$(macaddr_add "$wan_mac" 1) ;; + friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r5s) wan_mac=$(macaddr_generate_from_mmc_cid mmcblk1) lan_mac=$(macaddr_add "$wan_mac" 1) diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index 09fc420fec80e2..852e84a6e4cc2e 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -30,6 +30,7 @@ set_interface_core() { case "$(board_name)" in friendlyarm,nanopi-r2c|\ +friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 0bf91d15ca0c6d..310ab286873d38 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -30,6 +30,14 @@ define Device/friendlyarm_nanopi-r2c endef TARGET_DEVICES += friendlyarm_nanopi-r2c +define Device/friendlyarm_nanopi-r2c-plus + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi R2C Plus + SOC := rk3328 + DEVICE_PACKAGES := kmod-usb-net-rtl8152 +endef +TARGET_DEVICES += friendlyarm_nanopi-r2c-plus + define Device/friendlyarm_nanopi-r2s DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi R2S diff --git a/target/linux/rockchip/patches-6.1/016-v6.5-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C-Plus.patch b/target/linux/rockchip/patches-6.1/016-v6.5-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C-Plus.patch new file mode 100644 index 00000000000000..d0a0aa1b695621 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/016-v6.5-arm64-dts-rockchip-Add-FriendlyARM-NanoPi-R2C-Plus.patch @@ -0,0 +1,63 @@ +From d211665c5a833873ee37e501af58adbf028e6b5f Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Sat, 13 May 2023 21:53:07 +0800 +Subject: [PATCH] arm64: dts: rockchip: Add FriendlyARM NanoPi R2C Plus + +The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board +eMMC flash (8G) included. + +Signed-off-by: Tianling Shen +Link: https://lore.kernel.org/r/20230513135307.26554-2-cnsztl@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts | 33 ++++++++++++++++++++++ + 2 files changed, 34 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus.dts +@@ -0,0 +1,33 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. ++ * (http://www.friendlyarm.com) ++ * ++ * Copyright (c) 2023 Tianling Shen ++ */ ++ ++/dts-v1/; ++#include "rk3328-nanopi-r2c.dts" ++ ++/ { ++ model = "FriendlyElec NanoPi R2C Plus"; ++ compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328"; ++ ++ aliases { ++ mmc1 = &emmc; ++ }; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ max-frequency = <150000000>; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; ++ vmmc-supply = <&vcc_io_33>; ++ vqmmc-supply = <&vcc18_emmc>; ++ status = "okay"; ++}; From 873b0ed42c11ef3397cefe477dcdd02d612383f2 Mon Sep 17 00:00:00 2001 From: Martin Garbe Date: Tue, 13 Feb 2024 07:49:05 +0100 Subject: [PATCH 23/25] ath79: update WA/XC devices UBNT_VERSION to 8.7.4 Ubiquiti WA devices with newer hw version (sold 2023) require UBNT_VERSION to be at least 8.7.4, otherwise the image is rejected. For consistency, also increase version number for XC devices. Signed-off-by: Martin Garbe --- target/linux/ath79/image/common-ubnt.mk | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/linux/ath79/image/common-ubnt.mk b/target/linux/ath79/image/common-ubnt.mk index f44e06e1109865..6dd5ae146062dd 100644 --- a/target/linux/ath79/image/common-ubnt.mk +++ b/target/linux/ath79/image/common-ubnt.mk @@ -74,7 +74,7 @@ define Device/ubnt-2wa UBNT_BOARD := WA UBNT_CHIP := ar934x UBNT_TYPE := 2WA - UBNT_VERSION := 8.5.3 + UBNT_VERSION := 8.7.4 endef define Device/ubnt-wa @@ -84,7 +84,7 @@ define Device/ubnt-wa UBNT_BOARD := WA UBNT_CHIP := ar934x UBNT_TYPE := WA - UBNT_VERSION := 8.5.3 + UBNT_VERSION := 8.7.4 endef define Device/ubnt-xc @@ -93,7 +93,7 @@ define Device/ubnt-xc UBNT_BOARD := XC UBNT_CHIP := qca955x UBNT_TYPE := XC - UBNT_VERSION := 8.5.3 + UBNT_VERSION := 8.7.4 endef define Device/ubnt-xm From afca1236f318c2158920e777536d90334e1a86aa Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Sat, 17 Feb 2024 13:54:36 +0800 Subject: [PATCH 24/25] rockchip: add NanoPi R4S Enterprise Edition build FriendlyElec renamed the NanoPi R4S board with EEPROM (mac address) to "enterprise" edition, and it was added as a "new" board in upstream kernel. This patch switched to use that upstreamed dts and removed local EEPROM patch. Signed-off-by: Tianling Shen --- package/boot/uboot-rockchip/Makefile | 3 +- .../armv8/base-files/etc/board.d/01_leds | 1 + .../armv8/base-files/etc/board.d/02_network | 39 +++++-------------- .../etc/hotplug.d/net/40-net-smp-affinity | 3 +- target/linux/rockchip/image/armv8.mk | 10 +++++ ...kchip-add-EEPROM-node-for-NanoPi-R4S.patch | 31 --------------- .../105-nanopi-r4s-sd-signalling.patch | 2 +- 7 files changed, 26 insertions(+), 63 deletions(-) delete mode 100644 target/linux/rockchip/patches-6.1/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 2682a0afd69461..595d788973b7d1 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -107,7 +107,8 @@ define U-Boot/nanopi-r4s-rk3399 $(U-Boot/rk3399/Default) NAME:=NanoPi R4S BUILD_DEVICES:= \ - friendlyarm_nanopi-r4s + friendlyarm_nanopi-r4s \ + friendlyarm_nanopi-r4s-enterprise endef define U-Boot/rock-pi-4-rk3399 diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index 43dcd550161958..ad846666003e7b 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -12,6 +12,7 @@ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ +friendlyarm,nanopi-r4s-enterprise|\ xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0" diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index 2a83acc85c0a58..f87b17dbc1b146 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -11,6 +11,7 @@ rockchip_setup_interfaces() friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ + friendlyarm,nanopi-r4s-enterprise|\ xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) ucidef_set_interfaces_lan_wan 'eth1' 'eth0' @@ -27,27 +28,6 @@ rockchip_setup_interfaces() esac } -nanopi_r4s_get_mac() -{ - local interface=$1 - local eeprom_path="/sys/bus/i2c/devices/2-0051/eeprom" - local address - - if [ -f "$eeprom_path" ]; then - address=$(get_mac_binary "$eeprom_path" 0xfa) - if [ "$interface" = "lan" ]; then - address=$(macaddr_setbit_la "$address") - fi - else - address=$(macaddr_generate_from_mmc_cid mmcblk1) - if [ "$interface" = "lan" ]; then - address=$(macaddr_add "$address" 1) - fi - fi - - echo "$address" -} - rockchip_setup_macs() { local board="$1" @@ -61,19 +41,20 @@ rockchip_setup_macs() wan_mac=$(macaddr_generate_from_mmc_cid mmcblk0) lan_mac=$(macaddr_add "$wan_mac" 1) ;; - friendlyarm,nanopi-r4s) - wan_mac=$(nanopi_r4s_get_mac wan) - lan_mac=$(nanopi_r4s_get_mac lan) - ;; - friendlyarm,nanopi-r5c) - wan_mac=$(macaddr_generate_from_mmc_cid mmcblk*) - lan_mac=$(macaddr_add "$wan_mac" 1) - ;; friendlyarm,nanopi-r2c-plus|\ + friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r5s) wan_mac=$(macaddr_generate_from_mmc_cid mmcblk1) lan_mac=$(macaddr_add "$wan_mac" 1) ;; + friendlyarm,nanopi-r4s-enterprise) + wan_mac=$(get_mac_binary "/sys/bus/i2c/devices/2-0051/eeprom" 0xfa) + lan_mac=$(macaddr_setbit_la "$wan_mac") + ;; + friendlyarm,nanopi-r5c) + wan_mac=$(macaddr_generate_from_mmc_cid mmcblk*) + lan_mac=$(macaddr_add "$wan_mac" 1) + ;; xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) wan_mac=$(macaddr_add "$(cat /sys/class/net/eth1/address)" -1) diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index 852e84a6e4cc2e..1bdf235da1cdb9 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -37,7 +37,8 @@ xunlong,orangepi-r1-plus-lts) set_interface_core 2 "eth0" set_interface_core 4 "eth1" "xhci-hcd:usb[0-9]+" ;; -friendlyarm,nanopi-r4s) +friendlyarm,nanopi-r4s|\ +friendlyarm,nanopi-r4s-enterprise) set_interface_core 10 "eth0" set_interface_core 20 "eth1" ;; diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 310ab286873d38..4c1da55f803ccd 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -55,6 +55,16 @@ define Device/friendlyarm_nanopi-r4s endef TARGET_DEVICES += friendlyarm_nanopi-r4s +define Device/friendlyarm_nanopi-r4s-enterprise + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi R4S Enterprise Edition + DEVICE_VARIANT := 4GB LPDDR4 + SOC := rk3399 + UBOOT_DEVICE_NAME := nanopi-r4s-rk3399 + DEVICE_PACKAGES := kmod-r8168 +endef +TARGET_DEVICES += friendlyarm_nanopi-r4s-enterprise + define Device/friendlyarm_nanopi-r5c DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi R5C diff --git a/target/linux/rockchip/patches-6.1/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch b/target/linux/rockchip/patches-6.1/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch deleted file mode 100644 index 792028b29290f5..00000000000000 --- a/target/linux/rockchip/patches-6.1/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch +++ /dev/null @@ -1,31 +0,0 @@ -From af20b3384e8723077cc6484160b0cf4e9be321de Mon Sep 17 00:00:00 2001 -From: Tianling Shen -Date: Mon, 7 Jun 2021 15:45:37 +0800 -Subject: [PATCH] arm64: dts: rockchip: add EEPROM node for NanoPi R4S - -NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which -stores the MAC address. - -Signed-off-by: Tianling Shen ---- - arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -68,6 +68,15 @@ - status = "disabled"; - }; - -+&i2c2 { -+ eeprom@51 { -+ compatible = "microchip,24c02", "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ read-only; /* This holds our MAC */ -+ }; -+}; -+ - &i2c4 { - status = "disabled"; - }; diff --git a/target/linux/rockchip/patches-6.1/105-nanopi-r4s-sd-signalling.patch b/target/linux/rockchip/patches-6.1/105-nanopi-r4s-sd-signalling.patch index 856970738aaacd..b3c941821aaaf8 100644 --- a/target/linux/rockchip/patches-6.1/105-nanopi-r4s-sd-signalling.patch +++ b/target/linux/rockchip/patches-6.1/105-nanopi-r4s-sd-signalling.patch @@ -22,7 +22,7 @@ Signed-off-by: David Bauer status = "okay"; --- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -121,6 +121,11 @@ +@@ -112,6 +112,11 @@ status = "disabled"; }; From 63f7ced2f05ac8f1b9f924cd49201e99d24f2832 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 19 Feb 2024 21:38:40 +0100 Subject: [PATCH 25/25] generic: 6.1: add missing symbol for EN8811H PHY driver Disable Airoha EN8811H PHY driver by default to avoid individual targets having to disable it. Signed-off-by: Robert Marko --- target/linux/generic/config-6.1 | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/generic/config-6.1 b/target/linux/generic/config-6.1 index 18ce637c805035..b4aeeb9a7089c5 100644 --- a/target/linux/generic/config-6.1 +++ b/target/linux/generic/config-6.1 @@ -155,6 +155,7 @@ CONFIG_AF_UNIX_OOB=y # CONFIG_AHCI_QORIQ is not set # CONFIG_AHCI_XGENE is not set CONFIG_AIO=y +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AIRO is not set # CONFIG_AIRO_CS is not set # CONFIG_AIX_PARTITION is not set