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Add checks for unaligned/illegal memory accesses #53

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powerjg opened this issue May 13, 2019 · 1 comment

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powerjg commented May 13, 2019

Relates to #34. We can also add a wire back to the CSR/interrupt unit to generated an interrupt in this case.

Alternatively, we could check for this error condition in the CSR/interrupt controller. Maybe that would be better, in fact.

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nganjehloo commented May 13, 2019

i just did some of the setup for this in csr.scala starting at line 382 in system_csr branch. let me know if any help is needed with this

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