Run/fix the RISC-V inst tests

[powerjg]

There are a ton of tests for each RISC-V instruction in the RISC-V tests repo.

Unfortunately, because DINO CPU is missing some instructions (e.g., csr instructions) they don't run out of the box.

It might make sense to implement the host-guest interface from the risc-v tools, too, or to improve ours. Maybe this isn't related to this issue, though.

[powerjg]

Might need #35 and #34