[PT2.6][Torch.complie] Performance analysis and optimization

[riverliuintel]

🚀 The feature, motivation and pitch

Analyze Triton kernels data and report to Triton XPU.

1. Recollect reasonable competitive GPU performance data
2. Use TorchInductor built-in benchmark tool to detect slower XPU triton kernels.

Alternatives

No response

Additional context

No response

[jianyizh]

scatter op issue: intel/intel-xpu-backend-for-triton#2665

[jianyizh]

layout issue: intel/intel-xpu-backend-for-triton#2229

1. when number of conv is small, inductor will close layout opt. We have to force it open by TORCHINDUCTOR_FORCE_LAYOUT_OPT, otherwise we may meet inefficient kernel like cat_layernorm in this issue
2. For both xpu and cuda, when there are more nodes between conv, there will be unnecessary transpose. For example, conv (channel last) + bias and leakyrelu fusion (to channel first) + avg_pool (to channel last) + conv. It seems inductor does not propagate layout. Fuse bias and activation into conv will mitigate.

[jianyizh]

RNN related ops: #1109
We should fuse it using onednn instead of using torch compile for these small ops.