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Merge branch 'main' into chapter-8-bootcamp-clean
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quekyj committed Sep 4, 2023
2 parents 0dee717 + d23e902 commit 0f1770f
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25 changes: 19 additions & 6 deletions analysis_options.yaml
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Expand Up @@ -65,15 +65,17 @@ linter:
- cascade_invocations
- cast_nullable_to_non_nullable
- close_sinks
# - collection_methods_unrelated_type [not currently recognized]
# - combinators_ordering [not currently recognized]
- collection_methods_unrelated_type
- combinators_ordering
- comment_references
- conditional_uri_does_not_exist
- constant_identifier_names
- control_flow_in_finally
- curly_braces_in_flow_control_structures
- dangling_library_doc_comments
- depend_on_referenced_packages
- deprecated_consistency
- deprecated_member_use_from_same_package
- diagnostic_describe_all_properties
- directives_ordering
- discarded_futures
Expand All @@ -87,22 +89,31 @@ linter:
- flutter_style_todos
- hash_and_equals
- implementation_imports
- collection_methods_unrelated_type
- implicit_call_tearoffs
- implicit_reopen
- invalid_case_patterns
# - iterable_contains_unrelated_type [deprecated]
- join_return_with_assignment
- leading_newlines_in_multiline_strings
- library_annotations
- library_names
- library_prefixes
- library_private_types_in_public_api
- lines_longer_than_80_chars
# - list_remove_unrelated_type [deprecated]
- literal_only_boolean_expressions
- matching_super_parameters
- missing_whitespace_between_adjacent_strings
- no_adjacent_strings_in_list
- no_default_cases
- no_duplicate_case_values
- no_leading_underscores_for_library_prefixes
- no_leading_underscores_for_local_identifiers
- no_literal_bool_comparisons
- no_logic_in_create_state
- no_runtimeType_toString
- no_self_assignments
- no_wildcard_variable_uses
- non_constant_identifier_names
- noop_primitive_operations
- null_check_on_nullable_type_parameter
Expand All @@ -127,7 +138,6 @@ linter:
- prefer_constructors_over_static_methods
- prefer_contains
# - prefer_double_quotes
- prefer_equal_for_default_values
- prefer_expression_function_bodies
- prefer_final_fields
- prefer_final_in_for_each
Expand Down Expand Up @@ -172,15 +182,18 @@ linter:
- tighten_type_of_initializing_formals
- type_annotate_public_apis
- type_init_formals
- type_literal_in_constant_pattern
- unawaited_futures
- unnecessary_await_in_return
- unnecessary_brace_in_string_interps
- unnecessary_breaks
- unnecessary_const
- unnecessary_constructor_name
# - unnecessary_final
- unnecessary_getters_setters
- unnecessary_lambdas
- unnecessary_late
- unnecessary_library_directive
- unnecessary_new
- unnecessary_null_aware_assignments
- unnecessary_null_aware_operator_on_extension_on_nullable
Expand All @@ -195,7 +208,7 @@ linter:
- unnecessary_string_interpolations
- unnecessary_this
- unnecessary_to_list_in_spreads
# - unreachable_from_main [not currently recognized]
# - unreachable_from_main
- unrelated_type_equality_checks
- unsafe_html
- use_build_context_synchronously
Expand All @@ -213,7 +226,7 @@ linter:
- use_rethrow_when_possible
- use_setters_to_change_properties
- use_string_buffers
# - use_string_in_part_of_directives [not currently recognized]
- use_string_in_part_of_directives
- use_super_parameters
- use_test_throws_matchers
- use_to_and_as_if_applicable
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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/a_logic.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// a_logic.dart
/// Creation of logic in rohd.
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// a_logic.dart
// Creation of logic in rohd.
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, omit_local_variable_types

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/answers/exercise_1.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// exercise_1.dart
/// Answer to exercise 1.
///
/// 2023 February 14
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// exercise_1.dart
// Answer to exercise 1.
//
// 2023 February 14
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/answers/exercise_2.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// exercise_2.dart
/// Answer to exercise 2.
///
/// 2023 February 14
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// exercise_2.dart
// Answer to exercise 2.
//
// 2023 February 14
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unnecessary_this
import 'package:rohd/rohd.dart';
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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/answers/exercise_3.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// exercise_3.dart
/// Answer to exercise 3.
///
/// 2023 February 14
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// exercise_3.dart
// Answer to exercise 3.
//
// 2023 February 14
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/b_logic_width.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// a_logic_width.dart
/// Creation logic value and width in rohd.
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// a_logic_width.dart
// Creation logic value and width in rohd.
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/c_logic_gate_part_1.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// c_logic_gate_part_1.dart
/// Initialize of logic gate Logic.
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// c_logic_gate_part_1.dart
// Initialize of logic gate Logic.
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/d_assignment_operator.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// d_assignment_operator.dart
/// Demo how to the assignment operator work.
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// d_assignment_operator.dart
// Demo how to the assignment operator work.
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/e_logic_gate_part_2.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// e_logic_gate_part_2.dart
/// Add assignment and mathematical & operator to create Logic Gate.
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// e_logic_gate_part_2.dart
// Add assignment and mathematical & operator to create Logic Gate.
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/f_logic_gate_part_3.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// f_logic_gate_part_3.dart
/// Test and simulate the logic gate created using put().
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// f_logic_gate_part_3.dart
// Test and simulate the logic gate created using put().
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/g_constant.dart
Original file line number Diff line number Diff line change
@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// g_constant.dart
/// Creation of constant Logic in rohd.
///
/// 2023 February 20
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// g_constant.dart
// Creation of constant Logic in rohd.
//
// 2023 February 20
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/h_bus_range_swizzling.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// bus_range_swizzling.dart
/// Demonstrated the use of bus range and swizzling.
///
/// 2023 February 14
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// bus_range_swizzling.dart
// Demonstrated the use of bus range and swizzling.
//
// 2023 February 14
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_2/helper.dart
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@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// helper.dart
/// A helper file that contains all the Helper module to print system verilog.
///
/// 2023 February 14
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// helper.dart
// A helper file that contains all the Helper module to print system verilog.
//
// 2023 February 14
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print, unused_local_variable

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_7/answers/exercise_1_d_flip_flop.dart
Original file line number Diff line number Diff line change
@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// exercise_1_d_flip_flop.dart
/// A simple answer for d flip flop implementation based on chapter 7 bootcamp.
///
/// 2023 April 17
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// exercise_1_d_flip_flop.dart
// A simple answer for d flip flop implementation based on chapter 7 bootcamp.
//
// 2023 April 17
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print

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17 changes: 8 additions & 9 deletions doc/tutorials/chapter_7/shift_register.dart
Original file line number Diff line number Diff line change
@@ -1,12 +1,11 @@
/// Copyright (C) 2023 Intel Corporation
/// SPDX-License-Identifier: BSD-3-Clause
///
/// shift_register.dart
/// A simple shift register module in ROHD.
///
/// 2023 April 17
/// Author: Yao Jing Quek <[email protected]>
///
// Copyright (C) 2023 Intel Corporation
// SPDX-License-Identifier: BSD-3-Clause
//
// shift_register.dart
// A simple shift register module in ROHD.
//
// 2023 April 17
// Author: Yao Jing Quek <[email protected]>

// ignore_for_file: avoid_print

Expand Down
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