diff --git a/src/PMURegisterDeclarations/GenuineIntel-6-4F-1.json b/src/PMURegisterDeclarations/GenuineIntel-6-4F-1.json index 6901131a..3f1fcc2b 100644 --- a/src/PMURegisterDeclarations/GenuineIntel-6-4F-1.json +++ b/src/PMURegisterDeclarations/GenuineIntel-6-4F-1.json @@ -110,5 +110,13 @@ "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} } + }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } } } diff --git a/src/PMURegisterDeclarations/GenuineIntel-6-55-4.json b/src/PMURegisterDeclarations/GenuineIntel-6-55-4.json index 2d39fd49..9b08c471 100644 --- a/src/PMURegisterDeclarations/GenuineIntel-6-55-4.json +++ b/src/PMURegisterDeclarations/GenuineIntel-6-55-4.json @@ -115,6 +115,14 @@ "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} } }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, "iio" : { "programmable" : { "EventCode": {"Config": 0, "Position": 0, "Width": 8}, diff --git a/src/PMURegisterDeclarations/GenuineIntel-6-6A-6.json b/src/PMURegisterDeclarations/GenuineIntel-6-6A-6.json index 6d1196f3..ee0d516d 100644 --- a/src/PMURegisterDeclarations/GenuineIntel-6-6A-6.json +++ b/src/PMURegisterDeclarations/GenuineIntel-6-6A-6.json @@ -116,6 +116,14 @@ "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} } }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, "pcu" : { "programmable" : { "EventCode": {"Config": 0, "Position": 0, "Width": 8}, diff --git a/src/PMURegisterDeclarations/GenuineIntel-6-8F-6.json b/src/PMURegisterDeclarations/GenuineIntel-6-8F-6.json index 60f71ca6..0cc35641 100644 --- a/src/PMURegisterDeclarations/GenuineIntel-6-8F-6.json +++ b/src/PMURegisterDeclarations/GenuineIntel-6-8F-6.json @@ -124,6 +124,14 @@ "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} } }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, "pcu" : { "programmable" : { "EventCode": {"Config": 0, "Position": 0, "Width": 8}, diff --git a/src/PMURegisterDeclarations/GenuineIntel-6-CF-1.json b/src/PMURegisterDeclarations/GenuineIntel-6-CF-1.json index 60f71ca6..0cc35641 100644 --- a/src/PMURegisterDeclarations/GenuineIntel-6-CF-1.json +++ b/src/PMURegisterDeclarations/GenuineIntel-6-CF-1.json @@ -124,6 +124,14 @@ "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} } }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, "pcu" : { "programmable" : { "EventCode": {"Config": 0, "Position": 0, "Width": 8},