add data_phase tiedown in non-burst cores

im-tomu · Oct 27, 2020 · 1d0b56f · 1d0b56f
1 parent fc2eae8
commit 1d0b56f
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/valentyusb/usbcore/cpu/usbwishbonebridge.py b/valentyusb/usbcore/cpu/usbwishbonebridge.py
@@ -69,6 +69,8 @@ def __init__(self, usb_core, clk_freq=12000000, magic_packet=0x43, cdc=False, re
                 ]}
         """)
         # # #
+        self.data_phase = Signal()
+        self.comb += self.data_phase.eq(0)  # unused tiedown in this core; used in variants with burst support
 
         byte_counter = Signal(3, reset_less=True)
         byte_counter_reset = Signal()