IR Interpreter

.travis.sh

@@ -1,5 +1,6 @@
 #/bin/bash
 
+export NDK_CCACHE=ccache
 NDK_VER=android-ndk-r10d
 
 download_extract() {
@@ -85,7 +86,7 @@ travis_script() {
 	# Compile PPSSPP
 	if [ "$PPSSPP_BUILD_TYPE" = "Linux" ]; then
 		if [ "$CXX" = "g++" ]; then
-			export CXX="g++-4.8" CC="gcc-4.8"
+			export CXX="ccache g++-4.8" CC="ccache gcc-4.8"
 		fi
 
 		if [ "$QT" = "TRUE" ]; then
@@ -123,6 +124,8 @@ travis_script() {
 }
 
 travis_after_success() {
+	ccache -s
+
 	if [ "$PPSSPP_BUILD_TYPE" = "Linux" ]; then
 		./test.py
 	fi

.travis.yml

@@ -4,20 +4,19 @@ sudo: required
 
 language: cpp
 
-os: linux
-
 dist: trusty
 
-compiler:
-  - gcc
+addons:
+  apt:
+    packages:
+      - build-essential
+      - libgl1-mesa-dev
+      - libglu1-mesa-dev
+      - cmake
 
-env:
-  - PPSSPP_BUILD_TYPE=Linux
-    CMAKE=TRUE
-  - PPSSPP_BUILD_TYPE=Android
-  - PPSSPP_BUILD_TYPE=Blackberry
-    CMAKE=TRUE
-  - PPSSPP_BUILD_TYPE=Symbian
+cache:
+  - apt
+  - ccache
 
 notifications:
   irc:
@@ -30,15 +29,31 @@ notifications:
 
 matrix:
   include:
-    - compiler: clang
+    - os: linux
+      compiler: "gcc linux"
+      env: PPSSPP_BUILD_TYPE=Linux
+           CMAKE=TRUE
+    - os: linux
+      compiler: "gcc android"
+      env: PPSSPP_BUILD_TYPE=Android
+    - os: linux
+      compiler: "gcc blackberry"
+      env: PPSSPP_BUILD_TYPE=Blackberry
+           CMAKE=TRUE
+    - os: linux
+      compiler: "gcc symbian"
+      env: PPSSPP_BUILD_TYPE=Symbian
+    - os: linux
+      compiler: "clang linux"
       env: PPSSPP_BUILD_TYPE=Linux
            CMAKE=TRUE
-    - compiler: gcc
+    - os: linux
+      compiler: "gcc qt"
       env: PPSSPP_BUILD_TYPE=Linux
            QT=TRUE
 # Can't get iOS to work.
 #    - os: osx
-#      compiler: clang
+#      compiler: "clang ios"
 #      env: PPSSPP_BUILD_TYPE=iOS
 #           CMAKE=TRUE
 

CMakeLists.txt

@@ -1077,6 +1077,27 @@ include_directories(ext/xxhash)
 
 set(CoreExtra)
 set(CoreExtraLibs)
+
+set(CoreExtra ${CoreExtra}
+	Core/MIPS/IR/IRCompALU.cpp
+	Core/MIPS/IR/IRCompBranch.cpp
+	Core/MIPS/IR/IRCompFPU.cpp
+	Core/MIPS/IR/IRCompLoadStore.cpp
+	Core/MIPS/IR/IRCompVFPU.cpp
+	Core/MIPS/IR/IRFrontend.cpp
+	Core/MIPS/IR/IRFrontend.h
+	Core/MIPS/IR/IRInst.cpp
+	Core/MIPS/IR/IRInst.h
+	Core/MIPS/IR/IRInterpreter.cpp
+	Core/MIPS/IR/IRInterpreter.h
+	Core/MIPS/IR/IRJit.cpp
+	Core/MIPS/IR/IRJit.h
+	Core/MIPS/IR/IRPassSimplify.cpp
+	Core/MIPS/IR/IRPassSimplify.h
+	Core/MIPS/IR/IRRegCache.cpp
+	Core/MIPS/IR/IRRegCache.h
+	)
+
 if(ARM)
 	set(CoreExtra ${CoreExtra}
 		Core/MIPS/ARM/ArmAsm.cpp

Common/CommonFuncs.h

@@ -20,30 +20,27 @@
 #include "base/compat.h"
 #include "CommonTypes.h"
 
-#if defined(IOS) || defined(MIPS)
-#include <signal.h>
-#endif
-
 template <bool> struct CompileTimeAssert;
 template<> struct CompileTimeAssert<true> {};
 
-#ifndef _WIN32
+#if !defined(_WIN32)
 
 #include <unistd.h>
 #include <errno.h>
 
 #if defined(_M_IX86) || defined(_M_X86)
-	#define Crash() {asm ("int $3");}
+#define Crash() {asm ("int $3");}
 #else
-  #define Crash() {kill(getpid(), SIGINT);}
+#include <signal.h>
+#define Crash() {kill(getpid(), SIGINT);}
 #endif
 
 #define ARRAYSIZE(A) (sizeof(A)/sizeof((A)[0]))
 
 inline u32 __rotl(u32 x, int shift) {
-    shift &= 31;
-    if (!shift) return x;
-    return (x << shift) | (x >> (32 - shift));
+	shift &= 31;
+	if (!shift) return x;
+	return (x << shift) | (x >> (32 - shift));
 }
 
 inline u64 __rotl64(u64 x, unsigned int shift){

Core/Config.cpp

@@ -282,9 +282,20 @@ static int DefaultNumWorkers() {
 	return cpu_info.num_cores;
 }
 
-static bool DefaultJit() {
+// TODO: Default to IRJit on iOS when it's done.
+static int DefaultCpuCore() {
 #ifdef IOS
-	return iosCanUseJit;
+	return iosCanUseJit ? CPU_CORE_JIT : CPU_CORE_INTERPRETER;
+#elif defined(ARM) || defined(ARM64) || defined(_M_IX86) || defined(_M_X64)
+	return CPU_CORE_JIT;
+#else
+	return CPU_CORE_INTERPRETER;
+#endif
+}
+
+static bool DefaultCodeGen() {
+#ifdef IOS
+	return iosCanUseJit ? true : false;
 #elif defined(ARM) || defined(ARM64) || defined(_M_IX86) || defined(_M_X64)
 	return true;
 #else
@@ -353,7 +364,7 @@ static bool DefaultSasThread() {
 }
 
 static ConfigSetting cpuSettings[] = {
-	ReportedConfigSetting("Jit", &g_Config.bJit, &DefaultJit, true, true),
+	ReportedConfigSetting("CPUCore", &g_Config.iCpuCore, &DefaultCpuCore, true, true),
 	ReportedConfigSetting("SeparateCPUThread", &g_Config.bSeparateCPUThread, false, true, true),
 	ReportedConfigSetting("SeparateSASThread", &g_Config.bSeparateSASThread, &DefaultSasThread, true, true),
 	ReportedConfigSetting("SeparateIOThread", &g_Config.bSeparateIOThread, true, true, true),
@@ -463,7 +474,7 @@ static ConfigSetting graphicsSettings[] = {
 	ReportedConfigSetting("VertexCache", &g_Config.bVertexCache, true, true, true),
 	ReportedConfigSetting("TextureBackoffCache", &g_Config.bTextureBackoffCache, false, true, true),
 	ReportedConfigSetting("TextureSecondaryCache", &g_Config.bTextureSecondaryCache, false, true, true),
-	ReportedConfigSetting("VertexDecJit", &g_Config.bVertexDecoderJit, &DefaultJit, false),
+	ReportedConfigSetting("VertexDecJit", &g_Config.bVertexDecoderJit, &DefaultCodeGen, false),
 
 #ifndef MOBILE_DEVICE
 	ConfigSetting("FullScreen", &g_Config.bFullScreen, false),
@@ -958,16 +969,16 @@ void Config::Load(const char *iniFileName, const char *controllerIniFilename) {
 	}
 
 	// Override ppsspp.ini JIT value to prevent crashing
-	if (!DefaultJit() && g_Config.bJit) {
+	if (DefaultCpuCore() != CPU_CORE_JIT && g_Config.iCpuCore == CPU_CORE_JIT) {
 		jitForcedOff = true;
-		g_Config.bJit = false;
+		g_Config.iCpuCore = CPU_CORE_INTERPRETER;
 	}
 }
 
 void Config::Save() {
 	if (jitForcedOff) {
 		// if JIT has been forced off, we don't want to screw up the user's ppsspp.ini
-		g_Config.bJit = true;
+		g_Config.iCpuCore = CPU_CORE_JIT;
 	}
 	if (iniFilename_.size() && g_Config.bSaveSettings) {
 
@@ -1036,7 +1047,7 @@ void Config::Save() {
 	}
 	if (jitForcedOff) {
 		// force JIT off again just in case Config::Save() is called without exiting PPSSPP
-		g_Config.bJit = false;
+		g_Config.iCpuCore = CPU_CORE_INTERPRETER;
 	}
 }
 

Core/Config.h

@@ -33,6 +33,12 @@ const int PSP_DEFAULT_FIRMWARE = 150;
 static const s8 VOLUME_OFF = 0;
 static const s8 VOLUME_MAX = 10;
 
+enum CPUCore {
+	CPU_CORE_INTERPRETER = 0,
+	CPU_CORE_JIT = 1,
+	CPU_CORE_IRJIT = 2,
+};
+
 enum {
 	ROTATION_AUTO = 0,
 	ROTATION_LOCKED_HORIZONTAL = 1,
@@ -119,7 +125,7 @@ struct Config {
 	// Core
 	bool bIgnoreBadMemAccess;
 	bool bFastMemory;
-	bool bJit;
+	int iCpuCore;
 	bool bCheckForNewVersion;
 	bool bForceLagSync;
 	bool bFuncReplacements;

Core/Core.vcxproj

@@ -181,6 +181,18 @@
     <ClCompile Include="..\ext\udis86\syn-intel.c" />
     <ClCompile Include="..\ext\udis86\syn.c" />
     <ClCompile Include="..\ext\udis86\udis86.c" />
+    <ClCompile Include="MIPS\IR\IRAsm.cpp" />
+    <ClCompile Include="MIPS\IR\IRCompALU.cpp" />
+    <ClCompile Include="MIPS\IR\IRCompBranch.cpp" />
+    <ClCompile Include="MIPS\IR\IRCompFPU.cpp" />
+    <ClCompile Include="MIPS\IR\IRCompLoadStore.cpp" />
+    <ClCompile Include="MIPS\IR\IRCompVFPU.cpp" />
+    <ClCompile Include="MIPS\IR\IRFrontend.cpp" />
+    <ClCompile Include="MIPS\IR\IRInst.cpp" />
+    <ClCompile Include="MIPS\IR\IRInterpreter.cpp" />
+    <ClCompile Include="MIPS\IR\IRJit.cpp" />
+    <ClCompile Include="MIPS\IR\IRPassSimplify.cpp" />
+    <ClCompile Include="MIPS\IR\IRRegCache.cpp" />
     <ClCompile Include="TextureReplacer.cpp" />
     <ClCompile Include="Compatibility.cpp" />
     <ClCompile Include="Config.cpp" />
@@ -507,6 +519,12 @@
     <ClInclude Include="..\ext\udis86\types.h" />
     <ClInclude Include="..\ext\udis86\udint.h" />
     <ClInclude Include="..\ext\udis86\udis86.h" />
+    <ClInclude Include="MIPS\IR\IRFrontend.h" />
+    <ClInclude Include="MIPS\IR\IRInst.h" />
+    <ClInclude Include="MIPS\IR\IRInterpreter.h" />
+    <ClInclude Include="MIPS\IR\IRJit.h" />
+    <ClInclude Include="MIPS\IR\IRPassSimplify.h" />
+    <ClInclude Include="MIPS\IR\IRRegCache.h" />
     <ClInclude Include="TextureReplacer.h" />
     <ClInclude Include="Compatibility.h" />
     <ClInclude Include="Config.h" />

Core/Core.vcxproj.filters

@@ -67,6 +67,9 @@
     <Filter Include="FileLoaders">
       <UniqueIdentifier>{67687dba-8313-4442-b4eb-4be8c4867b65}</UniqueIdentifier>
     </Filter>
+    <Filter Include="MIPS\IR">
+      <UniqueIdentifier>{119ac973-e457-4025-9e1e-4fb34022ae23}</UniqueIdentifier>
+    </Filter>
   </ItemGroup>
   <ItemGroup>
     <ClCompile Include="ELF\ElfReader.cpp">
@@ -634,6 +637,42 @@
     <ClCompile Include="TextureReplacer.cpp">
       <Filter>Core</Filter>
     </ClCompile>
+    <ClCompile Include="MIPS\IR\IRAsm.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRCompALU.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRCompBranch.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRCompFPU.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRCompLoadStore.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRCompVFPU.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRJit.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRRegCache.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRInst.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRPassSimplify.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRInterpreter.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
+    <ClCompile Include="MIPS\IR\IRFrontend.cpp">
+      <Filter>MIPS\IR</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="ELF\ElfReader.h">
@@ -1179,6 +1218,24 @@
     <ClInclude Include="TextureReplacer.h">
       <Filter>Core</Filter>
     </ClInclude>
+    <ClInclude Include="MIPS\IR\IRJit.h">
+      <Filter>MIPS\IR</Filter>
+    </ClInclude>
+    <ClInclude Include="MIPS\IR\IRRegCache.h">
+      <Filter>MIPS\IR</Filter>
+    </ClInclude>
+    <ClInclude Include="MIPS\IR\IRInst.h">
+      <Filter>MIPS\IR</Filter>
+    </ClInclude>
+    <ClInclude Include="MIPS\IR\IRPassSimplify.h">
+      <Filter>MIPS\IR</Filter>
+    </ClInclude>
+    <ClInclude Include="MIPS\IR\IRInterpreter.h">
+      <Filter>MIPS\IR</Filter>
+    </ClInclude>
+    <ClInclude Include="MIPS\IR\IRFrontend.h">
+      <Filter>MIPS\IR</Filter>
+    </ClInclude>
   </ItemGroup>
   <ItemGroup>
     <None Include="CMakeLists.txt" />

Core/CoreParameter.h

@@ -20,11 +20,7 @@
 #include <string>
 
 #include "Core/Compatibility.h"
-
-enum CPUCore {
-	CPU_INTERPRETER,
-	CPU_JIT,
-};
+#include "Core/Config.h"
 
 enum GPUCore {
 	GPUCORE_NULL,
@@ -46,6 +42,7 @@ struct CoreParameter {
 
 	CPUCore cpuCore;
 	GPUCore gpuCore;
+
 	GraphicsContext *graphicsContext;  // TODO: Find a better place.
 	Thin3DContext *thin3d;
 	bool enableSound;  // there aren't multiple sound cores.

Core/CoreTiming.cpp

@@ -570,9 +570,9 @@ void ForceCheck()
 	int cyclesExecuted = slicelength - currentMIPS->downcount;
 	globalTimer += cyclesExecuted;
 	// This will cause us to check for new events immediately.
-	currentMIPS->downcount = 0;
+	currentMIPS->downcount = -1;
 	// But let's not eat a bunch more time in Advance() because of this.
-	slicelength = 0;
+	slicelength = 1;
 }
 
 void Advance()