IR Interpreter

[hrydgard]

So, this is different from the previous one that used MIPS instructions as an IR directly.

This translates code into a fast-to-interpret and easy-to-analyze IR (intermediate representation). Gets rid of delay slots and other MIPS silliness (though there's a small wart with "likely" branch instructions) while still keeping the MIPS register set and semantics, mostly. It then optimizes and caches these blocks like the real JITs and executes them.

This new IR should also suitable as a first step for things like more proper full-function compilation, SSA, etc. you'd probably want to first use this translator, run the constant propagation pass, then link multiple of these blocks together and lift into an AST, transform that into SSA, perform more optimizations and then do register allocation and code generation. Or something simpler :)

Anyhow, this is around 50% faster than the current interpreter already, so will be useful for non-JIT platforms like iOS, even if no more advanced compilation is done.

It's completely missing things like CPU floating point rounding mode for now.

[unknownbrackets]

Does it still? I think we want this, both here and in arm64jit.

-[Unknown]

[hrydgard]

Hmm, yeah, we do. Have not tried recently on ARM64.

[unknownbrackets]

I wonder. For this sequence:

088b2f54   divu t0, a2
088b2f58   beql a2, zero, ->$088b2f60
088b2f5c   break  --- unknown ---

Maybe we could just pretend there was no beql at all? It can be relatively common, and it's just skipping the break when the divisor is non zero.

-[Unknown]

[hrydgard]

@unknownbrackets yes that should be safe. We could even do it before the IR to not have to create a new block, although ideally future multi-block compilation will optimize it away.

[hrydgard]

Thanks for the fixes @unknownbrackets , I'll merge this later today after a few more changes.

Should get around to fixing the rounding as well, as this will produce broken saves in God Eater etc...